| Misha Brukman | e5b358c | 2003-11-05 06:43:36 +0000 | [diff] [blame] | 1 | ##===- lib/Target/X86/Makefile -----------------------------*- Makefile -*-===## |
| John Criswell | 4436c49 | 2003-10-20 22:26:57 +0000 | [diff] [blame] | 2 | # |
| 3 | # The LLVM Compiler Infrastructure |
| 4 | # |
| 5 | # This file was developed by the LLVM research group and is distributed under |
| 6 | # the University of Illinois Open Source License. See LICENSE.TXT for details. |
| 7 | # |
| 8 | ##===----------------------------------------------------------------------===## |
| Chris Lattner | d92fb00 | 2002-10-25 22:55:53 +0000 | [diff] [blame] | 9 | LEVEL = ../../.. |
| 10 | LIBRARYNAME = x86 |
| 11 | include $(LEVEL)/Makefile.common |
| 12 | |
| Chris Lattner | 1d21ea7 | 2004-08-01 06:01:32 +0000 | [diff] [blame] | 13 | TARGET = X86 |
| 14 | |
| Chris Lattner | a4741a9 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 15 | # Make sure that tblgen is run, first thing. |
| Chris Lattner | 553f6c1 | 2003-08-03 21:54:59 +0000 | [diff] [blame] | 16 | $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ |
| 17 | X86GenRegisterInfo.inc X86GenInstrNames.inc \ |
| Chris Lattner | 5683260 | 2004-10-03 20:36:57 +0000 | [diff] [blame] | 18 | X86GenInstrInfo.inc X86GenATTAsmWriter.inc \ |
| 19 | X86GenIntelAsmWriter.inc |
| Chris Lattner | a4741a9 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 20 | |
| Chris Lattner | 1d21ea7 | 2004-08-01 06:01:32 +0000 | [diff] [blame] | 21 | TDFILES = $(SourceDir)/$(TARGET).td $(wildcard $(SourceDir)/*.td) \ |
| 22 | $(SourceDir)/../Target.td |
| 23 | |
| 24 | $(TARGET)GenRegisterNames.inc:: $(TDFILES) $(TBLGEN) |
| 25 | @echo "Building $(TARGET).td register names with tblgen" |
| Chris Lattner | 632cccf | 2003-09-10 19:52:54 +0000 | [diff] [blame] | 26 | $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@ |
| Chris Lattner | a4741a9 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 27 | |
| Chris Lattner | 1d21ea7 | 2004-08-01 06:01:32 +0000 | [diff] [blame] | 28 | $(TARGET)GenRegisterInfo.h.inc:: $(TDFILES) $(TBLGEN) |
| 29 | @echo "Building $(TARGET).td register information header with tblgen" |
| Chris Lattner | 632cccf | 2003-09-10 19:52:54 +0000 | [diff] [blame] | 30 | $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@ |
| Chris Lattner | a4741a9 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 31 | |
| Chris Lattner | 1d21ea7 | 2004-08-01 06:01:32 +0000 | [diff] [blame] | 32 | $(TARGET)GenRegisterInfo.inc:: $(TDFILES) $(TBLGEN) |
| 33 | @echo "Building $(TARGET).td register info implementation with tblgen" |
| Chris Lattner | 632cccf | 2003-09-10 19:52:54 +0000 | [diff] [blame] | 34 | $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@ |
| Chris Lattner | a4741a9 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 35 | |
| Chris Lattner | 1d21ea7 | 2004-08-01 06:01:32 +0000 | [diff] [blame] | 36 | $(TARGET)GenInstrNames.inc:: $(TDFILES) $(TBLGEN) |
| 37 | @echo "Building $(TARGET).td instruction names with tblgen" |
| Chris Lattner | 632cccf | 2003-09-10 19:52:54 +0000 | [diff] [blame] | 38 | $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@ |
| Chris Lattner | 553f6c1 | 2003-08-03 21:54:59 +0000 | [diff] [blame] | 39 | |
| Chris Lattner | 1d21ea7 | 2004-08-01 06:01:32 +0000 | [diff] [blame] | 40 | $(TARGET)GenInstrInfo.inc:: $(TDFILES) $(TBLGEN) |
| 41 | @echo "Building $(TARGET).td instruction information with tblgen" |
| Chris Lattner | 632cccf | 2003-09-10 19:52:54 +0000 | [diff] [blame] | 42 | $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@ |
| Chris Lattner | e61db42 | 2003-08-11 14:59:22 +0000 | [diff] [blame] | 43 | |
| Chris Lattner | 5683260 | 2004-10-03 20:36:57 +0000 | [diff] [blame] | 44 | $(TARGET)GenATTAsmWriter.inc:: $(TDFILES) $(TBLGEN) |
| 45 | @echo "Building $(TARGET).td AT&T assembly writer with tblgen" |
| Chris Lattner | 1d21ea7 | 2004-08-01 06:01:32 +0000 | [diff] [blame] | 46 | $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -o $@ |
| 47 | |
| Chris Lattner | 5683260 | 2004-10-03 20:36:57 +0000 | [diff] [blame] | 48 | $(TARGET)GenIntelAsmWriter.inc:: $(TDFILES) $(TBLGEN) |
| 49 | @echo "Building $(TARGET).td Intel assembly writer with tblgen" |
| 50 | $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-asm-writer -asmwriternum=1 -o $@ |
| 51 | |
| Chris Lattner | 1d088db | 2004-08-15 23:02:17 +0000 | [diff] [blame] | 52 | #$(TARGET)GenInstrSelector.inc:: $(TDFILES) $(TBLGEN) |
| 53 | # @echo "Building $(TARGET).td instruction selector with tblgen" |
| 54 | # $(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@ |
| Chris Lattner | 553f6c1 | 2003-08-03 21:54:59 +0000 | [diff] [blame] | 55 | |
| Chris Lattner | a4741a9 | 2003-08-03 15:48:14 +0000 | [diff] [blame] | 56 | clean:: |
| 57 | $(VERB) rm -f *.inc |