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Preston Gurd8b7ab4b2013-04-25 20:29:37 +00001//===-- X86FixupLEAs.cpp - use or replace LEA instructions -----------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines the pass which will find instructions which
11// can be re-written as LEA instructions in order to reduce pipeline
12// delays for some models of the Intel Atom family.
13//
14//===----------------------------------------------------------------------===//
15
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000016#include "X86.h"
17#include "X86InstrInfo.h"
18#include "X86Subtarget.h"
19#include "llvm/ADT/Statistic.h"
20#include "llvm/CodeGen/LiveVariables.h"
21#include "llvm/CodeGen/MachineFunctionPass.h"
22#include "llvm/CodeGen/MachineInstrBuilder.h"
23#include "llvm/CodeGen/MachineRegisterInfo.h"
24#include "llvm/CodeGen/Passes.h"
25#include "llvm/Support/Debug.h"
26#include "llvm/Support/raw_ostream.h"
27#include "llvm/Target/TargetInstrInfo.h"
28using namespace llvm;
29
Chandler Carruth84e68b22014-04-22 02:41:26 +000030#define DEBUG_TYPE "x86-fixup-LEAs"
31
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000032STATISTIC(NumLEAs, "Number of LEA instructions created");
33
34namespace {
Eric Christopher31b81ce2014-06-03 21:01:35 +000035class FixupLEAPass : public MachineFunctionPass {
36 enum RegUsageState { RU_NotUsed, RU_Write, RU_Read };
37 static char ID;
38 /// \brief Loop over all of the instructions in the basic block
39 /// replacing applicable instructions with LEA instructions,
40 /// where appropriate.
41 bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI);
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000042
Eric Christopher31b81ce2014-06-03 21:01:35 +000043 const char *getPassName() const override { return "X86 Atom LEA Fixup"; }
Preston Gurd128920d2013-04-25 21:31:33 +000044
Eric Christopher31b81ce2014-06-03 21:01:35 +000045 /// \brief Given a machine register, look for the instruction
46 /// which writes it in the current basic block. If found,
47 /// try to replace it with an equivalent LEA instruction.
48 /// If replacement succeeds, then also process the the newly created
49 /// instruction.
50 void seekLEAFixup(MachineOperand &p, MachineBasicBlock::iterator &I,
51 MachineFunction::iterator MFI);
Preston Gurd128920d2013-04-25 21:31:33 +000052
Eric Christopher31b81ce2014-06-03 21:01:35 +000053 /// \brief Given a memory access or LEA instruction
54 /// whose address mode uses a base and/or index register, look for
55 /// an opportunity to replace the instruction which sets the base or index
56 /// register with an equivalent LEA instruction.
57 void processInstruction(MachineBasicBlock::iterator &I,
58 MachineFunction::iterator MFI);
Preston Gurd128920d2013-04-25 21:31:33 +000059
Eric Christopher31b81ce2014-06-03 21:01:35 +000060 /// \brief Given a LEA instruction which is unprofitable
61 /// on Silvermont try to replace it with an equivalent ADD instruction
62 void processInstructionForSLM(MachineBasicBlock::iterator &I,
63 MachineFunction::iterator MFI);
Alexey Volkov6226de62014-05-20 08:55:50 +000064
Eric Christopher31b81ce2014-06-03 21:01:35 +000065 /// \brief Determine if an instruction references a machine register
66 /// and, if so, whether it reads or writes the register.
67 RegUsageState usesRegister(MachineOperand &p, MachineBasicBlock::iterator I);
Preston Gurd128920d2013-04-25 21:31:33 +000068
Eric Christopher31b81ce2014-06-03 21:01:35 +000069 /// \brief Step backwards through a basic block, looking
70 /// for an instruction which writes a register within
71 /// a maximum of INSTR_DISTANCE_THRESHOLD instruction latency cycles.
72 MachineBasicBlock::iterator searchBackwards(MachineOperand &p,
73 MachineBasicBlock::iterator &I,
74 MachineFunction::iterator MFI);
Preston Gurd128920d2013-04-25 21:31:33 +000075
Eric Christopher31b81ce2014-06-03 21:01:35 +000076 /// \brief if an instruction can be converted to an
77 /// equivalent LEA, insert the new instruction into the basic block
78 /// and return a pointer to it. Otherwise, return zero.
79 MachineInstr *postRAConvertToLEA(MachineFunction::iterator &MFI,
80 MachineBasicBlock::iterator &MBBI) const;
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000081
Eric Christopher31b81ce2014-06-03 21:01:35 +000082public:
83 FixupLEAPass() : MachineFunctionPass(ID) {}
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000084
Eric Christopher31b81ce2014-06-03 21:01:35 +000085 /// \brief Loop over all of the basic blocks,
86 /// replacing instructions by equivalent LEA instructions
87 /// if needed and when possible.
88 bool runOnMachineFunction(MachineFunction &MF) override;
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000089
Eric Christopher31b81ce2014-06-03 21:01:35 +000090private:
91 MachineFunction *MF;
92 const TargetMachine *TM;
93 const X86InstrInfo *TII; // Machine instruction info.
94};
95char FixupLEAPass::ID = 0;
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000096}
97
Preston Gurd8b7ab4b2013-04-25 20:29:37 +000098MachineInstr *
99FixupLEAPass::postRAConvertToLEA(MachineFunction::iterator &MFI,
Preston Gurd128920d2013-04-25 21:31:33 +0000100 MachineBasicBlock::iterator &MBBI) const {
Eric Christopher31b81ce2014-06-03 21:01:35 +0000101 MachineInstr *MI = MBBI;
102 MachineInstr *NewMI;
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000103 switch (MI->getOpcode()) {
Alexey Volkov6226de62014-05-20 08:55:50 +0000104 case X86::MOV32rr:
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000105 case X86::MOV64rr: {
Eric Christopher31b81ce2014-06-03 21:01:35 +0000106 const MachineOperand &Src = MI->getOperand(1);
107 const MachineOperand &Dest = MI->getOperand(0);
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000108 NewMI = BuildMI(*MF, MI->getDebugLoc(),
Eric Christopher31b81ce2014-06-03 21:01:35 +0000109 TII->get(MI->getOpcode() == X86::MOV32rr ? X86::LEA32r
110 : X86::LEA64r))
111 .addOperand(Dest)
112 .addOperand(Src)
113 .addImm(1)
114 .addReg(0)
115 .addImm(0)
116 .addReg(0);
117 MFI->insert(MBBI, NewMI); // Insert the new inst
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000118 return NewMI;
119 }
120 case X86::ADD64ri32:
121 case X86::ADD64ri8:
122 case X86::ADD64ri32_DB:
123 case X86::ADD64ri8_DB:
124 case X86::ADD32ri:
125 case X86::ADD32ri8:
126 case X86::ADD32ri_DB:
127 case X86::ADD32ri8_DB:
128 case X86::ADD16ri:
129 case X86::ADD16ri8:
130 case X86::ADD16ri_DB:
131 case X86::ADD16ri8_DB:
132 if (!MI->getOperand(2).isImm()) {
133 // convertToThreeAddress will call getImm()
134 // which requires isImm() to be true
Craig Topper062a2ba2014-04-25 05:30:21 +0000135 return nullptr;
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000136 }
Preston Gurdf03a6e72013-09-30 23:51:22 +0000137 break;
Preston Gurdf0b62882013-09-30 23:18:42 +0000138 case X86::ADD16rr:
139 case X86::ADD16rr_DB:
140 if (MI->getOperand(1).getReg() != MI->getOperand(2).getReg()) {
141 // if src1 != src2, then convertToThreeAddress will
142 // need to create a Virtual register, which we cannot do
143 // after register allocation.
Craig Topper062a2ba2014-04-25 05:30:21 +0000144 return nullptr;
Preston Gurdf0b62882013-09-30 23:18:42 +0000145 }
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000146 }
Craig Topper062a2ba2014-04-25 05:30:21 +0000147 return TII->convertToThreeAddress(MFI, MBBI, nullptr);
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000148}
149
Eric Christopher31b81ce2014-06-03 21:01:35 +0000150FunctionPass *llvm::createX86FixupLEAs() { return new FixupLEAPass(); }
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000151
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000152bool FixupLEAPass::runOnMachineFunction(MachineFunction &Func) {
Eric Christophere0bd2fa2014-05-22 01:45:59 +0000153 TM = &Func.getTarget();
Eric Christopher0d5c99e2014-05-22 01:46:02 +0000154 const X86Subtarget &ST = TM->getSubtarget<X86Subtarget>();
155 if (!ST.LEAusesAG() && !ST.slowLEA())
156 return false;
157
Eric Christopher31b81ce2014-06-03 21:01:35 +0000158 TII = static_cast<const X86InstrInfo *>(TM->getInstrInfo());
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000159
160 DEBUG(dbgs() << "Start X86FixupLEAs\n";);
161 // Process all basic blocks.
162 for (MachineFunction::iterator I = Func.begin(), E = Func.end(); I != E; ++I)
163 processBasicBlock(Func, I);
164 DEBUG(dbgs() << "End X86FixupLEAs\n";);
165
166 return true;
167}
168
Eric Christopher31b81ce2014-06-03 21:01:35 +0000169FixupLEAPass::RegUsageState
170FixupLEAPass::usesRegister(MachineOperand &p, MachineBasicBlock::iterator I) {
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000171 RegUsageState RegUsage = RU_NotUsed;
Eric Christopher31b81ce2014-06-03 21:01:35 +0000172 MachineInstr *MI = I;
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000173
174 for (unsigned int i = 0; i < MI->getNumOperands(); ++i) {
Eric Christopher31b81ce2014-06-03 21:01:35 +0000175 MachineOperand &opnd = MI->getOperand(i);
176 if (opnd.isReg() && opnd.getReg() == p.getReg()) {
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000177 if (opnd.isDef())
178 return RU_Write;
179 RegUsage = RU_Read;
180 }
181 }
182 return RegUsage;
183}
184
185/// getPreviousInstr - Given a reference to an instruction in a basic
186/// block, return a reference to the previous instruction in the block,
187/// wrapping around to the last instruction of the block if the block
188/// branches to itself.
Eric Christopher31b81ce2014-06-03 21:01:35 +0000189static inline bool getPreviousInstr(MachineBasicBlock::iterator &I,
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000190 MachineFunction::iterator MFI) {
191 if (I == MFI->begin()) {
192 if (MFI->isPredecessor(MFI)) {
193 I = --MFI->end();
194 return true;
Eric Christopher31b81ce2014-06-03 21:01:35 +0000195 } else
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000196 return false;
197 }
198 --I;
199 return true;
200}
201
Eric Christopher31b81ce2014-06-03 21:01:35 +0000202MachineBasicBlock::iterator
203FixupLEAPass::searchBackwards(MachineOperand &p, MachineBasicBlock::iterator &I,
204 MachineFunction::iterator MFI) {
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000205 int InstrDistance = 1;
206 MachineBasicBlock::iterator CurInst;
207 static const int INSTR_DISTANCE_THRESHOLD = 5;
208
209 CurInst = I;
210 bool Found;
211 Found = getPreviousInstr(CurInst, MFI);
Eric Christopher31b81ce2014-06-03 21:01:35 +0000212 while (Found && I != CurInst) {
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000213 if (CurInst->isCall() || CurInst->isInlineAsm())
214 break;
215 if (InstrDistance > INSTR_DISTANCE_THRESHOLD)
216 break; // too far back to make a difference
Eric Christopher31b81ce2014-06-03 21:01:35 +0000217 if (usesRegister(p, CurInst) == RU_Write) {
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000218 return CurInst;
219 }
220 InstrDistance += TII->getInstrLatency(TM->getInstrItineraryData(), CurInst);
221 Found = getPreviousInstr(CurInst, MFI);
222 }
Craig Topper062a2ba2014-04-25 05:30:21 +0000223 return nullptr;
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000224}
225
Eric Christopher31b81ce2014-06-03 21:01:35 +0000226void FixupLEAPass::processInstruction(MachineBasicBlock::iterator &I,
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000227 MachineFunction::iterator MFI) {
228 // Process a load, store, or LEA instruction.
229 MachineInstr *MI = I;
230 int opcode = MI->getOpcode();
Eric Christopher31b81ce2014-06-03 21:01:35 +0000231 const MCInstrDesc &Desc = MI->getDesc();
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000232 int AddrOffset = X86II::getMemoryOperandNo(Desc.TSFlags, opcode);
233 if (AddrOffset >= 0) {
234 AddrOffset += X86II::getOperandBias(Desc);
Eric Christopher31b81ce2014-06-03 21:01:35 +0000235 MachineOperand &p = MI->getOperand(AddrOffset + X86::AddrBaseReg);
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000236 if (p.isReg() && p.getReg() != X86::ESP) {
237 seekLEAFixup(p, I, MFI);
238 }
Eric Christopher31b81ce2014-06-03 21:01:35 +0000239 MachineOperand &q = MI->getOperand(AddrOffset + X86::AddrIndexReg);
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000240 if (q.isReg() && q.getReg() != X86::ESP) {
241 seekLEAFixup(q, I, MFI);
242 }
243 }
244}
245
Eric Christopher31b81ce2014-06-03 21:01:35 +0000246void FixupLEAPass::seekLEAFixup(MachineOperand &p,
247 MachineBasicBlock::iterator &I,
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000248 MachineFunction::iterator MFI) {
249 MachineBasicBlock::iterator MBI = searchBackwards(p, I, MFI);
250 if (MBI) {
Eric Christopher31b81ce2014-06-03 21:01:35 +0000251 MachineInstr *NewMI = postRAConvertToLEA(MFI, MBI);
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000252 if (NewMI) {
253 ++NumLEAs;
Alexey Volkov6226de62014-05-20 08:55:50 +0000254 DEBUG(dbgs() << "FixLEA: Candidate to replace:"; MBI->dump(););
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000255 // now to replace with an equivalent LEA...
Alexey Volkov6226de62014-05-20 08:55:50 +0000256 DEBUG(dbgs() << "FixLEA: Replaced by: "; NewMI->dump(););
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000257 MFI->erase(MBI);
258 MachineBasicBlock::iterator J =
Eric Christopher31b81ce2014-06-03 21:01:35 +0000259 static_cast<MachineBasicBlock::iterator>(NewMI);
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000260 processInstruction(J, MFI);
261 }
262 }
263}
264
Alexey Volkov6226de62014-05-20 08:55:50 +0000265void FixupLEAPass::processInstructionForSLM(MachineBasicBlock::iterator &I,
266 MachineFunction::iterator MFI) {
267 MachineInstr *MI = I;
268 const int opcode = MI->getOpcode();
269 if (opcode != X86::LEA16r && opcode != X86::LEA32r && opcode != X86::LEA64r &&
270 opcode != X86::LEA64_32r)
271 return;
272 if (MI->getOperand(5).getReg() != 0 || !MI->getOperand(4).isImm() ||
273 !TII->isSafeToClobberEFLAGS(*MFI, I))
274 return;
275 const unsigned DstR = MI->getOperand(0).getReg();
276 const unsigned SrcR1 = MI->getOperand(1).getReg();
277 const unsigned SrcR2 = MI->getOperand(3).getReg();
278 if ((SrcR1 == 0 || SrcR1 != DstR) && (SrcR2 == 0 || SrcR2 != DstR))
279 return;
280 if (MI->getOperand(2).getImm() > 1)
281 return;
282 int addrr_opcode, addri_opcode;
283 switch (opcode) {
284 case X86::LEA16r:
285 addrr_opcode = X86::ADD16rr;
286 addri_opcode = X86::ADD16ri;
287 break;
288 case X86::LEA32r:
289 addrr_opcode = X86::ADD32rr;
290 addri_opcode = X86::ADD32ri;
291 break;
292 case X86::LEA64_32r:
293 case X86::LEA64r:
294 addrr_opcode = X86::ADD64rr;
295 addri_opcode = X86::ADD64ri32;
296 break;
297 default:
298 assert(false && "Unexpected LEA instruction");
299 }
300 DEBUG(dbgs() << "FixLEA: Candidate to replace:"; I->dump(););
301 DEBUG(dbgs() << "FixLEA: Replaced by: ";);
302 MachineInstr *NewMI = 0;
303 const MachineOperand &Dst = MI->getOperand(0);
304 // Make ADD instruction for two registers writing to LEA's destination
305 if (SrcR1 != 0 && SrcR2 != 0) {
306 const MachineOperand &Src1 = MI->getOperand(SrcR1 == DstR ? 1 : 3);
307 const MachineOperand &Src2 = MI->getOperand(SrcR1 == DstR ? 3 : 1);
308 NewMI = BuildMI(*MF, MI->getDebugLoc(), TII->get(addrr_opcode))
309 .addOperand(Dst)
310 .addOperand(Src1)
311 .addOperand(Src2);
312 MFI->insert(I, NewMI);
313 DEBUG(NewMI->dump(););
314 }
315 // Make ADD instruction for immediate
316 if (MI->getOperand(4).getImm() != 0) {
317 const MachineOperand &SrcR = MI->getOperand(SrcR1 == DstR ? 1 : 3);
318 NewMI = BuildMI(*MF, MI->getDebugLoc(), TII->get(addri_opcode))
319 .addOperand(Dst)
320 .addOperand(SrcR)
321 .addImm(MI->getOperand(4).getImm());
322 MFI->insert(I, NewMI);
323 DEBUG(NewMI->dump(););
324 }
325 if (NewMI) {
326 MFI->erase(I);
327 I = static_cast<MachineBasicBlock::iterator>(NewMI);
328 }
329}
330
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000331bool FixupLEAPass::processBasicBlock(MachineFunction &MF,
332 MachineFunction::iterator MFI) {
333
Alexey Volkov6226de62014-05-20 08:55:50 +0000334 for (MachineBasicBlock::iterator I = MFI->begin(); I != MFI->end(); ++I) {
335 if (TM->getSubtarget<X86Subtarget>().isSLM())
336 processInstructionForSLM(I, MFI);
337 else
338 processInstruction(I, MFI);
339 }
Preston Gurd8b7ab4b2013-04-25 20:29:37 +0000340 return false;
341}