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gerrit-public.fairphone.software / toolchain / llvm-project / 31ccb51a7f1b6fddaa684095d78c4532598cf51d / . / llvm / test / CodeGen / AArch64 / bool-loads.ll
blob: b0ee1b4aec54c52f16434cb30eea6922e47cd23c [file] [log] [blame]
Tim Northover3b0846e2014-05-24 12:50:23 +0000[diff] [blame]1; RUN: llc -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]2
3@var = global i1 0
4
5define i32 @test_sextloadi32() {
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]6; CHECK-LABEL: test_sextloadi32
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]7
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]8 %val = load i1, i1* @var
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]9 %ret = sext i1 %val to i32
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]10; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
Bradley Smith672df152014-04-25 10:25:29 +0000[diff] [blame]11; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1|sbfx w[0-9]+, w[0-9]+, #0, #1}}
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]12
13 ret i32 %ret
14; CHECK: ret
15}
16
17define i64 @test_sextloadi64() {
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]18; CHECK-LABEL: test_sextloadi64
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]19
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]20 %val = load i1, i1* @var
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]21 %ret = sext i1 %val to i64
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]22; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
Bradley Smith672df152014-04-25 10:25:29 +0000[diff] [blame]23; CHECK: {{sbfx x[0-9]+, x[0-9]+, #0, #1}}
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]24
25 ret i64 %ret
26; CHECK: ret
27}
28
29define i32 @test_zextloadi32() {
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]30; CHECK-LABEL: test_zextloadi32
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]31
32; It's not actually necessary that "ret" is next, but as far as LLVM
33; is concerned only 0 or 1 should be loadable so no extension is
34; necessary.
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]35 %val = load i1, i1* @var
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]36 %ret = zext i1 %val to i32
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]37; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]38
39 ret i32 %ret
40; CHECK-NEXT: ret
41}
42
43define i64 @test_zextloadi64() {
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]44; CHECK-LABEL: test_zextloadi64
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]45
46; It's not actually necessary that "ret" is next, but as far as LLVM
47; is concerned only 0 or 1 should be loadable so no extension is
48; necessary.
David Blaikiea79ac142015-02-27 21:17:42 +0000[diff] [blame]49 %val = load i1, i1* @var
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]50 %ret = zext i1 %val to i64
Tim Northoverc398cd52014-04-14 12:50:58 +0000[diff] [blame]51; CHECK: ldrb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var]
Tim Northovere0e3aef2013-01-31 12:12:40 +0000[diff] [blame]52
53 ret i64 %ret
54; CHECK-NEXT: ret
55}