blob: 53d032c1b472515d71712dc83ab1a00392ba329b [file] [log] [blame]
Matt Arsenault13623d02014-08-15 18:42:18 +00001; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2
3; FIXME: Check something here. Currently it seems fabs + fneg aren't
4; into 2 modifiers, although theoretically that should work.
5
Tom Stellard79243d92014-10-01 17:15:17 +00006; FUNC-LABEL: {{^}}fneg_fabs_fadd_f64:
Matt Arsenaultfabf5452014-08-15 18:42:22 +00007; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x7fffffff
8; SI: V_AND_B32_e32 v[[FABS:[0-9]+]], {{s[0-9]+}}, [[IMMREG]]
Matt Arsenault13623d02014-08-15 18:42:18 +00009; SI: V_ADD_F64 {{v\[[0-9]+:[0-9]+\]}}, {{v\[[0-9]+:[0-9]+\]}}, -v{{\[[0-9]+}}:[[FABS]]{{\]}}
10define void @fneg_fabs_fadd_f64(double addrspace(1)* %out, double %x, double %y) {
11 %fabs = call double @llvm.fabs.f64(double %x)
12 %fsub = fsub double -0.000000e+00, %fabs
13 %fadd = fadd double %y, %fsub
14 store double %fadd, double addrspace(1)* %out, align 8
15 ret void
16}
17
18define void @v_fneg_fabs_fadd_f64(double addrspace(1)* %out, double addrspace(1)* %xptr, double addrspace(1)* %yptr) {
19 %x = load double addrspace(1)* %xptr, align 8
20 %y = load double addrspace(1)* %xptr, align 8
21 %fabs = call double @llvm.fabs.f64(double %x)
22 %fsub = fsub double -0.000000e+00, %fabs
23 %fadd = fadd double %y, %fsub
24 store double %fadd, double addrspace(1)* %out, align 8
25 ret void
26}
27
Tom Stellard79243d92014-10-01 17:15:17 +000028; FUNC-LABEL: {{^}}fneg_fabs_fmul_f64:
Matt Arsenault13623d02014-08-15 18:42:18 +000029; SI: V_MUL_F64 {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, -|{{v\[[0-9]+:[0-9]+\]}}|
30define void @fneg_fabs_fmul_f64(double addrspace(1)* %out, double %x, double %y) {
31 %fabs = call double @llvm.fabs.f64(double %x)
32 %fsub = fsub double -0.000000e+00, %fabs
33 %fmul = fmul double %y, %fsub
34 store double %fmul, double addrspace(1)* %out, align 8
35 ret void
36}
37
Tom Stellard79243d92014-10-01 17:15:17 +000038; FUNC-LABEL: {{^}}fneg_fabs_free_f64:
Matt Arsenault13623d02014-08-15 18:42:18 +000039define void @fneg_fabs_free_f64(double addrspace(1)* %out, i64 %in) {
40 %bc = bitcast i64 %in to double
41 %fabs = call double @llvm.fabs.f64(double %bc)
42 %fsub = fsub double -0.000000e+00, %fabs
43 store double %fsub, double addrspace(1)* %out
44 ret void
45}
46
Tom Stellard79243d92014-10-01 17:15:17 +000047; FUNC-LABEL: {{^}}fneg_fabs_fn_free_f64:
Matt Arsenaultfabf5452014-08-15 18:42:22 +000048; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
49; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
Matt Arsenault13623d02014-08-15 18:42:18 +000050define void @fneg_fabs_fn_free_f64(double addrspace(1)* %out, i64 %in) {
51 %bc = bitcast i64 %in to double
52 %fabs = call double @fabs(double %bc)
53 %fsub = fsub double -0.000000e+00, %fabs
54 store double %fsub, double addrspace(1)* %out
55 ret void
56}
57
Tom Stellard79243d92014-10-01 17:15:17 +000058; FUNC-LABEL: {{^}}fneg_fabs_f64:
Matt Arsenaultfabf5452014-08-15 18:42:22 +000059; SI: S_LOAD_DWORDX2
60; SI: S_LOAD_DWORDX2 s{{\[}}[[LO_X:[0-9]+]]:[[HI_X:[0-9]+]]{{\]}}
61; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
62; SI-DAG: V_OR_B32_e32 v[[HI_V:[0-9]+]], s[[HI_X]], [[IMMREG]]
63; SI-DAG: V_MOV_B32_e32 v[[LO_V:[0-9]+]], s[[LO_X]]
64; SI: BUFFER_STORE_DWORDX2 v{{\[}}[[LO_V]]:[[HI_V]]{{\]}}
Matt Arsenault13623d02014-08-15 18:42:18 +000065define void @fneg_fabs_f64(double addrspace(1)* %out, double %in) {
66 %fabs = call double @llvm.fabs.f64(double %in)
67 %fsub = fsub double -0.000000e+00, %fabs
68 store double %fsub, double addrspace(1)* %out, align 8
69 ret void
70}
71
Tom Stellard79243d92014-10-01 17:15:17 +000072; FUNC-LABEL: {{^}}fneg_fabs_v2f64:
Matt Arsenaultfabf5452014-08-15 18:42:22 +000073; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
74; SI-NOT: 0x80000000
75; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
76; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
Matt Arsenault13623d02014-08-15 18:42:18 +000077define void @fneg_fabs_v2f64(<2 x double> addrspace(1)* %out, <2 x double> %in) {
78 %fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %in)
79 %fsub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %fabs
80 store <2 x double> %fsub, <2 x double> addrspace(1)* %out
81 ret void
82}
83
Tom Stellard79243d92014-10-01 17:15:17 +000084; FUNC-LABEL: {{^}}fneg_fabs_v4f64:
Matt Arsenaultfabf5452014-08-15 18:42:22 +000085; SI: V_MOV_B32_e32 [[IMMREG:v[0-9]+]], 0x80000000
86; SI-NOT: 0x80000000
87; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
88; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
89; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
90; SI: V_OR_B32_e32 v{{[0-9]+}}, s{{[0-9]+}}, [[IMMREG]]
Matt Arsenault13623d02014-08-15 18:42:18 +000091define void @fneg_fabs_v4f64(<4 x double> addrspace(1)* %out, <4 x double> %in) {
92 %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)
93 %fsub = fsub <4 x double> <double -0.000000e+00, double -0.000000e+00, double -0.000000e+00, double -0.000000e+00>, %fabs
94 store <4 x double> %fsub, <4 x double> addrspace(1)* %out
95 ret void
96}
97
98declare double @fabs(double) readnone
99declare double @llvm.fabs.f64(double) readnone
100declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone
101declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone