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gerrit-public.fairphone.software / toolchain / llvm-project / 57ad8f4730c982813c6f4672c45f4b73f0f0d79f / . / llvm / test / CodeGen / X86 / vector-reduce-or-cmp.ll
blob: 2cb2a07c1e568716fdc325da9e4a19ab9bbe32bd [file] [log] [blame]
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
8
9;
10; vXi64
11;
12
13define i1 @test_v2i64(<2 x i64> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]14; SSE-LABEL: test_v2i64:
15; SSE: # %bb.0:
16; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
17; SSE-NEXT: por %xmm0, %xmm1
18; SSE-NEXT: movq %xmm1, %rax
19; SSE-NEXT: testq %rax, %rax
20; SSE-NEXT: sete %al
21; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]22;
23; AVX-LABEL: test_v2i64:
24; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]25; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
26; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
27; AVX-NEXT: vmovq %xmm0, %rax
28; AVX-NEXT: testq %rax, %rax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]29; AVX-NEXT: sete %al
30; AVX-NEXT: retq
31 %1 = call i64 @llvm.experimental.vector.reduce.or.v2i64(<2 x i64> %a0)
32 %2 = icmp eq i64 %1, 0
33 ret i1 %2
34}
35
36define i1 @test_v4i64(<4 x i64> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]37; SSE-LABEL: test_v4i64:
38; SSE: # %bb.0:
39; SSE-NEXT: por %xmm1, %xmm0
40; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
41; SSE-NEXT: por %xmm0, %xmm1
42; SSE-NEXT: movq %xmm1, %rax
43; SSE-NEXT: testq %rax, %rax
44; SSE-NEXT: setne %al
45; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]46;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]47; AVX1-LABEL: test_v4i64:
48; AVX1: # %bb.0:
49; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
50; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
51; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
52; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
53; AVX1-NEXT: vmovq %xmm0, %rax
54; AVX1-NEXT: testq %rax, %rax
55; AVX1-NEXT: setne %al
56; AVX1-NEXT: vzeroupper
57; AVX1-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]58;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]59; AVX2-LABEL: test_v4i64:
60; AVX2: # %bb.0:
61; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
62; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
63; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
64; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
65; AVX2-NEXT: vmovq %xmm0, %rax
66; AVX2-NEXT: testq %rax, %rax
67; AVX2-NEXT: setne %al
68; AVX2-NEXT: vzeroupper
69; AVX2-NEXT: retq
70;
71; AVX512-LABEL: test_v4i64:
72; AVX512: # %bb.0:
73; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
74; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
75; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
76; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
77; AVX512-NEXT: vmovq %xmm0, %rax
78; AVX512-NEXT: testq %rax, %rax
79; AVX512-NEXT: setne %al
80; AVX512-NEXT: vzeroupper
81; AVX512-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]82 %1 = call i64 @llvm.experimental.vector.reduce.or.v4i64(<4 x i64> %a0)
83 %2 = icmp ne i64 %1, 0
84 ret i1 %2
85}
86
87define i1 @test_v8i64(<8 x i64> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]88; SSE-LABEL: test_v8i64:
89; SSE: # %bb.0:
90; SSE-NEXT: por %xmm3, %xmm1
91; SSE-NEXT: por %xmm2, %xmm1
92; SSE-NEXT: por %xmm0, %xmm1
93; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
94; SSE-NEXT: por %xmm1, %xmm0
95; SSE-NEXT: movq %xmm0, %rax
96; SSE-NEXT: testq %rax, %rax
97; SSE-NEXT: sete %al
98; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]99;
100; AVX1-LABEL: test_v8i64:
101; AVX1: # %bb.0:
102; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]103; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
104; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
105; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
106; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
107; AVX1-NEXT: vmovq %xmm0, %rax
108; AVX1-NEXT: testq %rax, %rax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]109; AVX1-NEXT: sete %al
110; AVX1-NEXT: vzeroupper
111; AVX1-NEXT: retq
112;
113; AVX2-LABEL: test_v8i64:
114; AVX2: # %bb.0:
115; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]116; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
117; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
118; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
119; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
120; AVX2-NEXT: vmovq %xmm0, %rax
121; AVX2-NEXT: testq %rax, %rax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]122; AVX2-NEXT: sete %al
123; AVX2-NEXT: vzeroupper
124; AVX2-NEXT: retq
125;
126; AVX512-LABEL: test_v8i64:
127; AVX512: # %bb.0:
128; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]129; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
130; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
131; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
132; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
133; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
134; AVX512-NEXT: vmovq %xmm0, %rax
135; AVX512-NEXT: testq %rax, %rax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]136; AVX512-NEXT: sete %al
137; AVX512-NEXT: vzeroupper
138; AVX512-NEXT: retq
139 %1 = call i64 @llvm.experimental.vector.reduce.or.v8i64(<8 x i64> %a0)
140 %2 = icmp eq i64 %1, 0
141 ret i1 %2
142}
143
144define i1 @test_v16i64(<16 x i64> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]145; SSE-LABEL: test_v16i64:
146; SSE: # %bb.0:
147; SSE-NEXT: por %xmm6, %xmm2
148; SSE-NEXT: por %xmm7, %xmm3
149; SSE-NEXT: por %xmm5, %xmm3
150; SSE-NEXT: por %xmm1, %xmm3
151; SSE-NEXT: por %xmm4, %xmm2
152; SSE-NEXT: por %xmm3, %xmm2
153; SSE-NEXT: por %xmm0, %xmm2
154; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
155; SSE-NEXT: por %xmm2, %xmm0
156; SSE-NEXT: movq %xmm0, %rax
157; SSE-NEXT: testq %rax, %rax
158; SSE-NEXT: setne %al
159; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]160;
161; AVX1-LABEL: test_v16i64:
162; AVX1: # %bb.0:
163; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1
164; AVX1-NEXT: vorps %ymm1, %ymm2, %ymm1
165; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]166; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
167; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
168; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
169; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
170; AVX1-NEXT: vmovq %xmm0, %rax
171; AVX1-NEXT: testq %rax, %rax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]172; AVX1-NEXT: setne %al
173; AVX1-NEXT: vzeroupper
174; AVX1-NEXT: retq
175;
176; AVX2-LABEL: test_v16i64:
177; AVX2: # %bb.0:
178; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1
179; AVX2-NEXT: vpor %ymm1, %ymm2, %ymm1
180; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]181; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
182; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
183; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
184; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
185; AVX2-NEXT: vmovq %xmm0, %rax
186; AVX2-NEXT: testq %rax, %rax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]187; AVX2-NEXT: setne %al
188; AVX2-NEXT: vzeroupper
189; AVX2-NEXT: retq
190;
191; AVX512-LABEL: test_v16i64:
192; AVX512: # %bb.0:
193; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
194; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]195; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
196; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
197; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
198; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
199; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
200; AVX512-NEXT: vmovq %xmm0, %rax
201; AVX512-NEXT: testq %rax, %rax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]202; AVX512-NEXT: setne %al
203; AVX512-NEXT: vzeroupper
204; AVX512-NEXT: retq
205 %1 = call i64 @llvm.experimental.vector.reduce.or.v16i64(<16 x i64> %a0)
206 %2 = icmp ne i64 %1, 0
207 ret i1 %2
208}
209
210;
211; vXi32
212;
213
214define i1 @test_v2i32(<2 x i32> %a0) {
215; SSE-LABEL: test_v2i32:
216; SSE: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]217; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
218; SSE-NEXT: por %xmm0, %xmm1
219; SSE-NEXT: movd %xmm1, %eax
220; SSE-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]221; SSE-NEXT: sete %al
222; SSE-NEXT: retq
223;
224; AVX-LABEL: test_v2i32:
225; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]226; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
227; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
228; AVX-NEXT: vmovd %xmm0, %eax
229; AVX-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]230; AVX-NEXT: sete %al
231; AVX-NEXT: retq
232 %1 = call i32 @llvm.experimental.vector.reduce.or.v2i32(<2 x i32> %a0)
233 %2 = icmp eq i32 %1, 0
234 ret i1 %2
235}
236
237define i1 @test_v4i32(<4 x i32> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]238; SSE-LABEL: test_v4i32:
239; SSE: # %bb.0:
240; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
241; SSE-NEXT: por %xmm0, %xmm1
242; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
243; SSE-NEXT: por %xmm1, %xmm0
244; SSE-NEXT: movd %xmm0, %eax
245; SSE-NEXT: testl %eax, %eax
246; SSE-NEXT: setne %al
247; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]248;
249; AVX-LABEL: test_v4i32:
250; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]251; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
252; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
253; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
254; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
255; AVX-NEXT: vmovd %xmm0, %eax
256; AVX-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]257; AVX-NEXT: setne %al
258; AVX-NEXT: retq
259 %1 = call i32 @llvm.experimental.vector.reduce.or.v4i32(<4 x i32> %a0)
260 %2 = icmp ne i32 %1, 0
261 ret i1 %2
262}
263
264define i1 @test_v8i32(<8 x i32> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]265; SSE-LABEL: test_v8i32:
266; SSE: # %bb.0:
267; SSE-NEXT: por %xmm1, %xmm0
268; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
269; SSE-NEXT: por %xmm0, %xmm1
270; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
271; SSE-NEXT: por %xmm1, %xmm0
272; SSE-NEXT: movd %xmm0, %eax
273; SSE-NEXT: testl %eax, %eax
274; SSE-NEXT: sete %al
275; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]276;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]277; AVX1-LABEL: test_v8i32:
278; AVX1: # %bb.0:
279; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
280; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
281; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
282; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
283; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
284; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
285; AVX1-NEXT: vmovd %xmm0, %eax
286; AVX1-NEXT: testl %eax, %eax
287; AVX1-NEXT: sete %al
288; AVX1-NEXT: vzeroupper
289; AVX1-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]290;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]291; AVX2-LABEL: test_v8i32:
292; AVX2: # %bb.0:
293; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
294; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
295; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
296; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
297; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
298; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
299; AVX2-NEXT: vmovd %xmm0, %eax
300; AVX2-NEXT: testl %eax, %eax
301; AVX2-NEXT: sete %al
302; AVX2-NEXT: vzeroupper
303; AVX2-NEXT: retq
304;
305; AVX512-LABEL: test_v8i32:
306; AVX512: # %bb.0:
307; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
308; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
309; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
310; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
311; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
312; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
313; AVX512-NEXT: vmovd %xmm0, %eax
314; AVX512-NEXT: testl %eax, %eax
315; AVX512-NEXT: sete %al
316; AVX512-NEXT: vzeroupper
317; AVX512-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]318 %1 = call i32 @llvm.experimental.vector.reduce.or.v8i32(<8 x i32> %a0)
319 %2 = icmp eq i32 %1, 0
320 ret i1 %2
321}
322
323define i1 @test_v16i32(<16 x i32> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]324; SSE-LABEL: test_v16i32:
325; SSE: # %bb.0:
326; SSE-NEXT: por %xmm3, %xmm1
327; SSE-NEXT: por %xmm2, %xmm1
328; SSE-NEXT: por %xmm0, %xmm1
329; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
330; SSE-NEXT: por %xmm1, %xmm0
331; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
332; SSE-NEXT: por %xmm0, %xmm1
333; SSE-NEXT: movd %xmm1, %eax
334; SSE-NEXT: testl %eax, %eax
335; SSE-NEXT: setne %al
336; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]337;
338; AVX1-LABEL: test_v16i32:
339; AVX1: # %bb.0:
340; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]341; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
342; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
343; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
344; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
345; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
346; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
347; AVX1-NEXT: vmovd %xmm0, %eax
348; AVX1-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]349; AVX1-NEXT: setne %al
350; AVX1-NEXT: vzeroupper
351; AVX1-NEXT: retq
352;
353; AVX2-LABEL: test_v16i32:
354; AVX2: # %bb.0:
355; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]356; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
357; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
358; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
359; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
360; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
361; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
362; AVX2-NEXT: vmovd %xmm0, %eax
363; AVX2-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]364; AVX2-NEXT: setne %al
365; AVX2-NEXT: vzeroupper
366; AVX2-NEXT: retq
367;
368; AVX512-LABEL: test_v16i32:
369; AVX512: # %bb.0:
370; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]371; AVX512-NEXT: vpord %zmm1, %zmm0, %zmm0
372; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
373; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
374; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
375; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
376; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
377; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
378; AVX512-NEXT: vmovd %xmm0, %eax
379; AVX512-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]380; AVX512-NEXT: setne %al
381; AVX512-NEXT: vzeroupper
382; AVX512-NEXT: retq
383 %1 = call i32 @llvm.experimental.vector.reduce.or.v16i32(<16 x i32> %a0)
384 %2 = icmp ne i32 %1, 0
385 ret i1 %2
386}
387
388define i1 @test_v32i32(<32 x i32> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]389; SSE-LABEL: test_v32i32:
390; SSE: # %bb.0:
391; SSE-NEXT: por %xmm6, %xmm2
392; SSE-NEXT: por %xmm7, %xmm3
393; SSE-NEXT: por %xmm5, %xmm3
394; SSE-NEXT: por %xmm1, %xmm3
395; SSE-NEXT: por %xmm4, %xmm2
396; SSE-NEXT: por %xmm3, %xmm2
397; SSE-NEXT: por %xmm0, %xmm2
398; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
399; SSE-NEXT: por %xmm2, %xmm0
400; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
401; SSE-NEXT: por %xmm0, %xmm1
402; SSE-NEXT: movd %xmm1, %eax
403; SSE-NEXT: testl %eax, %eax
404; SSE-NEXT: sete %al
405; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]406;
407; AVX1-LABEL: test_v32i32:
408; AVX1: # %bb.0:
409; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1
410; AVX1-NEXT: vorps %ymm1, %ymm2, %ymm1
411; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]412; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
413; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
414; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
415; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
416; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
417; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
418; AVX1-NEXT: vmovd %xmm0, %eax
419; AVX1-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]420; AVX1-NEXT: sete %al
421; AVX1-NEXT: vzeroupper
422; AVX1-NEXT: retq
423;
424; AVX2-LABEL: test_v32i32:
425; AVX2: # %bb.0:
426; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1
427; AVX2-NEXT: vpor %ymm1, %ymm2, %ymm1
428; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]429; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
430; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
431; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
432; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
433; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
434; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
435; AVX2-NEXT: vmovd %xmm0, %eax
436; AVX2-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]437; AVX2-NEXT: sete %al
438; AVX2-NEXT: vzeroupper
439; AVX2-NEXT: retq
440;
441; AVX512-LABEL: test_v32i32:
442; AVX512: # %bb.0:
443; AVX512-NEXT: vpord %zmm1, %zmm0, %zmm0
444; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]445; AVX512-NEXT: vpord %zmm1, %zmm0, %zmm0
446; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
447; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
448; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
449; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
450; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
451; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
452; AVX512-NEXT: vmovd %xmm0, %eax
453; AVX512-NEXT: testl %eax, %eax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]454; AVX512-NEXT: sete %al
455; AVX512-NEXT: vzeroupper
456; AVX512-NEXT: retq
457 %1 = call i32 @llvm.experimental.vector.reduce.or.v32i32(<32 x i32> %a0)
458 %2 = icmp eq i32 %1, 0
459 ret i1 %2
460}
461
462;
463; vXi16
464;
465
466define i1 @test_v2i16(<2 x i16> %a0) {
467; SSE-LABEL: test_v2i16:
468; SSE: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]469; SSE-NEXT: movdqa %xmm0, %xmm1
470; SSE-NEXT: psrld $16, %xmm1
471; SSE-NEXT: por %xmm0, %xmm1
472; SSE-NEXT: movd %xmm1, %eax
473; SSE-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]474; SSE-NEXT: sete %al
475; SSE-NEXT: retq
476;
477; AVX-LABEL: test_v2i16:
478; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]479; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
480; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]481; AVX-NEXT: vmovd %xmm0, %eax
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]482; AVX-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]483; AVX-NEXT: sete %al
484; AVX-NEXT: retq
485 %1 = call i16 @llvm.experimental.vector.reduce.or.v2i16(<2 x i16> %a0)
486 %2 = icmp eq i16 %1, 0
487 ret i1 %2
488}
489
490define i1 @test_v4i16(<4 x i16> %a0) {
491; SSE-LABEL: test_v4i16:
492; SSE: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]493; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
494; SSE-NEXT: por %xmm0, %xmm1
495; SSE-NEXT: movdqa %xmm1, %xmm0
496; SSE-NEXT: psrld $16, %xmm0
497; SSE-NEXT: por %xmm1, %xmm0
498; SSE-NEXT: movd %xmm0, %eax
499; SSE-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]500; SSE-NEXT: setne %al
501; SSE-NEXT: retq
502;
503; AVX-LABEL: test_v4i16:
504; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]505; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
506; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
507; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
508; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
509; AVX-NEXT: vmovd %xmm0, %eax
510; AVX-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]511; AVX-NEXT: setne %al
512; AVX-NEXT: retq
513 %1 = call i16 @llvm.experimental.vector.reduce.or.v4i16(<4 x i16> %a0)
514 %2 = icmp ne i16 %1, 0
515 ret i1 %2
516}
517
518define i1 @test_v8i16(<8 x i16> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]519; SSE-LABEL: test_v8i16:
520; SSE: # %bb.0:
521; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
522; SSE-NEXT: por %xmm0, %xmm1
523; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
524; SSE-NEXT: por %xmm1, %xmm0
525; SSE-NEXT: movdqa %xmm0, %xmm1
526; SSE-NEXT: psrld $16, %xmm1
527; SSE-NEXT: por %xmm0, %xmm1
528; SSE-NEXT: movd %xmm1, %eax
529; SSE-NEXT: testw %ax, %ax
530; SSE-NEXT: sete %al
531; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]532;
533; AVX-LABEL: test_v8i16:
534; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]535; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
536; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
537; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
538; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
539; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
540; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
541; AVX-NEXT: vmovd %xmm0, %eax
542; AVX-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]543; AVX-NEXT: sete %al
544; AVX-NEXT: retq
545 %1 = call i16 @llvm.experimental.vector.reduce.or.v8i16(<8 x i16> %a0)
546 %2 = icmp eq i16 %1, 0
547 ret i1 %2
548}
549
550define i1 @test_v16i16(<16 x i16> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]551; SSE-LABEL: test_v16i16:
552; SSE: # %bb.0:
553; SSE-NEXT: por %xmm1, %xmm0
554; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
555; SSE-NEXT: por %xmm0, %xmm1
556; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
557; SSE-NEXT: por %xmm1, %xmm0
558; SSE-NEXT: movdqa %xmm0, %xmm1
559; SSE-NEXT: psrld $16, %xmm1
560; SSE-NEXT: por %xmm0, %xmm1
561; SSE-NEXT: movd %xmm1, %eax
562; SSE-NEXT: testw %ax, %ax
563; SSE-NEXT: setne %al
564; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]565;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]566; AVX1-LABEL: test_v16i16:
567; AVX1: # %bb.0:
568; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
569; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
570; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
571; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
572; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
573; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
574; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
575; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
576; AVX1-NEXT: vmovd %xmm0, %eax
577; AVX1-NEXT: testw %ax, %ax
578; AVX1-NEXT: setne %al
579; AVX1-NEXT: vzeroupper
580; AVX1-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]581;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]582; AVX2-LABEL: test_v16i16:
583; AVX2: # %bb.0:
584; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
585; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
586; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
587; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
588; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
589; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
590; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
591; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
592; AVX2-NEXT: vmovd %xmm0, %eax
593; AVX2-NEXT: testw %ax, %ax
594; AVX2-NEXT: setne %al
595; AVX2-NEXT: vzeroupper
596; AVX2-NEXT: retq
597;
598; AVX512-LABEL: test_v16i16:
599; AVX512: # %bb.0:
600; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
601; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
602; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
603; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
604; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
605; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
606; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
607; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
608; AVX512-NEXT: vmovd %xmm0, %eax
609; AVX512-NEXT: testw %ax, %ax
610; AVX512-NEXT: setne %al
611; AVX512-NEXT: vzeroupper
612; AVX512-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]613 %1 = call i16 @llvm.experimental.vector.reduce.or.v16i16(<16 x i16> %a0)
614 %2 = icmp ne i16 %1, 0
615 ret i1 %2
616}
617
618define i1 @test_v32i16(<32 x i16> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]619; SSE-LABEL: test_v32i16:
620; SSE: # %bb.0:
621; SSE-NEXT: por %xmm3, %xmm1
622; SSE-NEXT: por %xmm2, %xmm1
623; SSE-NEXT: por %xmm0, %xmm1
624; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
625; SSE-NEXT: por %xmm1, %xmm0
626; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
627; SSE-NEXT: por %xmm0, %xmm1
628; SSE-NEXT: movdqa %xmm1, %xmm0
629; SSE-NEXT: psrld $16, %xmm0
630; SSE-NEXT: por %xmm1, %xmm0
631; SSE-NEXT: movd %xmm0, %eax
632; SSE-NEXT: testw %ax, %ax
633; SSE-NEXT: sete %al
634; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]635;
636; AVX1-LABEL: test_v32i16:
637; AVX1: # %bb.0:
638; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]639; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
640; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
641; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
642; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
643; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
644; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
645; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
646; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
647; AVX1-NEXT: vmovd %xmm0, %eax
648; AVX1-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]649; AVX1-NEXT: sete %al
650; AVX1-NEXT: vzeroupper
651; AVX1-NEXT: retq
652;
653; AVX2-LABEL: test_v32i16:
654; AVX2: # %bb.0:
655; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]656; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
657; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
658; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
659; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
660; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
661; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
662; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
663; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
664; AVX2-NEXT: vmovd %xmm0, %eax
665; AVX2-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]666; AVX2-NEXT: sete %al
667; AVX2-NEXT: vzeroupper
668; AVX2-NEXT: retq
669;
670; AVX512-LABEL: test_v32i16:
671; AVX512: # %bb.0:
672; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]673; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
674; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
675; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
676; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
677; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
678; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
679; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
680; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
681; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
682; AVX512-NEXT: vmovd %xmm0, %eax
683; AVX512-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]684; AVX512-NEXT: sete %al
685; AVX512-NEXT: vzeroupper
686; AVX512-NEXT: retq
687 %1 = call i16 @llvm.experimental.vector.reduce.or.v32i16(<32 x i16> %a0)
688 %2 = icmp eq i16 %1, 0
689 ret i1 %2
690}
691
692define i1 @test_v64i16(<64 x i16> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]693; SSE-LABEL: test_v64i16:
694; SSE: # %bb.0:
695; SSE-NEXT: por %xmm6, %xmm2
696; SSE-NEXT: por %xmm7, %xmm3
697; SSE-NEXT: por %xmm5, %xmm3
698; SSE-NEXT: por %xmm1, %xmm3
699; SSE-NEXT: por %xmm4, %xmm2
700; SSE-NEXT: por %xmm3, %xmm2
701; SSE-NEXT: por %xmm0, %xmm2
702; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
703; SSE-NEXT: por %xmm2, %xmm0
704; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
705; SSE-NEXT: por %xmm0, %xmm1
706; SSE-NEXT: movdqa %xmm1, %xmm0
707; SSE-NEXT: psrld $16, %xmm0
708; SSE-NEXT: por %xmm1, %xmm0
709; SSE-NEXT: movd %xmm0, %eax
710; SSE-NEXT: testw %ax, %ax
711; SSE-NEXT: setne %al
712; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]713;
714; AVX1-LABEL: test_v64i16:
715; AVX1: # %bb.0:
716; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1
717; AVX1-NEXT: vorps %ymm1, %ymm2, %ymm1
718; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]719; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
720; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
721; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
722; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
723; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
724; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
725; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
726; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
727; AVX1-NEXT: vmovd %xmm0, %eax
728; AVX1-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]729; AVX1-NEXT: setne %al
730; AVX1-NEXT: vzeroupper
731; AVX1-NEXT: retq
732;
733; AVX2-LABEL: test_v64i16:
734; AVX2: # %bb.0:
735; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1
736; AVX2-NEXT: vpor %ymm1, %ymm2, %ymm1
737; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]738; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
739; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
740; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
741; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
742; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
743; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
744; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
745; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
746; AVX2-NEXT: vmovd %xmm0, %eax
747; AVX2-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]748; AVX2-NEXT: setne %al
749; AVX2-NEXT: vzeroupper
750; AVX2-NEXT: retq
751;
752; AVX512-LABEL: test_v64i16:
753; AVX512: # %bb.0:
754; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
755; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]756; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
757; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
758; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
759; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
760; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
761; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
762; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
763; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
764; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
765; AVX512-NEXT: vmovd %xmm0, %eax
766; AVX512-NEXT: testw %ax, %ax
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]767; AVX512-NEXT: setne %al
768; AVX512-NEXT: vzeroupper
769; AVX512-NEXT: retq
770 %1 = call i16 @llvm.experimental.vector.reduce.or.v64i16(<64 x i16> %a0)
771 %2 = icmp ne i16 %1, 0
772 ret i1 %2
773}
774
775;
776; vXi8
777;
778
779define i1 @test_v2i8(<2 x i8> %a0) {
780; SSE-LABEL: test_v2i8:
781; SSE: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]782; SSE-NEXT: movdqa %xmm0, %xmm1
783; SSE-NEXT: psrlw $8, %xmm1
784; SSE-NEXT: por %xmm0, %xmm1
785; SSE-NEXT: movd %xmm1, %eax
786; SSE-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]787; SSE-NEXT: sete %al
788; SSE-NEXT: retq
789;
790; AVX-LABEL: test_v2i8:
791; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]792; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
793; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]794; AVX-NEXT: vmovd %xmm0, %eax
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]795; AVX-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]796; AVX-NEXT: sete %al
797; AVX-NEXT: retq
798 %1 = call i8 @llvm.experimental.vector.reduce.or.v2i8(<2 x i8> %a0)
799 %2 = icmp eq i8 %1, 0
800 ret i1 %2
801}
802
803define i1 @test_v4i8(<4 x i8> %a0) {
804; SSE-LABEL: test_v4i8:
805; SSE: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]806; SSE-NEXT: movdqa %xmm0, %xmm1
807; SSE-NEXT: psrld $16, %xmm1
808; SSE-NEXT: por %xmm0, %xmm1
809; SSE-NEXT: movdqa %xmm1, %xmm0
810; SSE-NEXT: psrlw $8, %xmm0
811; SSE-NEXT: por %xmm1, %xmm0
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]812; SSE-NEXT: movd %xmm0, %eax
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]813; SSE-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]814; SSE-NEXT: setne %al
815; SSE-NEXT: retq
816;
817; AVX-LABEL: test_v4i8:
818; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]819; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
820; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
821; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
822; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]823; AVX-NEXT: vmovd %xmm0, %eax
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]824; AVX-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]825; AVX-NEXT: setne %al
826; AVX-NEXT: retq
827 %1 = call i8 @llvm.experimental.vector.reduce.or.v4i8(<4 x i8> %a0)
828 %2 = icmp ne i8 %1, 0
829 ret i1 %2
830}
831
832define i1 @test_v8i8(<8 x i8> %a0) {
833; SSE-LABEL: test_v8i8:
834; SSE: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]835; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
836; SSE-NEXT: por %xmm0, %xmm1
837; SSE-NEXT: movdqa %xmm1, %xmm0
838; SSE-NEXT: psrld $16, %xmm0
839; SSE-NEXT: por %xmm1, %xmm0
840; SSE-NEXT: movdqa %xmm0, %xmm1
841; SSE-NEXT: psrlw $8, %xmm1
842; SSE-NEXT: por %xmm0, %xmm1
843; SSE-NEXT: movd %xmm1, %eax
844; SSE-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]845; SSE-NEXT: sete %al
846; SSE-NEXT: retq
847;
848; AVX-LABEL: test_v8i8:
849; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]850; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
851; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
852; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
853; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
854; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
855; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
856; AVX-NEXT: vmovd %xmm0, %eax
857; AVX-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]858; AVX-NEXT: sete %al
859; AVX-NEXT: retq
860 %1 = call i8 @llvm.experimental.vector.reduce.or.v8i8(<8 x i8> %a0)
861 %2 = icmp eq i8 %1, 0
862 ret i1 %2
863}
864
865define i1 @test_v16i8(<16 x i8> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]866; SSE-LABEL: test_v16i8:
867; SSE: # %bb.0:
868; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
869; SSE-NEXT: por %xmm0, %xmm1
870; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
871; SSE-NEXT: por %xmm1, %xmm0
872; SSE-NEXT: movdqa %xmm0, %xmm1
873; SSE-NEXT: psrld $16, %xmm1
874; SSE-NEXT: por %xmm0, %xmm1
875; SSE-NEXT: movdqa %xmm1, %xmm0
876; SSE-NEXT: psrlw $8, %xmm0
877; SSE-NEXT: por %xmm1, %xmm0
878; SSE-NEXT: movd %xmm0, %eax
879; SSE-NEXT: testb %al, %al
880; SSE-NEXT: setne %al
881; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]882;
883; AVX-LABEL: test_v16i8:
884; AVX: # %bb.0:
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]885; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
886; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
887; AVX-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
888; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
889; AVX-NEXT: vpsrld $16, %xmm0, %xmm1
890; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
891; AVX-NEXT: vpsrlw $8, %xmm0, %xmm1
892; AVX-NEXT: vpor %xmm1, %xmm0, %xmm0
893; AVX-NEXT: vmovd %xmm0, %eax
894; AVX-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]895; AVX-NEXT: setne %al
896; AVX-NEXT: retq
897 %1 = call i8 @llvm.experimental.vector.reduce.or.v16i8(<16 x i8> %a0)
898 %2 = icmp ne i8 %1, 0
899 ret i1 %2
900}
901
902define i1 @test_v32i8(<32 x i8> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]903; SSE-LABEL: test_v32i8:
904; SSE: # %bb.0:
905; SSE-NEXT: por %xmm1, %xmm0
906; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
907; SSE-NEXT: por %xmm0, %xmm1
908; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,2,3]
909; SSE-NEXT: por %xmm1, %xmm0
910; SSE-NEXT: movdqa %xmm0, %xmm1
911; SSE-NEXT: psrld $16, %xmm1
912; SSE-NEXT: por %xmm0, %xmm1
913; SSE-NEXT: movdqa %xmm1, %xmm0
914; SSE-NEXT: psrlw $8, %xmm0
915; SSE-NEXT: por %xmm1, %xmm0
916; SSE-NEXT: movd %xmm0, %eax
917; SSE-NEXT: testb %al, %al
918; SSE-NEXT: sete %al
919; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]920;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]921; AVX1-LABEL: test_v32i8:
922; AVX1: # %bb.0:
923; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
924; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
925; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
926; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
927; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
928; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
929; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
930; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
931; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
932; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
933; AVX1-NEXT: vmovd %xmm0, %eax
934; AVX1-NEXT: testb %al, %al
935; AVX1-NEXT: sete %al
936; AVX1-NEXT: vzeroupper
937; AVX1-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]938;
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]939; AVX2-LABEL: test_v32i8:
940; AVX2: # %bb.0:
941; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
942; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
943; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
944; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
945; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
946; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
947; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
948; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
949; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
950; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
951; AVX2-NEXT: vmovd %xmm0, %eax
952; AVX2-NEXT: testb %al, %al
953; AVX2-NEXT: sete %al
954; AVX2-NEXT: vzeroupper
955; AVX2-NEXT: retq
956;
957; AVX512-LABEL: test_v32i8:
958; AVX512: # %bb.0:
959; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
960; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
961; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
962; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
963; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
964; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
965; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
966; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
967; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
968; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
969; AVX512-NEXT: vmovd %xmm0, %eax
970; AVX512-NEXT: testb %al, %al
971; AVX512-NEXT: sete %al
972; AVX512-NEXT: vzeroupper
973; AVX512-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]974 %1 = call i8 @llvm.experimental.vector.reduce.or.v32i8(<32 x i8> %a0)
975 %2 = icmp eq i8 %1, 0
976 ret i1 %2
977}
978
979define i1 @test_v64i8(<64 x i8> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]980; SSE-LABEL: test_v64i8:
981; SSE: # %bb.0:
982; SSE-NEXT: por %xmm3, %xmm1
983; SSE-NEXT: por %xmm2, %xmm1
984; SSE-NEXT: por %xmm0, %xmm1
985; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1]
986; SSE-NEXT: por %xmm1, %xmm0
987; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
988; SSE-NEXT: por %xmm0, %xmm1
989; SSE-NEXT: movdqa %xmm1, %xmm0
990; SSE-NEXT: psrld $16, %xmm0
991; SSE-NEXT: por %xmm1, %xmm0
992; SSE-NEXT: movdqa %xmm0, %xmm1
993; SSE-NEXT: psrlw $8, %xmm1
994; SSE-NEXT: por %xmm0, %xmm1
995; SSE-NEXT: movd %xmm1, %eax
996; SSE-NEXT: testb %al, %al
997; SSE-NEXT: setne %al
998; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]999;
1000; AVX1-LABEL: test_v64i8:
1001; AVX1: # %bb.0:
1002; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]1003; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1004; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
1005; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
1006; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
1007; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
1008; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
1009; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
1010; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1011; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
1012; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1013; AVX1-NEXT: vmovd %xmm0, %eax
1014; AVX1-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1015; AVX1-NEXT: setne %al
1016; AVX1-NEXT: vzeroupper
1017; AVX1-NEXT: retq
1018;
1019; AVX2-LABEL: test_v64i8:
1020; AVX2: # %bb.0:
1021; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]1022; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1023; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1024; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1025; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1026; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1027; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1028; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
1029; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1030; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
1031; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1032; AVX2-NEXT: vmovd %xmm0, %eax
1033; AVX2-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1034; AVX2-NEXT: setne %al
1035; AVX2-NEXT: vzeroupper
1036; AVX2-NEXT: retq
1037;
1038; AVX512-LABEL: test_v64i8:
1039; AVX512: # %bb.0:
1040; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]1041; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
1042; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1043; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1044; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1045; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1046; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1047; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1048; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1049; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1050; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1051; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1052; AVX512-NEXT: vmovd %xmm0, %eax
1053; AVX512-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1054; AVX512-NEXT: setne %al
1055; AVX512-NEXT: vzeroupper
1056; AVX512-NEXT: retq
1057 %1 = call i8 @llvm.experimental.vector.reduce.or.v64i8(<64 x i8> %a0)
1058 %2 = icmp ne i8 %1, 0
1059 ret i1 %2
1060}
1061
1062define i1 @test_v128i8(<128 x i8> %a0) {
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]1063; SSE-LABEL: test_v128i8:
1064; SSE: # %bb.0:
1065; SSE-NEXT: por %xmm6, %xmm2
1066; SSE-NEXT: por %xmm7, %xmm3
1067; SSE-NEXT: por %xmm5, %xmm3
1068; SSE-NEXT: por %xmm1, %xmm3
1069; SSE-NEXT: por %xmm4, %xmm2
1070; SSE-NEXT: por %xmm3, %xmm2
1071; SSE-NEXT: por %xmm0, %xmm2
1072; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,0,1]
1073; SSE-NEXT: por %xmm2, %xmm0
1074; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1075; SSE-NEXT: por %xmm0, %xmm1
1076; SSE-NEXT: movdqa %xmm1, %xmm0
1077; SSE-NEXT: psrld $16, %xmm0
1078; SSE-NEXT: por %xmm1, %xmm0
1079; SSE-NEXT: movdqa %xmm0, %xmm1
1080; SSE-NEXT: psrlw $8, %xmm1
1081; SSE-NEXT: por %xmm0, %xmm1
1082; SSE-NEXT: movd %xmm1, %eax
1083; SSE-NEXT: testb %al, %al
1084; SSE-NEXT: sete %al
1085; SSE-NEXT: retq
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1086;
1087; AVX1-LABEL: test_v128i8:
1088; AVX1: # %bb.0:
1089; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1
1090; AVX1-NEXT: vorps %ymm1, %ymm2, %ymm1
1091; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]1092; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1093; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
1094; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[2,3,0,1]
1095; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
1096; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm0[1,1,2,3]
1097; AVX1-NEXT: vorps %xmm1, %xmm0, %xmm0
1098; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1
1099; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1100; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm1
1101; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1102; AVX1-NEXT: vmovd %xmm0, %eax
1103; AVX1-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1104; AVX1-NEXT: sete %al
1105; AVX1-NEXT: vzeroupper
1106; AVX1-NEXT: retq
1107;
1108; AVX2-LABEL: test_v128i8:
1109; AVX2: # %bb.0:
1110; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1
1111; AVX2-NEXT: vpor %ymm1, %ymm2, %ymm1
1112; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]1113; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1114; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1115; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1116; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1117; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1118; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1119; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
1120; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1121; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm1
1122; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1123; AVX2-NEXT: vmovd %xmm0, %eax
1124; AVX2-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1125; AVX2-NEXT: sete %al
1126; AVX2-NEXT: vzeroupper
1127; AVX2-NEXT: retq
1128;
1129; AVX512-LABEL: test_v128i8:
1130; AVX512: # %bb.0:
1131; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
1132; AVX512-NEXT: vextracti64x4 $1, %zmm0, %ymm1
Hans Wennborg1357c062020-06-22 20:58:11 +0200[diff] [blame]1133; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0
1134; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm1
1135; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1136; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
1137; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1138; AVX512-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1139; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1140; AVX512-NEXT: vpsrld $16, %xmm0, %xmm1
1141; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1142; AVX512-NEXT: vpsrlw $8, %xmm0, %xmm1
1143; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm0
1144; AVX512-NEXT: vmovd %xmm0, %eax
1145; AVX512-NEXT: testb %al, %al
Simon Pilgrim298377f2020-06-15 10:40:27 +0100[diff] [blame]1146; AVX512-NEXT: sete %al
1147; AVX512-NEXT: vzeroupper
1148; AVX512-NEXT: retq
1149 %1 = call i8 @llvm.experimental.vector.reduce.or.v128i8(<128 x i8> %a0)
1150 %2 = icmp eq i8 %1, 0
1151 ret i1 %2
1152}
1153
1154declare i64 @llvm.experimental.vector.reduce.or.v2i64(<2 x i64>)
1155declare i64 @llvm.experimental.vector.reduce.or.v4i64(<4 x i64>)
1156declare i64 @llvm.experimental.vector.reduce.or.v8i64(<8 x i64>)
1157declare i64 @llvm.experimental.vector.reduce.or.v16i64(<16 x i64>)
1158
1159declare i32 @llvm.experimental.vector.reduce.or.v2i32(<2 x i32>)
1160declare i32 @llvm.experimental.vector.reduce.or.v4i32(<4 x i32>)
1161declare i32 @llvm.experimental.vector.reduce.or.v8i32(<8 x i32>)
1162declare i32 @llvm.experimental.vector.reduce.or.v16i32(<16 x i32>)
1163declare i32 @llvm.experimental.vector.reduce.or.v32i32(<32 x i32>)
1164
1165declare i16 @llvm.experimental.vector.reduce.or.v2i16(<2 x i16>)
1166declare i16 @llvm.experimental.vector.reduce.or.v4i16(<4 x i16>)
1167declare i16 @llvm.experimental.vector.reduce.or.v8i16(<8 x i16>)
1168declare i16 @llvm.experimental.vector.reduce.or.v16i16(<16 x i16>)
1169declare i16 @llvm.experimental.vector.reduce.or.v32i16(<32 x i16>)
1170declare i16 @llvm.experimental.vector.reduce.or.v64i16(<64 x i16>)
1171
1172declare i8 @llvm.experimental.vector.reduce.or.v2i8(<2 x i8>)
1173declare i8 @llvm.experimental.vector.reduce.or.v4i8(<4 x i8>)
1174declare i8 @llvm.experimental.vector.reduce.or.v8i8(<8 x i8>)
1175declare i8 @llvm.experimental.vector.reduce.or.v16i8(<16 x i8>)
1176declare i8 @llvm.experimental.vector.reduce.or.v32i8(<32 x i8>)
1177declare i8 @llvm.experimental.vector.reduce.or.v64i8(<64 x i8>)
1178declare i8 @llvm.experimental.vector.reduce.or.v128i8(<128 x i8>)