blob: ce49294d5b36d7f6b2ec0a850c154d67fd6f55f4 [file] [log] [blame]
Matthias Braun71f95642016-05-20 23:14:56 +00001# RUN: llc -march=amdgcn -run-pass liveintervals -verify-machineinstrs -o /dev/null -debug-only=regalloc %s 2>&1 | FileCheck %s
2# REQUIRES: asserts
3# We currently maintain a main liveness range which operates like a superset of
4# all subregister liveranges. We may need to create additional SSA values at
5# merge point in this main liverange even though none of the subregister
6# liveranges needed it.
7#
8# Should see three distinct value numbers:
9# CHECK: %vreg0 [{{.*}}:0)[{{.*}}:1)[{{.*}}:2) 0@{{[0-9]+[Berd]}} 1@{{[0-9]+[Berd]}} 2@{{[0-9]+B-phi}}
10--- |
11 define void @test0() { ret void }
12...
13---
14name: test0
15registers:
16 - { id: 0, class: sreg_64 }
17body: |
18 bb.0:
19 successors: %bb.1, %bb.2
20 S_NOP 0, implicit-def undef %0:sub0
21 S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc
22 S_BRANCH %bb.2
23
24 bb.1:
25 successors: %bb.2
26 S_NOP 0, implicit-def %0:sub1
27 S_NOP 0, implicit %0:sub1
28 S_BRANCH %bb.2
29
30 bb.2:
31 S_NOP 0, implicit %0:sub0
32...