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Tom Stellard75aadc22012-12-11 21:25:42 +00001//=====-- AMDGPUSubtarget.h - Define Subtarget for the AMDIL ---*- C++ -*-====//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//==-----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief AMDGPU specific subclass of TargetSubtarget.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef AMDGPUSUBTARGET_H
16#define AMDGPUSUBTARGET_H
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000017#include "AMDGPU.h"
Tom Stellard75aadc22012-12-11 21:25:42 +000018#include "llvm/ADT/StringExtras.h"
19#include "llvm/ADT/StringRef.h"
20#include "llvm/Target/TargetSubtargetInfo.h"
21
22#define GET_SUBTARGETINFO_HEADER
23#include "AMDGPUGenSubtargetInfo.inc"
24
25#define MAX_CB_SIZE (1 << 16)
26
27namespace llvm {
28
29class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000030public:
31 enum Generation {
32 R600 = 0,
33 R700,
34 EVERGREEN,
35 NORTHERN_ISLANDS,
Tom Stellard6e1ee472013-10-29 16:37:28 +000036 SOUTHERN_ISLANDS,
37 SEA_ISLANDS
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000038 };
39
Tom Stellard75aadc22012-12-11 21:25:42 +000040private:
Tom Stellard75aadc22012-12-11 21:25:42 +000041 size_t DefaultSize[3];
42 std::string DevName;
43 bool Is64bit;
44 bool Is32on64bit;
45 bool DumpCode;
46 bool R600ALUInst;
Vincent Lejeunec2991642013-04-30 00:13:39 +000047 bool HasVertexCache;
Vincent Lejeunef9f4e1e2013-05-17 16:49:55 +000048 short TexVTXClauseSize;
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000049 enum Generation Gen;
50 bool FP64;
51 bool CaymanISA;
Tom Stellarded0ceec2013-10-10 17:11:12 +000052 bool EnableIRStructurizer;
Tom Stellard783893a2013-11-18 19:43:33 +000053 bool EnableIfCvt;
Tom Stellard8c347b02014-01-22 21:55:40 +000054 unsigned WavefrontSize;
Tom Stellard348273d2014-01-23 16:18:02 +000055 bool CFALUBug;
Tom Stellard75aadc22012-12-11 21:25:42 +000056
57 InstrItineraryData InstrItins;
58
59public:
60 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS);
Tom Stellard75aadc22012-12-11 21:25:42 +000061
62 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
Dmitri Gribenko226fea52013-01-13 16:01:15 +000063 virtual void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
Tom Stellard75aadc22012-12-11 21:25:42 +000064
Tom Stellard75aadc22012-12-11 21:25:42 +000065 bool is64bit() const;
Vincent Lejeunec2991642013-04-30 00:13:39 +000066 bool hasVertexCache() const;
Vincent Lejeunef9f4e1e2013-05-17 16:49:55 +000067 short getTexVTXClauseSize() const;
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000068 enum Generation getGeneration() const;
69 bool hasHWFP64() const;
70 bool hasCaymanISA() const;
Tom Stellarded0ceec2013-10-10 17:11:12 +000071 bool IsIRStructurizerEnabled() const;
Tom Stellard783893a2013-11-18 19:43:33 +000072 bool isIfCvtEnabled() const;
Tom Stellard8c347b02014-01-22 21:55:40 +000073 unsigned getWavefrontSize() const;
Tom Stellarda40f9712014-01-22 21:55:43 +000074 unsigned getStackEntrySize() const;
Tom Stellard348273d2014-01-23 16:18:02 +000075 bool hasCFAluBug() const;
Tom Stellard75aadc22012-12-11 21:25:42 +000076
Andrew Trick978674b2013-09-20 05:14:41 +000077 virtual bool enableMachineScheduler() const {
78 return getGeneration() <= NORTHERN_ISLANDS;
79 }
80
Tom Stellard75aadc22012-12-11 21:25:42 +000081 // Helper functions to simplify if statements
82 bool isTargetELF() const;
Tom Stellard75aadc22012-12-11 21:25:42 +000083 std::string getDeviceName() const;
84 virtual size_t getDefaultSize(uint32_t dim) const;
85 bool dumpCode() const { return DumpCode; }
86 bool r600ALUEncoding() const { return R600ALUInst; }
87
88};
89
90} // End namespace llvm
91
92#endif // AMDGPUSUBTARGET_H