Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 3582eb3b39b3be3187a551dff3cf7a2db9963732 / . / llvm / lib / Target / X86 / X86InstrFragmentsSIMD.td
blob: b8a5cbf1fc304274dd3b14bba3f0015a5e05db22 [file] [log] [blame]
Jia Liue1d61962012-02-19 02:03:36 +0000[diff] [blame]1//===-- X86InstrFragmentsSIMD.td - x86 SIMD ISA ------------*- tablegen -*-===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Jia Liub22310f2012-02-18 12:03:15 +0000[diff] [blame]7//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]8//===----------------------------------------------------------------------===//
9//
10// This file provides pattern fragments useful for SIMD instructions.
11//
12//===----------------------------------------------------------------------===//
13
14//===----------------------------------------------------------------------===//
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]15// MMX specific DAG Nodes.
16//===----------------------------------------------------------------------===//
17
18// Low word of MMX to GPR.
19def MMX_X86movd2w : SDNode<"X86ISD::MMX_MOVD2W", SDTypeProfile<1, 1,
20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
Bruno Cardoso Lopesab9ae872015-02-05 13:23:07 +0000[diff] [blame]21// GPR to low word of MMX.
22def MMX_X86movw2d : SDNode<"X86ISD::MMX_MOVW2D", SDTypeProfile<1, 1,
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
Bruno Cardoso Lopese446aef2015-02-05 13:22:50 +0000[diff] [blame]24
25//===----------------------------------------------------------------------===//
David Greene509be1f2010-02-09 23:52:19 +0000[diff] [blame]26// MMX Pattern Fragments
27//===----------------------------------------------------------------------===//
28
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]29def load_mmx : PatFrag<(ops node:$ptr), (x86mmx (load node:$ptr))>;
Bruno Cardoso Lopes9e1c4c12015-02-23 15:23:14 +0000[diff] [blame]30def load_mvmmx : PatFrag<(ops node:$ptr),
31 (x86mmx (MMX_X86movw2d (load node:$ptr)))>;
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]32def bc_mmx : PatFrag<(ops node:$in), (x86mmx (bitconvert node:$in))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]33
34//===----------------------------------------------------------------------===//
35// SSE specific DAG Nodes.
36//===----------------------------------------------------------------------===//
37
38def SDTX86FPShiftOp : SDTypeProfile<1, 2, [ SDTCisSameAs<0, 1>,
39 SDTCisFP<0>, SDTCisInt<2> ]>;
40def SDTX86VFCMP : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]41 SDTCisFP<1>, SDTCisVT<3, i8>,
42 SDTCisVec<1>]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]43
Benjamin Kramer4669d182012-12-21 14:04:55 +0000[diff] [blame]44def X86umin : SDNode<"X86ISD::UMIN", SDTIntBinOp>;
45def X86umax : SDNode<"X86ISD::UMAX", SDTIntBinOp>;
46def X86smin : SDNode<"X86ISD::SMIN", SDTIntBinOp>;
47def X86smax : SDNode<"X86ISD::SMAX", SDTIntBinOp>;
48
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]49def X86fmin : SDNode<"X86ISD::FMIN", SDTFPBinOp>;
50def X86fmax : SDNode<"X86ISD::FMAX", SDTFPBinOp>;
Nadav Rotem178250a2012-08-19 13:06:16 +0000[diff] [blame]51
52// Commutative and Associative FMIN and FMAX.
53def X86fminc : SDNode<"X86ISD::FMINC", SDTFPBinOp,
54 [SDNPCommutative, SDNPAssociative]>;
55def X86fmaxc : SDNode<"X86ISD::FMAXC", SDTFPBinOp,
56 [SDNPCommutative, SDNPAssociative]>;
57
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]58def X86fand : SDNode<"X86ISD::FAND", SDTFPBinOp,
59 [SDNPCommutative, SDNPAssociative]>;
60def X86for : SDNode<"X86ISD::FOR", SDTFPBinOp,
61 [SDNPCommutative, SDNPAssociative]>;
62def X86fxor : SDNode<"X86ISD::FXOR", SDTFPBinOp,
63 [SDNPCommutative, SDNPAssociative]>;
Benjamin Kramer5bc180c2013-08-04 12:05:16 +0000[diff] [blame]64def X86fandn : SDNode<"X86ISD::FANDN", SDTFPBinOp,
65 [SDNPCommutative, SDNPAssociative]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]66def X86frsqrt : SDNode<"X86ISD::FRSQRT", SDTFPUnaryOp>;
67def X86frcp : SDNode<"X86ISD::FRCP", SDTFPUnaryOp>;
68def X86fsrl : SDNode<"X86ISD::FSRL", SDTX86FPShiftOp>;
Stuart Hastings9f208042011-06-01 04:39:42 +0000[diff] [blame]69def X86fgetsign: SDNode<"X86ISD::FGETSIGNx86",SDTFPToIntOp>;
Duncan Sands0e4fcb82011-09-22 20:15:48 +0000[diff] [blame]70def X86fhadd : SDNode<"X86ISD::FHADD", SDTFPBinOp>;
71def X86fhsub : SDNode<"X86ISD::FHSUB", SDTFPBinOp>;
Craig Topperf984efb2011-11-19 09:02:40 +0000[diff] [blame]72def X86hadd : SDNode<"X86ISD::HADD", SDTIntBinOp>;
73def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]74def X86comi : SDNode<"X86ISD::COMI", SDTX86CmpTest>;
75def X86ucomi : SDNode<"X86ISD::UCOMI", SDTX86CmpTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]76def X86cmps : SDNode<"X86ISD::FSETCC", SDTX86Cmps>;
77//def X86cmpsd : SDNode<"X86ISD::FSETCCsd", SDTX86Cmpsd>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]78def X86pshufb : SDNode<"X86ISD::PSHUFB",
Craig Topper78349002012-01-25 06:43:11 +0000[diff] [blame]79 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]80 SDTCisSameAs<0,2>]>>;
Chandler Carruth6ba97302015-05-30 03:20:59 +0000[diff] [blame]81def X86psadbw : SDNode<"X86ISD::PSADBW",
82 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
83 SDTCisSameAs<0,2>]>>;
Bruno Cardoso Lopes7ba479d2011-07-13 21:36:47 +0000[diff] [blame]84def X86andnp : SDNode<"X86ISD::ANDNP",
Bruno Cardoso Lopes9613b642011-07-13 21:36:51 +0000[diff] [blame]85 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]86 SDTCisSameAs<0,2>]>>;
Craig Topper81390be2011-11-19 07:33:10 +0000[diff] [blame]87def X86psign : SDNode<"X86ISD::PSIGN",
Craig Topperde6b73b2011-11-19 07:07:26 +0000[diff] [blame]88 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Nate Begeman97b72c92010-12-17 22:55:37 +0000[diff] [blame]89 SDTCisSameAs<0,2>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]90def X86pextrb : SDNode<"X86ISD::PEXTRB",
91 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
92def X86pextrw : SDNode<"X86ISD::PEXTRW",
93 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
94def X86pinsrb : SDNode<"X86ISD::PINSRB",
95 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
96 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
97def X86pinsrw : SDNode<"X86ISD::PINSRW",
98 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
99 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
Filipe Cabecinhas20352212014-04-21 20:07:29 +0000[diff] [blame]100def X86insertps : SDNode<"X86ISD::INSERTPS",
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]101 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]102 SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]103def X86vzmovl : SDNode<"X86ISD::VZEXT_MOVL",
104 SDTypeProfile<1, 1, [SDTCisSameAs<0,1>]>>;
Elena Demikhovsky8d7e56c2012-04-22 09:39:03 +0000[diff] [blame]105
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]106def X86vzload : SDNode<"X86ISD::VZEXT_LOAD", SDTLoad,
Chris Lattner54e53292010-09-22 00:34:38 +0000[diff] [blame]107 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]108
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]109def X86vzext : SDNode<"X86ISD::VZEXT",
110 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]111 SDTCisInt<0>, SDTCisInt<1>,
112 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]113
114def X86vsext : SDNode<"X86ISD::VSEXT",
115 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]116 SDTCisInt<0>, SDTCisInt<1>,
117 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liao1be96bb2012-10-23 17:34:00 +0000[diff] [blame]118
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]119def X86vtrunc : SDNode<"X86ISD::VTRUNC",
120 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]121 SDTCisInt<0>, SDTCisInt<1>,
122 SDTCisOpSmallerThanOp<0, 1>]>>;
Elena Demikhovskyc5f67262013-12-17 08:33:15 +0000[diff] [blame]123def X86trunc : SDNode<"X86ISD::TRUNC",
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]124 SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisInt<1>,
125 SDTCisOpSmallerThanOp<0, 1>]>>;
126
Elena Demikhovsky980c6b02013-08-29 11:56:53 +0000[diff] [blame]127def X86vtruncm : SDNode<"X86ISD::VTRUNCM",
128 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
129 SDTCisInt<0>, SDTCisInt<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]130 SDTCisVec<2>, SDTCisInt<2>,
131 SDTCisOpSmallerThanOp<0, 2>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]132def X86vfpext : SDNode<"X86ISD::VFPEXT",
133 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]134 SDTCisFP<0>, SDTCisFP<1>,
135 SDTCisOpSmallerThanOp<1, 0>]>>;
Michael Liaoe999b862012-10-10 16:53:28 +0000[diff] [blame]136def X86vfpround: SDNode<"X86ISD::VFPROUND",
137 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
Craig Topperaefaab62014-01-26 04:59:39 +0000[diff] [blame]138 SDTCisFP<0>, SDTCisFP<1>,
139 SDTCisOpSmallerThanOp<0, 1>]>>;
Michael Liao34107b92012-08-14 21:24:47 +0000[diff] [blame]140
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]141def X86vshldq : SDNode<"X86ISD::VSHLDQ", SDTIntShiftOp>;
142def X86vshrdq : SDNode<"X86ISD::VSRLDQ", SDTIntShiftOp>;
Craig Topper0b7ad762012-01-22 23:36:02 +0000[diff] [blame]143def X86cmpp : SDNode<"X86ISD::CMPP", SDTX86VFCMP>;
Craig Topperbd4884372012-01-22 22:42:16 +0000[diff] [blame]144def X86pcmpeq : SDNode<"X86ISD::PCMPEQ", SDTIntBinOp, [SDNPCommutative]>;
145def X86pcmpgt : SDNode<"X86ISD::PCMPGT", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]146
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]147def X86IntCmpMask : SDTypeProfile<1, 2,
148 [SDTCisVec<0>, SDTCisSameAs<1, 2>, SDTCisInt<1>]>;
149def X86pcmpeqm : SDNode<"X86ISD::PCMPEQM", X86IntCmpMask, [SDNPCommutative]>;
150def X86pcmpgtm : SDNode<"X86ISD::PCMPGTM", X86IntCmpMask>;
151
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]152def X86CmpMaskCC :
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]153 SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>,
154 SDTCisVec<1>, SDTCisSameAs<2, 1>,
155 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>;
156def X86CmpMaskCCRound :
157 SDTypeProfile<1, 4, [SDTCisVec<0>,SDTCVecEltisVT<0, i1>,
158 SDTCisVec<1>, SDTCisSameAs<2, 1>,
159 SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>,
160 SDTCisInt<4>]>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]161def X86CmpMaskCCScalar :
162 SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
163
Elena Demikhovsky29792e92015-05-07 11:24:42 +0000[diff] [blame]164def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>;
165def X86cmpmRnd : SDNode<"X86ISD::CMPM_RND", X86CmpMaskCCRound>;
166def X86cmpmu : SDNode<"X86ISD::CMPMU", X86CmpMaskCC>;
167def X86cmpms : SDNode<"X86ISD::FSETCC", X86CmpMaskCCScalar>;
Elena Demikhovsky60b1f282013-08-13 13:24:07 +0000[diff] [blame]168
Craig Topper09462642012-01-22 19:15:14 +0000[diff] [blame]169def X86vshl : SDNode<"X86ISD::VSHL",
170 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
171 SDTCisVec<2>]>>;
172def X86vsrl : SDNode<"X86ISD::VSRL",
173 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
174 SDTCisVec<2>]>>;
175def X86vsra : SDNode<"X86ISD::VSRA",
176 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
177 SDTCisVec<2>]>>;
178
179def X86vshli : SDNode<"X86ISD::VSHLI", SDTIntShiftOp>;
180def X86vsrli : SDNode<"X86ISD::VSRLI", SDTIntShiftOp>;
181def X86vsrai : SDNode<"X86ISD::VSRAI", SDTIntShiftOp>;
182
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]183def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]184 SDTCisVec<1>,
185 SDTCisSameAs<2, 1>]>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]186def X86addus : SDNode<"X86ISD::ADDUS", SDTIntBinOp>;
Benjamin Kramerb16ccde2012-12-15 16:47:44 +0000[diff] [blame]187def X86subus : SDNode<"X86ISD::SUBUS", SDTIntBinOp>;
Elena Demikhovsky52266382015-05-04 12:35:55 +0000[diff] [blame]188def X86adds : SDNode<"X86ISD::ADDS", SDTIntBinOp>;
189def X86subs : SDNode<"X86ISD::SUBS", SDTIntBinOp>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]190def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
Bruno Cardoso Lopes91d61df2010-08-10 23:25:42 +0000[diff] [blame]191def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
Elena Demikhovsky40864b62013-08-05 08:52:21 +0000[diff] [blame]192def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]193def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]194 SDTCisVec<1>, SDTCisSameAs<2, 1>,
195 SDTCVecEltisVT<0, i1>,
196 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovskya30e4372014-02-05 07:05:03 +0000[diff] [blame]197def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
Elena Demikhovsky431b81e2015-04-21 13:13:46 +0000[diff] [blame]198 SDTCisVec<1>, SDTCisSameAs<2, 1>,
199 SDTCVecEltisVT<0, i1>,
200 SDTCisSameNumEltsAs<0, 1>]>>;
Elena Demikhovsky47fc44e2013-12-16 13:52:35 +0000[diff] [blame]201def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]202
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]203def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
204 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
205 SDTCisSameAs<1,2>]>>;
Benjamin Kramer6d2dff62014-04-26 14:12:19 +0000[diff] [blame]206def X86pmuldq : SDNode<"X86ISD::PMULDQ",
207 SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>,
208 SDTCisSameAs<1,2>]>>;
Craig Topper1d471e32012-02-05 03:14:49 +0000[diff] [blame]209
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]210// Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
211// translated into one of the target nodes below during lowering.
212// Note: this is a work in progress...
213def SDTShuff1Op : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisSameAs<0,1>]>;
214def SDTShuff2Op : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
215 SDTCisSameAs<0,2>]>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]216def SDTShuff3Op : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
217 SDTCisSameAs<0,2>, SDTCisSameAs<0,3>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]218
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]219def SDTShuff2OpM : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
220 SDTCisVec<2>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]221def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>,
222 SDTCisSameAs<0,1>, SDTCisInt<2>]>;
223def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
224 SDTCisSameAs<0,2>, SDTCisInt<3>]>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]225def SDTFPBinOpImmRound: SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCisSameAs<0,1>,
226 SDTCisSameAs<0,2>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]227
Elena Demikhovsky45c54ad2013-08-07 12:34:55 +0000[diff] [blame]228def SDTVBroadcast : SDTypeProfile<1, 1, [SDTCisVec<0>]>;
229def SDTVBroadcastm : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>]>;
230
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]231def SDTBlend : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
Chandler Carruth373b2b12014-09-06 10:00:01 +0000[diff] [blame]232 SDTCisSameAs<1,2>, SDTCisVT<3, i8>]>;
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]233
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]234def SDTFPBinOpRound : SDTypeProfile<1, 3, [ // fadd_round, fmul_round, etc.
235 SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisFP<0>, SDTCisInt<3>]>;
236
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]237def SDTFma : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
238 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>]>;
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]239def SDTFmaRound : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
240 SDTCisSameAs<1,2>, SDTCisSameAs<1,3>, SDTCisInt<4>]>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]241def STDFp1SrcRm : SDTypeProfile<1, 2, [SDTCisSameAs<0,1>,
242 SDTCisVec<0>, SDTCisInt<2>]>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]243def STDFp2SrcRm : SDTypeProfile<1, 3, [SDTCisSameAs<0,1>,
244 SDTCisVec<0>, SDTCisInt<3>]>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]245def STDFp3SrcRm : SDTypeProfile<1, 4, [SDTCisSameAs<0,1>,
246 SDTCisVec<0>, SDTCisInt<3>, SDTCisInt<4>]>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]247
Craig Topper8fb09f02013-01-28 06:48:25 +0000[diff] [blame]248def X86PAlignr : SDNode<"X86ISD::PALIGNR", SDTShuff3OpI>;
Adam Nemet2f10cc62014-08-05 17:22:55 +0000[diff] [blame]249def X86VAlign : SDNode<"X86ISD::VALIGN", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]250
251def X86PShufd : SDNode<"X86ISD::PSHUFD", SDTShuff2OpI>;
252def X86PShufhw : SDNode<"X86ISD::PSHUFHW", SDTShuff2OpI>;
253def X86PShuflw : SDNode<"X86ISD::PSHUFLW", SDTShuff2OpI>;
254
Craig Topper6e54ba72011-12-31 23:50:21 +0000[diff] [blame]255def X86Shufp : SDNode<"X86ISD::SHUFP", SDTShuff3OpI>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]256
257def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>;
258def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>;
259def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>;
260
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]261def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>;
262def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>;
263
264def X86Movlhps : SDNode<"X86ISD::MOVLHPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]265def X86Movlhpd : SDNode<"X86ISD::MOVLHPD", SDTShuff2Op>;
Bruno Cardoso Lopes03e4c352010-08-31 21:15:21 +0000[diff] [blame]266def X86Movhlps : SDNode<"X86ISD::MOVHLPS", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]267
Bruno Cardoso Lopesb3825212010-09-01 05:08:25 +0000[diff] [blame]268def X86Movlps : SDNode<"X86ISD::MOVLPS", SDTShuff2Op>;
269def X86Movlpd : SDNode<"X86ISD::MOVLPD", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]270
Chandler Carruth8366ceb2014-06-20 01:05:28 +0000[diff] [blame]271def SDTPack : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisVec<1>, SDTCisSameAs<2, 1>]>;
272def X86Packss : SDNode<"X86ISD::PACKSS", SDTPack>;
273def X86Packus : SDNode<"X86ISD::PACKUS", SDTPack>;
274
Craig Topper8d4ba192011-12-06 08:21:25 +0000[diff] [blame]275def X86Unpckl : SDNode<"X86ISD::UNPCKL", SDTShuff2Op>;
276def X86Unpckh : SDNode<"X86ISD::UNPCKH", SDTShuff2Op>;
Bruno Cardoso Lopes6f3b38a2010-08-20 22:55:05 +0000[diff] [blame]277
Chandler Carruth6d5916a2014-09-23 10:08:29 +0000[diff] [blame]278def X86VPermilpv : SDNode<"X86ISD::VPERMILPV", SDTShuff2OpM>;
Chandler Carruthed5dfff2014-09-22 22:29:42 +0000[diff] [blame]279def X86VPermilpi : SDNode<"X86ISD::VPERMILPI", SDTShuff2OpI>;
280def X86VPermv : SDNode<"X86ISD::VPERMV", SDTShuff2Op>;
281def X86VPermi : SDNode<"X86ISD::VPERMI", SDTShuff2OpI>;
282def X86VPermv3 : SDNode<"X86ISD::VPERMV3", SDTShuff3Op>;
Elena Demikhovskya5d38a32014-01-23 14:27:26 +0000[diff] [blame]283def X86VPermiv3 : SDNode<"X86ISD::VPERMIV3", SDTShuff3Op>;
Bruno Cardoso Lopesb878caa2011-07-21 01:55:47 +0000[diff] [blame]284
Craig Topper0a672ea2011-11-30 07:47:51 +0000[diff] [blame]285def X86VPerm2x128 : SDNode<"X86ISD::VPERM2X128", SDTShuff3OpI>;
Bruno Cardoso Lopesf15dfe52011-08-12 21:48:26 +0000[diff] [blame]286
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]287def X86VFixupimm : SDNode<"X86ISD::VFIXUPIMM", SDTFPBinOpImmRound>;
Elena Demikhovsky3582eb32015-06-01 11:05:34 +0000[diff] [blame^]288def X86VRange : SDNode<"X86ISD::VRANGE", SDTFPBinOpImmRound>;
Elena Demikhovsky42c96d92015-06-01 06:50:49 +0000[diff] [blame]289
Elena Demikhovskyad9c3962015-05-18 06:42:57 +0000[diff] [blame]290def X86SubVBroadcast : SDNode<"X86ISD::SUBV_BROADCAST",
291 SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>,
292 SDTCisSubVecOfVec<1, 0>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]293def X86VBroadcast : SDNode<"X86ISD::VBROADCAST", SDTVBroadcast>;
Elena Demikhovsky89529742013-09-12 08:55:00 +0000[diff] [blame]294def X86Vinsert : SDNode<"X86ISD::VINSERT", SDTypeProfile<1, 3,
295 [SDTCisSameAs<0, 1>, SDTCisPtrTy<3>]>, []>;
Elena Demikhovsky9f423d62014-02-10 07:02:39 +0000[diff] [blame]296def X86Vextract : SDNode<"X86ISD::VEXTRACT", SDTypeProfile<1, 2,
297 [SDTCisVec<1>, SDTCisPtrTy<2>]>, []>;
Bruno Cardoso Lopesbe5e9872011-08-17 02:29:19 +0000[diff] [blame]298
Elena Demikhovskycd3c1c42012-12-05 09:24:57 +0000[diff] [blame]299def X86Blendi : SDNode<"X86ISD::BLENDI", SDTBlend>;
Chandler Carruth204ad4c2014-09-15 20:09:47 +0000[diff] [blame]300
301def X86Addsub : SDNode<"X86ISD::ADDSUB", SDTFPBinOp>;
302
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]303def X86faddRnd : SDNode<"X86ISD::FADD_RND", SDTFPBinOpRound>;
304def X86fsubRnd : SDNode<"X86ISD::FSUB_RND", SDTFPBinOpRound>;
305def X86fmulRnd : SDNode<"X86ISD::FMUL_RND", SDTFPBinOpRound>;
306def X86fdivRnd : SDNode<"X86ISD::FDIV_RND", SDTFPBinOpRound>;
Elena Demikhovsky0d7e9362015-05-11 06:05:05 +0000[diff] [blame]307def X86fmaxRnd : SDNode<"X86ISD::FMAX_RND", SDTFPBinOpRound>;
308def X86fminRnd : SDNode<"X86ISD::FMIN_RND", SDTFPBinOpRound>;
Elena Demikhovsky714f23b2015-02-18 07:59:20 +0000[diff] [blame]309
Elena Demikhovsky3cb3b002012-08-01 12:06:00 +0000[diff] [blame]310def X86Fmadd : SDNode<"X86ISD::FMADD", SDTFma>;
311def X86Fnmadd : SDNode<"X86ISD::FNMADD", SDTFma>;
312def X86Fmsub : SDNode<"X86ISD::FMSUB", SDTFma>;
313def X86Fnmsub : SDNode<"X86ISD::FNMSUB", SDTFma>;
Craig Toppera999c662012-08-29 07:18:25 +0000[diff] [blame]314def X86Fmaddsub : SDNode<"X86ISD::FMADDSUB", SDTFma>;
315def X86Fmsubadd : SDNode<"X86ISD::FMSUBADD", SDTFma>;
Nadav Rotem9bc178a2012-04-11 06:40:27 +0000[diff] [blame]316
Elena Demikhovsky7b0dd392015-01-28 10:21:27 +0000[diff] [blame]317def X86FmaddRnd : SDNode<"X86ISD::FMADD_RND", SDTFmaRound>;
318def X86FnmaddRnd : SDNode<"X86ISD::FNMADD_RND", SDTFmaRound>;
319def X86FmsubRnd : SDNode<"X86ISD::FMSUB_RND", SDTFmaRound>;
320def X86FnmsubRnd : SDNode<"X86ISD::FNMSUB_RND", SDTFmaRound>;
321def X86FmaddsubRnd : SDNode<"X86ISD::FMADDSUB_RND", SDTFmaRound>;
322def X86FmsubaddRnd : SDNode<"X86ISD::FMSUBADD_RND", SDTFmaRound>;
323
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]324def X86rsqrt28 : SDNode<"X86ISD::RSQRT28", STDFp1SrcRm>;
325def X86rcp28 : SDNode<"X86ISD::RCP28", STDFp1SrcRm>;
Elena Demikhovsky905a5a62014-11-26 10:46:49 +0000[diff] [blame]326def X86exp2 : SDNode<"X86ISD::EXP2", STDFp1SrcRm>;
327
328def X86rsqrt28s : SDNode<"X86ISD::RSQRT28", STDFp2SrcRm>;
329def X86rcp28s : SDNode<"X86ISD::RCP28", STDFp2SrcRm>;
Elena Demikhovsky52e81bc2015-02-23 15:12:31 +0000[diff] [blame]330def X86RndScale : SDNode<"X86ISD::RNDSCALE", STDFp3SrcRm>;
Elena Demikhovskybe8808d2014-11-12 07:31:03 +0000[diff] [blame]331
Craig Topperab47fe42012-08-06 06:22:36 +0000[diff] [blame]332def SDT_PCMPISTRI : SDTypeProfile<2, 3, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
333 SDTCisVT<2, v16i8>, SDTCisVT<3, v16i8>,
334 SDTCisVT<4, i8>]>;
335def SDT_PCMPESTRI : SDTypeProfile<2, 5, [SDTCisVT<0, i32>, SDTCisVT<1, i32>,
336 SDTCisVT<2, v16i8>, SDTCisVT<3, i32>,
337 SDTCisVT<4, v16i8>, SDTCisVT<5, i32>,
338 SDTCisVT<6, i8>]>;
339
340def X86pcmpistri : SDNode<"X86ISD::PCMPISTRI", SDT_PCMPISTRI>;
341def X86pcmpestri : SDNode<"X86ISD::PCMPESTRI", SDT_PCMPESTRI>;
342
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]343def X86compress: SDNode<"X86ISD::COMPRESS", SDTypeProfile<1, 3,
344 [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>,
345 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky72860c32014-12-15 10:03:52 +0000[diff] [blame]346def X86expand : SDNode<"X86ISD::EXPAND", SDTypeProfile<1, 3,
347 [SDTCisSameAs<0, 3>,
348 SDTCisVec<3>, SDTCisVec<1>, SDTCisInt<1>]>, []>;
Elena Demikhovsky908dbf42014-12-11 15:02:24 +0000[diff] [blame]349
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]350//===----------------------------------------------------------------------===//
351// SSE Complex Patterns
352//===----------------------------------------------------------------------===//
353
354// These are 'extloads' from a scalar to the low element of a vector, zeroing
355// the top elements. These are used for the SSE 'ss' and 'sd' instruction
356// forms.
357def sse_load_f32 : ComplexPattern<v4f32, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]358 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
359 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]360def sse_load_f64 : ComplexPattern<v2f64, 5, "SelectScalarSSELoad", [],
Chris Lattner0e023ea2010-09-21 20:31:19 +0000[diff] [blame]361 [SDNPHasChain, SDNPMayLoad, SDNPMemOperand,
362 SDNPWantRoot]>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]363
364def ssmem : Operand<v4f32> {
365 let PrintMethod = "printf32mem";
366 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]367 let ParserMatchClass = X86Mem32AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]368 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]369}
370def sdmem : Operand<v2f64> {
371 let PrintMethod = "printf64mem";
372 let MIOperandInfo = (ops ptr_rc, i8imm, ptr_rc_nosp, i32imm, i8imm);
Craig Topper6269f492013-08-26 00:39:04 +0000[diff] [blame]373 let ParserMatchClass = X86Mem64AsmOperand;
Benjamin Kramer9654eef2011-07-14 21:47:22 +0000[diff] [blame]374 let OperandType = "OPERAND_MEMORY";
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]375}
376
377//===----------------------------------------------------------------------===//
378// SSE pattern fragments
379//===----------------------------------------------------------------------===//
380
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]381// 128-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]382// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]383def loadv4f32 : PatFrag<(ops node:$ptr), (v4f32 (load node:$ptr))>;
384def loadv2f64 : PatFrag<(ops node:$ptr), (v2f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]385def loadv2i64 : PatFrag<(ops node:$ptr), (v2i64 (load node:$ptr))>;
386
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]387// 256-bit load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]388// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]389def loadv8f32 : PatFrag<(ops node:$ptr), (v8f32 (load node:$ptr))>;
390def loadv4f64 : PatFrag<(ops node:$ptr), (v4f64 (load node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]391def loadv4i64 : PatFrag<(ops node:$ptr), (v4i64 (load node:$ptr))>;
392
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]393// 512-bit load pattern fragments
394def loadv16f32 : PatFrag<(ops node:$ptr), (v16f32 (load node:$ptr))>;
395def loadv8f64 : PatFrag<(ops node:$ptr), (v8f64 (load node:$ptr))>;
Robert Khasanov7ca7df02014-08-04 14:35:15 +0000[diff] [blame]396def loadv64i8 : PatFrag<(ops node:$ptr), (v64i8 (load node:$ptr))>;
397def loadv32i16 : PatFrag<(ops node:$ptr), (v32i16 (load node:$ptr))>;
Elena Demikhovsky1f3ed412013-10-22 09:19:28 +0000[diff] [blame]398def loadv16i32 : PatFrag<(ops node:$ptr), (v16i32 (load node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]399def loadv8i64 : PatFrag<(ops node:$ptr), (v8i64 (load node:$ptr))>;
400
401// 128-/256-/512-bit extload pattern fragments
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]402def extloadv2f32 : PatFrag<(ops node:$ptr), (v2f64 (extloadvf32 node:$ptr))>;
403def extloadv4f32 : PatFrag<(ops node:$ptr), (v4f64 (extloadvf32 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]404def extloadv8f32 : PatFrag<(ops node:$ptr), (v8f64 (extloadvf32 node:$ptr))>;
Michael Liao400f7ef2012-09-10 18:33:51 +0000[diff] [blame]405
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]406// These are needed to match a scalar load that is used in a vector-only
407// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
408// The memory operand is required to be a 128-bit load, so it must be converted
409// from a vector to a scalar.
410def loadf32_128 : PatFrag<(ops node:$ptr),
411 (f32 (vector_extract (loadv4f32 node:$ptr), (iPTR 0)))>;
412def loadf64_128 : PatFrag<(ops node:$ptr),
413 (f64 (vector_extract (loadv2f64 node:$ptr), (iPTR 0)))>;
414
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]415// Like 'store', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]416def alignedstore : PatFrag<(ops node:$val, node:$ptr),
417 (store node:$val, node:$ptr), [{
418 return cast<StoreSDNode>(N)->getAlignment() >= 16;
419}]>;
420
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]421// Like 'store', but always requires 256-bit vector alignment.
422def alignedstore256 : PatFrag<(ops node:$val, node:$ptr),
423 (store node:$val, node:$ptr), [{
424 return cast<StoreSDNode>(N)->getAlignment() >= 32;
425}]>;
426
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]427// Like 'store', but always requires 512-bit vector alignment.
428def alignedstore512 : PatFrag<(ops node:$val, node:$ptr),
429 (store node:$val, node:$ptr), [{
430 return cast<StoreSDNode>(N)->getAlignment() >= 64;
431}]>;
432
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]433// Like 'load', but always requires 128-bit vector alignment.
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]434def alignedload : PatFrag<(ops node:$ptr), (load node:$ptr), [{
435 return cast<LoadSDNode>(N)->getAlignment() >= 16;
436}]>;
437
Chad Rosiera281afc2012-03-09 02:00:48 +0000[diff] [blame]438// Like 'X86vzload', but always requires 128-bit vector alignment.
439def alignedX86vzload : PatFrag<(ops node:$ptr), (X86vzload node:$ptr), [{
440 return cast<MemSDNode>(N)->getAlignment() >= 16;
441}]>;
442
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]443// Like 'load', but always requires 256-bit vector alignment.
444def alignedload256 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
445 return cast<LoadSDNode>(N)->getAlignment() >= 32;
446}]>;
447
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]448// Like 'load', but always requires 512-bit vector alignment.
449def alignedload512 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
450 return cast<LoadSDNode>(N)->getAlignment() >= 64;
451}]>;
452
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]453def alignedloadfsf32 : PatFrag<(ops node:$ptr),
454 (f32 (alignedload node:$ptr))>;
455def alignedloadfsf64 : PatFrag<(ops node:$ptr),
456 (f64 (alignedload node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]457
458// 128-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]459// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]460def alignedloadv4f32 : PatFrag<(ops node:$ptr),
461 (v4f32 (alignedload node:$ptr))>;
462def alignedloadv2f64 : PatFrag<(ops node:$ptr),
463 (v2f64 (alignedload node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]464def alignedloadv2i64 : PatFrag<(ops node:$ptr),
465 (v2i64 (alignedload node:$ptr))>;
466
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]467// 256-bit aligned load pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]468// NOTE: all 256-bit integer vector loads are promoted to v4i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]469def alignedloadv8f32 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]470 (v8f32 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]471def alignedloadv4f64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]472 (v4f64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]473def alignedloadv4i64 : PatFrag<(ops node:$ptr),
Bruno Cardoso Lopes03d60022011-09-13 19:33:03 +0000[diff] [blame]474 (v4i64 (alignedload256 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]475
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]476// 512-bit aligned load pattern fragments
477def alignedloadv16f32 : PatFrag<(ops node:$ptr),
478 (v16f32 (alignedload512 node:$ptr))>;
Elena Demikhovsky3ce8dbb2013-08-18 13:08:57 +0000[diff] [blame]479def alignedloadv16i32 : PatFrag<(ops node:$ptr),
480 (v16i32 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]481def alignedloadv8f64 : PatFrag<(ops node:$ptr),
482 (v8f64 (alignedload512 node:$ptr))>;
Elena Demikhovskycf5b1452013-08-11 07:55:09 +0000[diff] [blame]483def alignedloadv8i64 : PatFrag<(ops node:$ptr),
484 (v8i64 (alignedload512 node:$ptr))>;
485
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]486// Like 'load', but uses special alignment checks suitable for use in
487// memory operands in most SSE instructions, which are required to
488// be naturally aligned on some targets but not on others. If the subtarget
489// allows unaligned accesses, match any load, though this may require
490// setting a feature bit in the processor (on startup, for example).
491// Opteron 10h and later implement such a feature.
492def memop : PatFrag<(ops node:$ptr), (load node:$ptr), [{
Sanjay Patelffd039b2015-02-03 17:13:04 +0000[diff] [blame]493 return Subtarget->hasSSEUnalignedMem()
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]494 || cast<LoadSDNode>(N)->getAlignment() >= 16;
495}]>;
496
497def memopfsf32 : PatFrag<(ops node:$ptr), (f32 (memop node:$ptr))>;
498def memopfsf64 : PatFrag<(ops node:$ptr), (f64 (memop node:$ptr))>;
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]499
500// 128-bit memop pattern fragments
Craig Topper0d8e67a2012-01-24 03:03:17 +0000[diff] [blame]501// NOTE: all 128-bit integer vector loads are promoted to v2i64
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]502def memopv4f32 : PatFrag<(ops node:$ptr), (v4f32 (memop node:$ptr))>;
503def memopv2f64 : PatFrag<(ops node:$ptr), (v2f64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]504def memopv2i64 : PatFrag<(ops node:$ptr), (v2i64 (memop node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]505
Sanjay Patelb811c1d2015-02-17 20:08:21 +0000[diff] [blame]506// These are needed to match a scalar memop that is used in a vector-only
507// math instruction such as the FP logical ops: andps, andnps, orps, xorps.
508// The memory operand is required to be a 128-bit load, so it must be converted
509// from a vector to a scalar.
510def memopfsf32_128 : PatFrag<(ops node:$ptr),
511 (f32 (vector_extract (memopv4f32 node:$ptr), (iPTR 0)))>;
512def memopfsf64_128 : PatFrag<(ops node:$ptr),
513 (f64 (vector_extract (memopv2f64 node:$ptr), (iPTR 0)))>;
514
515
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]516// SSSE3 uses MMX registers for some instructions. They aren't aligned on a
517// 16-byte boundary.
518// FIXME: 8 byte alignment for mmx reads is not required
519def memop64 : PatFrag<(ops node:$ptr), (load node:$ptr), [{
520 return cast<LoadSDNode>(N)->getAlignment() >= 8;
521}]>;
522
Dale Johannesendd224d22010-09-30 23:57:10 +0000[diff] [blame]523def memopmmx : PatFrag<(ops node:$ptr), (x86mmx (memop64 node:$ptr))>;
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]524
525// MOVNT Support
526// Like 'store', but requires the non-temporal bit to be set
527def nontemporalstore : PatFrag<(ops node:$val, node:$ptr),
528 (st node:$val, node:$ptr), [{
529 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
530 return ST->isNonTemporal();
531 return false;
532}]>;
533
534def alignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]535 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]536 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
537 return ST->isNonTemporal() && !ST->isTruncatingStore() &&
538 ST->getAddressingMode() == ISD::UNINDEXED &&
539 ST->getAlignment() >= 16;
540 return false;
541}]>;
542
543def unalignednontemporalstore : PatFrag<(ops node:$val, node:$ptr),
Bill Wendlingea6397f2012-07-19 00:11:40 +0000[diff] [blame]544 (st node:$val, node:$ptr), [{
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]545 if (StoreSDNode *ST = dyn_cast<StoreSDNode>(N))
546 return ST->isNonTemporal() &&
547 ST->getAlignment() < 16;
548 return false;
549}]>;
550
Elena Demikhovskye1eda8a2015-04-30 08:38:48 +0000[diff] [blame]551def mgatherv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
552 (masked_gather node:$src1, node:$src2, node:$src3) , [{
553 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
554 return (Mgt->getIndex().getValueType() == MVT::v8i32 ||
555 Mgt->getBasePtr().getValueType() == MVT::v8i32);
556 return false;
557}]>;
558
559def mgatherv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
560 (masked_gather node:$src1, node:$src2, node:$src3) , [{
561 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
562 return (Mgt->getIndex().getValueType() == MVT::v8i64 ||
563 Mgt->getBasePtr().getValueType() == MVT::v8i64);
564 return false;
565}]>;
566def mgatherv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
567 (masked_gather node:$src1, node:$src2, node:$src3) , [{
568 if (MaskedGatherSDNode *Mgt = dyn_cast<MaskedGatherSDNode>(N))
569 return (Mgt->getIndex().getValueType() == MVT::v16i32 ||
570 Mgt->getBasePtr().getValueType() == MVT::v16i32);
571 return false;
572}]>;
573
574def mscatterv8i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
575 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
576 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
577 return (Sc->getIndex().getValueType() == MVT::v8i32 ||
578 Sc->getBasePtr().getValueType() == MVT::v8i32);
579 return false;
580}]>;
581
582def mscatterv8i64 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
583 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
584 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
585 return (Sc->getIndex().getValueType() == MVT::v8i64 ||
586 Sc->getBasePtr().getValueType() == MVT::v8i64);
587 return false;
588}]>;
589def mscatterv16i32 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
590 (masked_scatter node:$src1, node:$src2, node:$src3) , [{
591 if (MaskedScatterSDNode *Sc = dyn_cast<MaskedScatterSDNode>(N))
592 return (Sc->getIndex().getValueType() == MVT::v16i32 ||
593 Sc->getBasePtr().getValueType() == MVT::v16i32);
594 return false;
595}]>;
596
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]597// 128-bit bitconvert pattern fragments
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]598def bc_v4f32 : PatFrag<(ops node:$in), (v4f32 (bitconvert node:$in))>;
599def bc_v2f64 : PatFrag<(ops node:$in), (v2f64 (bitconvert node:$in))>;
600def bc_v16i8 : PatFrag<(ops node:$in), (v16i8 (bitconvert node:$in))>;
601def bc_v8i16 : PatFrag<(ops node:$in), (v8i16 (bitconvert node:$in))>;
602def bc_v4i32 : PatFrag<(ops node:$in), (v4i32 (bitconvert node:$in))>;
603def bc_v2i64 : PatFrag<(ops node:$in), (v2i64 (bitconvert node:$in))>;
604
Bruno Cardoso Lopes160be292010-08-13 20:39:01 +0000[diff] [blame]605// 256-bit bitconvert pattern fragments
Craig Topper682b8502011-11-02 04:42:13 +0000[diff] [blame]606def bc_v32i8 : PatFrag<(ops node:$in), (v32i8 (bitconvert node:$in))>;
607def bc_v16i16 : PatFrag<(ops node:$in), (v16i16 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]608def bc_v8i32 : PatFrag<(ops node:$in), (v8i32 (bitconvert node:$in))>;
Bruno Cardoso Lopes1021b4a2011-07-13 01:15:33 +0000[diff] [blame]609def bc_v4i64 : PatFrag<(ops node:$in), (v4i64 (bitconvert node:$in))>;
Elena Demikhovsky3629b4a2014-01-06 08:45:54 +0000[diff] [blame]610def bc_v8f32 : PatFrag<(ops node:$in), (v8f32 (bitconvert node:$in))>;
Bruno Cardoso Lopese3acfd42010-07-21 23:53:50 +0000[diff] [blame]611
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]612// 512-bit bitconvert pattern fragments
613def bc_v16i32 : PatFrag<(ops node:$in), (v16i32 (bitconvert node:$in))>;
614def bc_v8i64 : PatFrag<(ops node:$in), (v8i64 (bitconvert node:$in))>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]615def bc_v8f64 : PatFrag<(ops node:$in), (v8f64 (bitconvert node:$in))>;
616def bc_v16f32 : PatFrag<(ops node:$in), (v16f32 (bitconvert node:$in))>;
Craig Topper8c929622013-08-16 06:07:34 +0000[diff] [blame]617
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]618def vzmovl_v2i64 : PatFrag<(ops node:$src),
619 (bitconvert (v2i64 (X86vzmovl
620 (v2i64 (scalar_to_vector (loadi64 node:$src))))))>;
621def vzmovl_v4i32 : PatFrag<(ops node:$src),
622 (bitconvert (v4i32 (X86vzmovl
623 (v4i32 (scalar_to_vector (loadi32 node:$src))))))>;
624
625def vzload_v2i64 : PatFrag<(ops node:$src),
626 (bitconvert (v2i64 (X86vzload node:$src)))>;
627
628
629def fp32imm0 : PatLeaf<(f32 fpimm), [{
630 return N->isExactlyValue(+0.0);
631}]>;
632
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]633def I8Imm : SDNodeXForm<imm, [{
634 // Transformation function: get the low 8 bits.
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]635 return getI8Imm((uint8_t)N->getZExtValue(), SDLoc(N));
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]636}]>;
637
638def FROUND_NO_EXC : ImmLeaf<i32, [{ return Imm == 8; }]>;
Adam Nemet50b83f02014-08-14 17:13:26 +0000[diff] [blame]639def FROUND_CURRENT : ImmLeaf<i32, [{
640 return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
641}]>;
Elena Demikhovskyde3f7512014-01-01 15:12:34 +0000[diff] [blame]642
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]643// BYTE_imm - Transform bit immediates into byte immediates.
644def BYTE_imm : SDNodeXForm<imm, [{
645 // Transformation function: imm >> 3
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]646 return getI32Imm(N->getZExtValue() >> 3, SDLoc(N));
David Greene03264ef2010-07-12 23:41:28 +0000[diff] [blame]647}]>;
648
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]649// EXTRACT_get_vextract128_imm xform function: convert extract_subvector index
650// to VEXTRACTF128/VEXTRACTI128 imm.
651def EXTRACT_get_vextract128_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]652 return getI8Imm(X86::getExtractVEXTRACT128Immediate(N), SDLoc(N));
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]653}]>;
654
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]655// INSERT_get_vinsert128_imm xform function: convert insert_subvector index to
656// VINSERTF128/VINSERTI128 imm.
657def INSERT_get_vinsert128_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]658 return getI8Imm(X86::getInsertVINSERT128Immediate(N), SDLoc(N));
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]659}]>;
660
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]661// EXTRACT_get_vextract256_imm xform function: convert extract_subvector index
662// to VEXTRACTF64x4 imm.
663def EXTRACT_get_vextract256_imm : SDNodeXForm<extract_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]664 return getI8Imm(X86::getExtractVEXTRACT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]665}]>;
666
667// INSERT_get_vinsert256_imm xform function: convert insert_subvector index to
668// VINSERTF64x4 imm.
669def INSERT_get_vinsert256_imm : SDNodeXForm<insert_subvector, [{
Sergey Dmitrouk842a51b2015-04-28 14:05:47 +0000[diff] [blame]670 return getI8Imm(X86::getInsertVINSERT256Immediate(N), SDLoc(N));
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]671}]>;
672
673def vextract128_extract : PatFrag<(ops node:$bigvec, node:$index),
David Greenec4da1102011-02-03 15:50:00 +0000[diff] [blame]674 (extract_subvector node:$bigvec,
675 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]676 return X86::isVEXTRACT128Index(N);
677}], EXTRACT_get_vextract128_imm>;
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]678
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]679def vinsert128_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
David Greene653f1ee2011-02-04 16:08:29 +0000[diff] [blame]680 node:$index),
681 (insert_subvector node:$bigvec, node:$smallvec,
682 node:$index), [{
Elena Demikhovsky67b05fc2013-07-31 11:35:14 +0000[diff] [blame]683 return X86::isVINSERT128Index(N);
684}], INSERT_get_vinsert128_imm>;
685
686
687def vextract256_extract : PatFrag<(ops node:$bigvec, node:$index),
688 (extract_subvector node:$bigvec,
689 node:$index), [{
690 return X86::isVEXTRACT256Index(N);
691}], EXTRACT_get_vextract256_imm>;
692
693def vinsert256_insert : PatFrag<(ops node:$bigvec, node:$smallvec,
694 node:$index),
695 (insert_subvector node:$bigvec, node:$smallvec,
696 node:$index), [{
697 return X86::isVINSERT256Index(N);
698}], INSERT_get_vinsert256_imm>;
Bruno Cardoso Lopes123dff02011-07-25 23:05:25 +0000[diff] [blame]699
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]700def masked_load_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
701 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]702 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
703 return Load->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]704 return false;
705}]>;
706
707def masked_load_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
708 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]709 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
710 return Load->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]711 return false;
712}]>;
713
714def masked_load_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
715 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]716 if (auto *Load = dyn_cast<MaskedLoadSDNode>(N))
717 return Load->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]718 return false;
719}]>;
720
721def masked_load_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
722 (masked_load node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]723 return isa<MaskedLoadSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]724}]>;
725
726def masked_store_aligned128 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
727 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]728 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
729 return Store->getAlignment() >= 16;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]730 return false;
731}]>;
732
733def masked_store_aligned256 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
734 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]735 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
736 return Store->getAlignment() >= 32;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]737 return false;
738}]>;
739
740def masked_store_aligned512 : PatFrag<(ops node:$src1, node:$src2, node:$src3),
741 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]742 if (auto *Store = dyn_cast<MaskedStoreSDNode>(N))
743 return Store->getAlignment() >= 64;
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]744 return false;
745}]>;
746
747def masked_store_unaligned : PatFrag<(ops node:$src1, node:$src2, node:$src3),
748 (masked_store node:$src1, node:$src2, node:$src3), [{
Benjamin Kramer619c4e52015-04-10 11:24:51 +0000[diff] [blame]749 return isa<MaskedStoreSDNode>(N);
Elena Demikhovskyd207f172015-03-03 15:03:35 +0000[diff] [blame]750}]>;
751