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Renato Golinf5f373f2015-05-08 21:04:27 +00001//===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements a target parser to recognise hardware features such as
11// FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
12//
13//===----------------------------------------------------------------------===//
14
15#include "llvm/Support/ARMBuildAttributes.h"
16#include "llvm/Support/TargetParser.h"
17#include "llvm/ADT/StringExtras.h"
18#include "llvm/ADT/StringSwitch.h"
19
20using namespace llvm;
21
22namespace {
23
24// List of canonical FPU names (use getFPUSynonym)
25// FIXME: TableGen this.
26struct {
27 const char * Name;
28 ARM::FPUKind ID;
29} FPUNames[] = {
Renato Golin35de35d2015-05-12 10:33:58 +000030 { "invalid", ARM::FK_INVALID },
31 { "vfp", ARM::FK_VFP },
32 { "vfpv2", ARM::FK_VFPV2 },
33 { "vfpv3", ARM::FK_VFPV3 },
34 { "vfpv3-d16", ARM::FK_VFPV3_D16 },
35 { "vfpv4", ARM::FK_VFPV4 },
36 { "vfpv4-d16", ARM::FK_VFPV4_D16 },
37 { "fpv5-d16", ARM::FK_FPV5_D16 },
38 { "fp-armv8", ARM::FK_FP_ARMV8 },
39 { "neon", ARM::FK_NEON },
40 { "neon-vfpv4", ARM::FK_NEON_VFPV4 },
41 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8 },
42 { "crypto-neon-fp-armv8", ARM::FK_CRYPTO_NEON_FP_ARMV8 },
43 { "softvfp", ARM::FK_SOFTVFP }
Renato Golinf5f373f2015-05-08 21:04:27 +000044};
45// List of canonical arch names (use getArchSynonym)
46// FIXME: TableGen this.
47struct {
48 const char *Name;
49 ARM::ArchKind ID;
50 const char *DefaultCPU;
51 ARMBuildAttrs::CPUArch DefaultArch;
52} ARCHNames[] = {
Renato Golin35de35d2015-05-12 10:33:58 +000053 { "invalid", ARM::AK_INVALID, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 },
54 { "armv2", ARM::AK_ARMV2, "2", ARMBuildAttrs::CPUArch::v4 },
55 { "armv2a", ARM::AK_ARMV2A, "2A", ARMBuildAttrs::CPUArch::v4 },
56 { "armv3", ARM::AK_ARMV3, "3", ARMBuildAttrs::CPUArch::v4 },
57 { "armv3m", ARM::AK_ARMV3M, "3M", ARMBuildAttrs::CPUArch::v4 },
58 { "armv4", ARM::AK_ARMV4, "4", ARMBuildAttrs::CPUArch::v4 },
59 { "armv4t", ARM::AK_ARMV4T, "4T", ARMBuildAttrs::CPUArch::v4T },
60 { "armv5", ARM::AK_ARMV5, "5", ARMBuildAttrs::CPUArch::v5T },
61 { "armv5t", ARM::AK_ARMV5T, "5T", ARMBuildAttrs::CPUArch::v5T },
62 { "armv5te", ARM::AK_ARMV5TE, "5TE", ARMBuildAttrs::CPUArch::v5TE },
63 { "armv6", ARM::AK_ARMV6, "6", ARMBuildAttrs::CPUArch::v6 },
64 { "armv6j", ARM::AK_ARMV6J, "6J", ARMBuildAttrs::CPUArch::v6 },
65 { "armv6k", ARM::AK_ARMV6K, "6K", ARMBuildAttrs::CPUArch::v6K },
66 { "armv6t2", ARM::AK_ARMV6T2, "6T2", ARMBuildAttrs::CPUArch::v6T2 },
67 { "armv6z", ARM::AK_ARMV6Z, "6Z", ARMBuildAttrs::CPUArch::v6KZ },
68 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", ARMBuildAttrs::CPUArch::v6KZ },
69 { "armv6-m", ARM::AK_ARMV6M, "6-M", ARMBuildAttrs::CPUArch::v6_M },
70 { "armv7", ARM::AK_ARMV7, "7", ARMBuildAttrs::CPUArch::v7 },
71 { "armv7-a", ARM::AK_ARMV7A, "7-A", ARMBuildAttrs::CPUArch::v7 },
72 { "armv7-r", ARM::AK_ARMV7R, "7-R", ARMBuildAttrs::CPUArch::v7 },
73 { "armv7-m", ARM::AK_ARMV7M, "7-M", ARMBuildAttrs::CPUArch::v7 },
74 { "armv8-a", ARM::AK_ARMV8A, "8-A", ARMBuildAttrs::CPUArch::v8 },
75 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", ARMBuildAttrs::CPUArch::v8 },
76 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", ARMBuildAttrs::CPUArch::v5TE },
77 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", ARMBuildAttrs::CPUArch::v5TE }
Renato Golinf5f373f2015-05-08 21:04:27 +000078};
79// List of canonical ARCH names (use getARCHSynonym)
80// FIXME: TableGen this.
81struct {
82 const char *Name;
83 ARM::ArchExtKind ID;
84} ARCHExtNames[] = {
Renato Golin35de35d2015-05-12 10:33:58 +000085 { "invalid", ARM::AEK_INVALID },
86 { "crc", ARM::AEK_CRC },
87 { "crypto", ARM::AEK_CRYPTO },
88 { "fp", ARM::AEK_FP },
89 { "idiv", ARM::AEK_HWDIV },
90 { "mp", ARM::AEK_MP },
91 { "sec", ARM::AEK_SEC },
92 { "virt", ARM::AEK_VIRT }
Renato Golinf5f373f2015-05-08 21:04:27 +000093};
94
95} // namespace
96
97namespace llvm {
98
99// ======================================================= //
100// Information by ID
101// ======================================================= //
102
103const char *ARMTargetParser::getFPUName(unsigned ID) {
Renato Golin35de35d2015-05-12 10:33:58 +0000104 if (ID >= ARM::FK_LAST)
Renato Golinf5f373f2015-05-08 21:04:27 +0000105 return nullptr;
106 return FPUNames[ID].Name;
107}
108
109const char *ARMTargetParser::getArchName(unsigned ID) {
Renato Golin35de35d2015-05-12 10:33:58 +0000110 if (ID >= ARM::AK_LAST)
Renato Golinf5f373f2015-05-08 21:04:27 +0000111 return nullptr;
112 return ARCHNames[ID].Name;
113}
114
115const char *ARMTargetParser::getArchDefaultCPUName(unsigned ID) {
Renato Golin35de35d2015-05-12 10:33:58 +0000116 if (ID >= ARM::AK_LAST)
Renato Golinf5f373f2015-05-08 21:04:27 +0000117 return nullptr;
118 return ARCHNames[ID].DefaultCPU;
119}
120
121unsigned ARMTargetParser::getArchDefaultCPUArch(unsigned ID) {
Renato Golin35de35d2015-05-12 10:33:58 +0000122 if (ID >= ARM::AK_LAST)
Renato Golinf5f373f2015-05-08 21:04:27 +0000123 return 0;
124 return ARCHNames[ID].DefaultArch;
125}
126
127const char *ARMTargetParser::getArchExtName(unsigned ID) {
Renato Golin35de35d2015-05-12 10:33:58 +0000128 if (ID >= ARM::AEK_LAST)
Renato Golinf5f373f2015-05-08 21:04:27 +0000129 return nullptr;
130 return ARCHExtNames[ID].Name;
131}
132
133// ======================================================= //
134// Parsers
135// ======================================================= //
136
137StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) {
138 return StringSwitch<StringRef>(FPU)
139 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
140 .Case("vfp2", "vfpv2")
141 .Case("vfp3", "vfpv3")
142 .Case("vfp4", "vfpv4")
143 .Case("vfp3-d16", "vfpv3-d16")
144 .Case("vfp4-d16", "vfpv4-d16")
145 // FIXME: sp-16 is NOT the same as d16
146 .Cases("fp4-sp-d16", "fpv4-sp-d16", "vfpv4-d16")
147 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
148 .Cases("fp5-sp-d16", "fpv5-sp-d16", "fpv5-d16")
149 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
150 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
151 .Case("neon-vfpv3", "neon")
152 .Default(FPU);
153}
154
155StringRef ARMTargetParser::getArchSynonym(StringRef Arch) {
156 return StringSwitch<StringRef>(Arch)
157 .Case("armv5tej", "armv5te")
158 .Case("armv6m", "armv6-m")
159 .Case("armv7a", "armv7-a")
160 .Case("armv7r", "armv7-r")
161 .Case("armv7m", "armv7-m")
162 .Case("armv8a", "armv8-a")
163 .Case("armv8.1a", "armv8.1-a")
164 .Default(Arch);
165}
166
167unsigned ARMTargetParser::parseFPU(StringRef FPU) {
168 StringRef Syn = getFPUSynonym(FPU);
169 for (const auto F : FPUNames) {
170 if (Syn == F.Name)
171 return F.ID;
172 }
Renato Golin35de35d2015-05-12 10:33:58 +0000173 return ARM::FK_INVALID;
Renato Golinf5f373f2015-05-08 21:04:27 +0000174}
175
176unsigned ARMTargetParser::parseArch(StringRef Arch) {
177 StringRef Syn = getArchSynonym(Arch);
178 for (const auto A : ARCHNames) {
179 if (Syn == A.Name)
180 return A.ID;
181 }
Renato Golin35de35d2015-05-12 10:33:58 +0000182 return ARM::AK_INVALID;
Renato Golinf5f373f2015-05-08 21:04:27 +0000183}
184
185unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) {
186 for (const auto A : ARCHExtNames) {
187 if (ArchExt == A.Name)
188 return A.ID;
189 }
Renato Golin35de35d2015-05-12 10:33:58 +0000190 return ARM::AEK_INVALID;
Renato Golinf5f373f2015-05-08 21:04:27 +0000191}
192
193} // namespace llvm