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gerrit-public.fairphone.software / toolchain / llvm-project / 24ae2cda7c73ededee789fb62fa84b32faa76064 / . / llvm / test / CodeGen / R600 / llvm.log2.ll
blob: e4bfab92bf08cd0f92a93122cef73cb49b8af622 [file] [log] [blame]
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG-CHECK --check-prefix=FUNC
2;RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=CM-CHECK --check-prefix=FUNC
Tom Stellard49f8bfd2015-01-06 18:00:21 +0000[diff] [blame]3;RUN: llc < %s -march=amdgcn -mcpu=SI | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
Marek Olsak75170772015-01-27 17:27:15 +0000[diff] [blame]4;RUN: llc < %s -march=amdgcn -mcpu=tonga | FileCheck %s --check-prefix=SI-CHECK --check-prefix=FUNC
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]5
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]6;FUNC-LABEL: {{^}}test:
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]7;EG-CHECK: LOG_IEEE
8;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
9;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
10;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
11;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]12;SI-CHECK: v_log_f32
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]13
14define void @test(float addrspace(1)* %out, float %in) {
15entry:
16 %0 = call float @llvm.log2.f32(float %in)
17 store float %0, float addrspace(1)* %out
18 ret void
19}
20
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]21;FUNC-LABEL: {{^}}testv2:
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]22;EG-CHECK: LOG_IEEE
23;EG-CHECK: LOG_IEEE
24; FIXME: We should be able to merge these packets together on Cayman so we
25; have a maximum of 4 instructions.
26;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
27;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
28;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
29;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
30;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
31;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
32;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}}
33;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]34;SI-CHECK: v_log_f32
35;SI-CHECK: v_log_f32
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]36
37define void @testv2(<2 x float> addrspace(1)* %out, <2 x float> %in) {
38entry:
39 %0 = call <2 x float> @llvm.log2.v2f32(<2 x float> %in)
40 store <2 x float> %0, <2 x float> addrspace(1)* %out
41 ret void
42}
43
Tom Stellard79243d92014-10-01 17:15:17 +0000[diff] [blame]44;FUNC-LABEL: {{^}}testv4:
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]45;EG-CHECK: LOG_IEEE
46;EG-CHECK: LOG_IEEE
47;EG-CHECK: LOG_IEEE
48;EG-CHECK: LOG_IEEE
49; FIXME: We should be able to merge these packets together on Cayman so we
50; have a maximum of 4 instructions.
51;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
52;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
53;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
54;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
55;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
56;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
57;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
58;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
59;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
60;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
61;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
62;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}} (MASKED)
63;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}}
64;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}}
65;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}}
66;CM-CHECK-DAG: LOG_IEEE T{{[0-9]+\.[XYZW]}}
Tom Stellard326d6ec2014-11-05 14:50:53 +0000[diff] [blame]67;SI-CHECK: v_log_f32
68;SI-CHECK: v_log_f32
69;SI-CHECK: v_log_f32
70;SI-CHECK: v_log_f32
Tom Stellarda79e9f02014-06-20 17:06:07 +0000[diff] [blame]71define void @testv4(<4 x float> addrspace(1)* %out, <4 x float> %in) {
72entry:
73 %0 = call <4 x float> @llvm.log2.v4f32(<4 x float> %in)
74 store <4 x float> %0, <4 x float> addrspace(1)* %out
75 ret void
76}
77
78declare float @llvm.log2.f32(float) readnone
79declare <2 x float> @llvm.log2.v2f32(<2 x float>) readnone
80declare <4 x float> @llvm.log2.v4f32(<4 x float>) readnone