blob: ac188bb3bb573745991334ab3a118ec8ee34cab6 [file] [log] [blame]
Tim Northovere3d42362013-02-01 11:40:47 +00001; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
Amara Emersonf80f95f2013-10-31 09:32:11 +00002; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
Tim Northovere0e3aef2013-01-31 12:12:40 +00003
4%myStruct = type { i64 , i8, i32 }
5
6@var8 = global i8 0
7@var8_2 = global i8 0
8@var32 = global i32 0
9@var64 = global i64 0
10@var128 = global i128 0
11@varfloat = global float 0.0
12@varfloat_2 = global float 0.0
13@vardouble = global double 0.0
14@varstruct = global %myStruct zeroinitializer
15@varsmallstruct = global [2 x i64] zeroinitializer
16
17declare void @take_i8s(i8 %val1, i8 %val2)
18declare void @take_floats(float %val1, float %val2)
19
20define void @simple_args() {
Stephen Lind24ab202013-07-14 06:24:09 +000021; CHECK-LABEL: simple_args:
Tim Northovere0e3aef2013-01-31 12:12:40 +000022 %char1 = load i8* @var8
23 %char2 = load i8* @var8_2
24 call void @take_i8s(i8 %char1, i8 %char2)
Tim Northover1fdb0762013-10-09 07:53:57 +000025; CHECK-DAG: ldrb w0, [{{x[0-9]+}}, #:lo12:var8]
26; CHECK-DAG: ldrb w1, [{{x[0-9]+}}, #:lo12:var8_2]
Tim Northovere0e3aef2013-01-31 12:12:40 +000027; CHECK: bl take_i8s
28
29 %float1 = load float* @varfloat
30 %float2 = load float* @varfloat_2
31 call void @take_floats(float %float1, float %float2)
Tim Northover1fdb0762013-10-09 07:53:57 +000032; CHECK-DAG: ldr s1, [{{x[0-9]+}}, #:lo12:varfloat_2]
33; CHECK-DAG: ldr s0, [{{x[0-9]+}}, #:lo12:varfloat]
Tim Northovere0e3aef2013-01-31 12:12:40 +000034; CHECK: bl take_floats
Amara Emersonf80f95f2013-10-31 09:32:11 +000035; CHECK-NOFP-NOT: ldr s1,
36; CHECK-NOFP-NOT: ldr s0,
Tim Northovere0e3aef2013-01-31 12:12:40 +000037
38 ret void
39}
40
41declare i32 @return_int()
42declare double @return_double()
43declare [2 x i64] @return_smallstruct()
44declare void @return_large_struct(%myStruct* sret %retval)
45
46define void @simple_rets() {
Stephen Lind24ab202013-07-14 06:24:09 +000047; CHECK-LABEL: simple_rets:
Tim Northovere0e3aef2013-01-31 12:12:40 +000048
49 %int = call i32 @return_int()
50 store i32 %int, i32* @var32
51; CHECK: bl return_int
52; CHECK: str w0, [{{x[0-9]+}}, #:lo12:var32]
53
54 %dbl = call double @return_double()
55 store double %dbl, double* @vardouble
56; CHECK: bl return_double
57; CHECK: str d0, [{{x[0-9]+}}, #:lo12:vardouble]
Amara Emersonf80f95f2013-10-31 09:32:11 +000058; CHECK-NOFP-NOT: str d0,
Tim Northovere0e3aef2013-01-31 12:12:40 +000059
60 %arr = call [2 x i64] @return_smallstruct()
61 store [2 x i64] %arr, [2 x i64]* @varsmallstruct
62; CHECK: bl return_smallstruct
63; CHECK: str x1, [{{x[0-9]+}}, #8]
64; CHECK: str x0, [{{x[0-9]+}}, #:lo12:varsmallstruct]
65
66 call void @return_large_struct(%myStruct* sret @varstruct)
67; CHECK: add x8, {{x[0-9]+}}, #:lo12:varstruct
Benjamin Kramer01b75cc2013-03-09 18:25:40 +000068; CHECK: bl return_large_struct
Tim Northovere0e3aef2013-01-31 12:12:40 +000069
70 ret void
71}
72
73
74declare i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45,
75 i32* %var6, %myStruct* byval %struct, i32 %stacked,
76 double %notstacked)
77declare void @stacked_fpu(float %var0, double %var1, float %var2, float %var3,
78 float %var4, float %var5, float %var6, float %var7,
79 float %var8)
80
81define void @check_stack_args() {
Tim Northover1fdb0762013-10-09 07:53:57 +000082; CHECK-LABEL: check_stack_args:
Tim Northovere0e3aef2013-01-31 12:12:40 +000083 call i32 @struct_on_stack(i8 0, i16 12, i32 42, i64 99, i128 1,
84 i32* @var32, %myStruct* byval @varstruct,
85 i32 999, double 1.0)
86 ; Want to check that the final double is passed in registers and
87 ; that varstruct is passed on the stack. Rather dependent on how a
88 ; memcpy gets created, but the following works for now.
Tim Northover1fdb0762013-10-09 07:53:57 +000089; CHECK: mov x[[SPREG:[0-9]+]], sp
90; CHECK-DAG: str {{w[0-9]+}}, [x[[SPREG]]]
91; CHECK-DAG: str {{w[0-9]+}}, [x[[SPREG]], #12]
92; CHECK-DAG: fmov d0,
Tim Northovere0e3aef2013-01-31 12:12:40 +000093; CHECK: bl struct_on_stack
Amara Emersonf80f95f2013-10-31 09:32:11 +000094; CHECK-NOFP-NOT: fmov
Tim Northovere0e3aef2013-01-31 12:12:40 +000095
96 call void @stacked_fpu(float -1.0, double 1.0, float 4.0, float 2.0,
97 float -2.0, float -8.0, float 16.0, float 1.0,
98 float 64.0)
Tim Northover3533ad6b2013-02-15 09:33:43 +000099; CHECK: ldr s[[STACKEDREG:[0-9]+]], [{{x[0-9]+}}, #:lo12:.LCPI
Tim Northovere0e3aef2013-01-31 12:12:40 +0000100; CHECK: mov x0, sp
101; CHECK: str d[[STACKEDREG]], [x0]
Benjamin Kramer01b75cc2013-03-09 18:25:40 +0000102; CHECK: bl stacked_fpu
Tim Northovere0e3aef2013-01-31 12:12:40 +0000103 ret void
104}
105
106
107declare void @check_i128_stackalign(i32 %val0, i32 %val1, i32 %val2, i32 %val3,
108 i32 %val4, i32 %val5, i32 %val6, i32 %val7,
109 i32 %stack1, i128 %stack2)
110
111declare void @check_i128_regalign(i32 %val0, i128 %val1)
112
113
114define void @check_i128_align() {
Stephen Lind24ab202013-07-14 06:24:09 +0000115; CHECK-LABEL: check_i128_align:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000116 %val = load i128* @var128
117 call void @check_i128_stackalign(i32 0, i32 1, i32 2, i32 3,
118 i32 4, i32 5, i32 6, i32 7,
119 i32 42, i128 %val)
120; CHECK: ldr [[I128LO:x[0-9]+]], [{{x[0-9]+}}, #:lo12:var128]
121; CHECK: ldr [[I128HI:x[0-9]+]], [{{x[0-9]+}}, #8]
122; CHECK: mov x[[SPREG:[0-9]+]], sp
123; CHECK: str [[I128HI]], [x[[SPREG]], #24]
124; CHECK: str [[I128LO]], [x[[SPREG]], #16]
125; CHECK: bl check_i128_stackalign
126
127 call void @check_i128_regalign(i32 0, i128 42)
128; CHECK-NOT: mov x1
129; CHECK: movz x2, #42
130; CHECK: mov x3, xzr
131; CHECK: bl check_i128_regalign
132
133 ret void
134}
135
136@fptr = global void()* null
137
138define void @check_indirect_call() {
Stephen Lind24ab202013-07-14 06:24:09 +0000139; CHECK-LABEL: check_indirect_call:
Tim Northovere0e3aef2013-01-31 12:12:40 +0000140 %func = load void()** @fptr
141 call void %func()
142; CHECK: ldr [[FPTR:x[0-9]+]], [{{x[0-9]+}}, #:lo12:fptr]
143; CHECK: blr [[FPTR]]
144
145 ret void
146}