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gerrit-public.fairphone.software / toolchain / llvm-project / c1425c9d6b7685e9e075aa0ffa07ab44bc3833e6 / . / llvm / test / CodeGen / PowerPC / memcmp.ll
blob: 36ba5256becb8c88237effbcd6a086d95dedf32e [file] [log] [blame]
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]2; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux < %s | FileCheck %s -check-prefix=CHECK
3
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]4define signext i32 @memcmp8(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
5; CHECK-LABEL: memcmp8:
6; CHECK: # BB#0:
7; CHECK-NEXT: ldbrx 3, 0, 3
8; CHECK-NEXT: ldbrx 4, 0, 4
Sanjay Patelfea731a2017-07-31 18:08:24 +0000[diff] [blame]9; CHECK-NEXT: li 5, 0
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]10; CHECK-NEXT: cmpld 3, 4
Sanjay Patelfea731a2017-07-31 18:08:24 +0000[diff] [blame]11; CHECK-NEXT: li 3, 1
12; CHECK-NEXT: isel 4, 3, 5, 1
13; CHECK-NEXT: isel 3, 3, 5, 0
14; CHECK-NEXT: subf 3, 3, 4
15; CHECK-NEXT: extsw 3, 3
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]16; CHECK-NEXT: blr
17 %t0 = bitcast i32* %buffer1 to i8*
18 %t1 = bitcast i32* %buffer2 to i8*
19 %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 8)
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]20 ret i32 %call
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]21}
22
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]23define signext i32 @memcmp4(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
24; CHECK-LABEL: memcmp4:
25; CHECK: # BB#0:
26; CHECK-NEXT: lwbrx 3, 0, 3
27; CHECK-NEXT: lwbrx 4, 0, 4
Sanjay Patelfea731a2017-07-31 18:08:24 +0000[diff] [blame]28; CHECK-NEXT: sub 5, 4, 3
29; CHECK-NEXT: sub 3, 3, 4
30; CHECK-NEXT: rldicl 4, 5, 1, 63
31; CHECK-NEXT: rldicl 3, 3, 1, 63
32; CHECK-NEXT: subf 3, 3, 4
33; CHECK-NEXT: extsw 3, 3
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]34; CHECK-NEXT: blr
35 %t0 = bitcast i32* %buffer1 to i8*
36 %t1 = bitcast i32* %buffer2 to i8*
37 %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 4)
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]38 ret i32 %call
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]39}
40
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]41define signext i32 @memcmp2(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
42; CHECK-LABEL: memcmp2:
43; CHECK: # BB#0:
44; CHECK-NEXT: lhbrx 3, 0, 3
45; CHECK-NEXT: lhbrx 4, 0, 4
Sanjay Patelfea731a2017-07-31 18:08:24 +0000[diff] [blame]46; CHECK-NEXT: subf 3, 4, 3
47; CHECK-NEXT: extsw 3, 3
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]48; CHECK-NEXT: blr
49 %t0 = bitcast i32* %buffer1 to i8*
50 %t1 = bitcast i32* %buffer2 to i8*
51 %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 2)
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]52 ret i32 %call
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]53}
54
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]55define signext i32 @memcmp1(i32* nocapture readonly %buffer1, i32* nocapture readonly %buffer2) {
56; CHECK-LABEL: memcmp1:
57; CHECK: # BB#0:
58; CHECK-NEXT: lbz 3, 0(3)
59; CHECK-NEXT: lbz 4, 0(4)
Sanjay Patelfea731a2017-07-31 18:08:24 +0000[diff] [blame]60; CHECK-NEXT: subf 3, 4, 3
61; CHECK-NEXT: extsw 3, 3
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]62; CHECK-NEXT: blr
63 %t0 = bitcast i32* %buffer1 to i8*
64 %t1 = bitcast i32* %buffer2 to i8*
65 %call = tail call signext i32 @memcmp(i8* %t0, i8* %t1, i64 1) #2
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]66 ret i32 %call
Zaara Syeda3a7578c2017-05-31 17:12:38 +0000[diff] [blame]67}
68
Sanjay Patel1be7ea42017-06-30 19:20:54 +0000[diff] [blame]69declare signext i32 @memcmp(i8*, i8*, i64)