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Chris Lattner101b8cd2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
John Criswell482202a2003-10-20 19:43:21 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
Chris Lattner101b8cd2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner74e4e9b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattnerbfa53192003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattnerb4e41112002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattner42714ec2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnerca4362f2002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattnerbfa53192003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattnerb4d58d72003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattnerd4627092002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattner1007f032003-08-01 22:21:34 +000025#include "Support/Debug.h"
26#include "Support/Statistic.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000027#include <iostream>
Chris Lattnerc330b982004-01-31 21:27:19 +000028using namespace llvm;
Brian Gaeke960707c2003-11-11 22:41:34 +000029
Chris Lattner101b8cd2002-12-16 16:15:28 +000030namespace {
31 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
32 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner9ab7fbe2003-10-24 20:05:58 +000033 cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
Chris Lattnerd4627092002-12-18 08:14:26 +000034 cl::desc("Disable register kill in local-ra"));
Chris Lattner101b8cd2002-12-16 16:15:28 +000035
Chris Lattnerb4e41112002-12-28 20:40:43 +000036 class RA : public MachineFunctionPass {
37 const TargetMachine *TM;
Chris Lattner101b8cd2002-12-16 16:15:28 +000038 MachineFunction *MF;
Chris Lattnerb4e41112002-12-28 20:40:43 +000039 const MRegisterInfo *RegInfo;
Chris Lattnerbfa53192003-01-13 00:25:40 +000040 LiveVariables *LV;
Chris Lattner42714ec2002-12-25 05:05:46 +000041
Chris Lattner815b85e2003-08-04 23:36:39 +000042 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
43 // values are spilled.
Chris Lattnerb4e41112002-12-28 20:40:43 +000044 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattner101b8cd2002-12-16 16:15:28 +000045
46 // Virt2PhysRegMap - This map contains entries for each virtual register
47 // that is currently available in a physical register.
48 //
49 std::map<unsigned, unsigned> Virt2PhysRegMap;
50
Chris Lattner490627a2004-02-09 01:26:13 +000051 // PhysRegsUsed - This array is effectively a map, containing entries for
52 // each physical register that currently has a value (ie, it is in
53 // Virt2PhysRegMap). The value mapped to is the virtual register
54 // corresponding to the physical register (the inverse of the
55 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
56 // because it is used by a future instruction. If the entry for a physical
57 // register is -1, then the physical register is "not in the map".
Chris Lattner101b8cd2002-12-16 16:15:28 +000058 //
Chris Lattner490627a2004-02-09 01:26:13 +000059 int PhysRegsUsed[MRegisterInfo::FirstVirtualRegister];
Chris Lattner101b8cd2002-12-16 16:15:28 +000060
61 // PhysRegsUseOrder - This contains a list of the physical registers that
62 // currently have a virtual register value in them. This list provides an
63 // ordering of registers, imposing a reallocation order. This list is only
64 // used if all registers are allocated and we have to spill one, in which
65 // case we spill the least recently used register. Entries at the front of
66 // the list are the least recently used registers, entries at the back are
67 // the most recently used.
68 //
69 std::vector<unsigned> PhysRegsUseOrder;
70
Chris Lattnerbfa53192003-01-13 00:25:40 +000071 // VirtRegModified - This bitset contains information about which virtual
72 // registers need to be spilled back to memory when their registers are
73 // scavenged. If a virtual register has simply been rematerialized, there
74 // is no reason to spill it to memory when we need the register back.
Chris Lattnerd4627092002-12-18 08:14:26 +000075 //
Chris Lattnerbfa53192003-01-13 00:25:40 +000076 std::vector<bool> VirtRegModified;
77
78 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattnerc330b982004-01-31 21:27:19 +000079 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattnerbfa53192003-01-13 00:25:40 +000080 Reg -= MRegisterInfo::FirstVirtualRegister;
81 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
82 VirtRegModified[Reg] = Val;
83 }
84
85 bool isVirtRegModified(unsigned Reg) const {
Chris Lattnerc330b982004-01-31 21:27:19 +000086 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattnerbfa53192003-01-13 00:25:40 +000087 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
88 && "Illegal virtual register!");
89 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
90 }
Chris Lattnerd4627092002-12-18 08:14:26 +000091
Chris Lattner101b8cd2002-12-16 16:15:28 +000092 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattnerd4627092002-12-18 08:14:26 +000093 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner763729c52002-12-24 00:04:55 +000094 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
95
96 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
97 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
98 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
99 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
100 // Add it to the end of the list
101 PhysRegsUseOrder.push_back(RegMatch);
102 if (RegMatch == Reg)
103 return; // Found an exact match, exit early
104 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000105 }
106
107 public:
Chris Lattner101b8cd2002-12-16 16:15:28 +0000108 virtual const char *getPassName() const {
109 return "Local Register Allocator";
110 }
111
Chris Lattnerbfa53192003-01-13 00:25:40 +0000112 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
113 if (!DisableKill)
114 AU.addRequired<LiveVariables>();
115 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos71390902003-12-18 22:40:24 +0000116 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000117 MachineFunctionPass::getAnalysisUsage(AU);
118 }
119
Chris Lattner101b8cd2002-12-16 16:15:28 +0000120 private:
121 /// runOnMachineFunction - Register allocate the whole function
122 bool runOnMachineFunction(MachineFunction &Fn);
123
124 /// AllocateBasicBlock - Register allocate the specified basic block.
125 void AllocateBasicBlock(MachineBasicBlock &MBB);
126
Chris Lattnerd4627092002-12-18 08:14:26 +0000127
Chris Lattnerd4627092002-12-18 08:14:26 +0000128 /// areRegsEqual - This method returns true if the specified registers are
129 /// related to each other. To do this, it checks to see if they are equal
130 /// or if the first register is in the alias set of the second register.
131 ///
132 bool areRegsEqual(unsigned R1, unsigned R2) const {
133 if (R1 == R2) return true;
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000134 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
135 *AliasSet; ++AliasSet) {
136 if (*AliasSet == R1) return true;
137 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000138 return false;
139 }
140
Chris Lattnerb4e41112002-12-28 20:40:43 +0000141 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattner815b85e2003-08-04 23:36:39 +0000142 /// register on the stack, allocating space if necessary.
Chris Lattnerb4e41112002-12-28 20:40:43 +0000143 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000144
Chris Lattner815b85e2003-08-04 23:36:39 +0000145 /// removePhysReg - This method marks the specified physical register as no
146 /// longer being in use.
147 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000148 void removePhysReg(unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000149
150 /// spillVirtReg - This method spills the value specified by PhysReg into
151 /// the virtual register slot specified by VirtReg. It then updates the RA
152 /// data structures to indicate the fact that PhysReg is now available.
153 ///
154 void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
155 unsigned VirtReg, unsigned PhysReg);
156
Chris Lattner0129b862002-12-16 17:44:42 +0000157 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner931947d2003-08-17 18:01:15 +0000158 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
159 /// true, then the request is ignored if the physical register does not
160 /// contain a virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000161 ///
Chris Lattner0129b862002-12-16 17:44:42 +0000162 void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner931947d2003-08-17 18:01:15 +0000163 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattner0129b862002-12-16 17:44:42 +0000164
Chris Lattnerbfa53192003-01-13 00:25:40 +0000165 /// assignVirtToPhysReg - This method updates local state so that we know
166 /// that PhysReg is the proper container for VirtReg now. The physical
167 /// register must not be used for anything else when this is called.
168 ///
169 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
170
171 /// liberatePhysReg - Make sure the specified physical register is available
172 /// for use. If there is currently a value in it, it is either moved out of
173 /// the way or spilled to memory.
174 ///
175 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
176 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000177
Chris Lattner4664bd52002-12-17 02:50:10 +0000178 /// isPhysRegAvailable - Return true if the specified physical register is
179 /// free and available for use. This also includes checking to see if
180 /// aliased registers are all free...
181 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000182 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000183
184 /// getFreeReg - Look to see if there is a free register available in the
185 /// specified register class. If not, return 0.
186 ///
187 unsigned getFreeReg(const TargetRegisterClass *RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000188
Chris Lattnerbfa53192003-01-13 00:25:40 +0000189 /// getReg - Find a physical register to hold the specified virtual
Chris Lattner101b8cd2002-12-16 16:15:28 +0000190 /// register. If all compatible physical registers are used, this method
191 /// spills the last used virtual register to the stack, and uses that
192 /// register.
193 ///
Chris Lattnerbfa53192003-01-13 00:25:40 +0000194 unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
195 unsigned VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000196
197 /// reloadVirtReg - This method loads the specified virtual register into a
198 /// physical register, returning the physical register chosen. This updates
199 /// the regalloc data structures to reflect the fact that the virtual reg is
200 /// now alive in a physical register, and the previous one isn't.
201 ///
202 unsigned reloadVirtReg(MachineBasicBlock &MBB,
203 MachineBasicBlock::iterator &I, unsigned VirtReg);
Chris Lattner815b85e2003-08-04 23:36:39 +0000204
205 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
206 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000207 };
Chris Lattner101b8cd2002-12-16 16:15:28 +0000208}
209
Chris Lattner815b85e2003-08-04 23:36:39 +0000210/// getStackSpaceFor - This allocates space for the specified virtual register
211/// to be held on the stack.
212int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
213 // Find the location Reg would belong...
214 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000215
Chris Lattnerb4e41112002-12-28 20:40:43 +0000216 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattner101b8cd2002-12-16 16:15:28 +0000217 return I->second; // Already has space allocated?
218
Chris Lattnerb4e41112002-12-28 20:40:43 +0000219 // Allocate a new stack object for this spill location...
Chris Lattnerbfa53192003-01-13 00:25:40 +0000220 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000221
Chris Lattner101b8cd2002-12-16 16:15:28 +0000222 // Assign the slot...
Chris Lattnerb4e41112002-12-28 20:40:43 +0000223 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
224 return FrameIdx;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000225}
226
Chris Lattner4664bd52002-12-17 02:50:10 +0000227
Chris Lattnerd4627092002-12-18 08:14:26 +0000228/// removePhysReg - This method marks the specified physical register as no
229/// longer being in use.
230///
231void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner490627a2004-02-09 01:26:13 +0000232 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattnerd4627092002-12-18 08:14:26 +0000233
234 std::vector<unsigned>::iterator It =
235 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000236 if (It != PhysRegsUseOrder.end())
237 PhysRegsUseOrder.erase(It);
Chris Lattnerd4627092002-12-18 08:14:26 +0000238}
239
Chris Lattnerbfa53192003-01-13 00:25:40 +0000240
Chris Lattner101b8cd2002-12-16 16:15:28 +0000241/// spillVirtReg - This method spills the value specified by PhysReg into the
242/// virtual register slot specified by VirtReg. It then updates the RA data
243/// structures to indicate the fact that PhysReg is now available.
244///
245void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
246 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner92a199d2003-08-05 04:13:58 +0000247 if (!VirtReg && DisableKill) return;
248 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattner506fa682003-08-05 00:49:09 +0000249 " Must not have appropriate kill for the register or use exists beyond"
250 " the intended one.");
251 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
252 std::cerr << " containing %reg" << VirtReg;
253 if (!isVirtRegModified(VirtReg))
254 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000255
Chris Lattner506fa682003-08-05 00:49:09 +0000256 // Otherwise, there is a virtual register corresponding to this physical
257 // register. We only need to spill it into its stack slot if it has been
258 // modified.
259 if (isVirtRegModified(VirtReg)) {
260 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
261 int FrameIndex = getStackSpaceFor(VirtReg, RC);
262 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
263 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
264 ++NumSpilled; // Update statistics
Chris Lattner101b8cd2002-12-16 16:15:28 +0000265 }
Chris Lattner506fa682003-08-05 00:49:09 +0000266 Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
Chris Lattner101b8cd2002-12-16 16:15:28 +0000267
Chris Lattner815b85e2003-08-04 23:36:39 +0000268 DEBUG(std::cerr << "\n");
Chris Lattnerd4627092002-12-18 08:14:26 +0000269 removePhysReg(PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000270}
271
Chris Lattner4664bd52002-12-17 02:50:10 +0000272
Chris Lattnerbfa53192003-01-13 00:25:40 +0000273/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner931947d2003-08-17 18:01:15 +0000274/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
275/// then the request is ignored if the physical register does not contain a
276/// virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000277///
278void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Chris Lattner931947d2003-08-17 18:01:15 +0000279 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner490627a2004-02-09 01:26:13 +0000280 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
281 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
282 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000283 } else {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000284 // If the selected register aliases any other registers, we must make
285 // sure that one of the aliases isn't alive...
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000286 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner490627a2004-02-09 01:26:13 +0000287 *AliasSet; ++AliasSet)
288 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
289 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
290 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000291 }
292}
293
294
295/// assignVirtToPhysReg - This method updates local state so that we know
296/// that PhysReg is the proper container for VirtReg now. The physical
297/// register must not be used for anything else when this is called.
298///
299void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner490627a2004-02-09 01:26:13 +0000300 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattnerbfa53192003-01-13 00:25:40 +0000301 // Update information to note the fact that this register was just used, and
302 // it holds VirtReg.
303 PhysRegsUsed[PhysReg] = VirtReg;
304 Virt2PhysRegMap[VirtReg] = PhysReg;
305 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
306}
307
308
Chris Lattner4664bd52002-12-17 02:50:10 +0000309/// isPhysRegAvailable - Return true if the specified physical register is free
310/// and available for use. This also includes checking to see if aliased
311/// registers are all free...
312///
313bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner490627a2004-02-09 01:26:13 +0000314 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattner4664bd52002-12-17 02:50:10 +0000315
316 // If the selected register aliases any other allocated registers, it is
317 // not free!
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000318 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
319 *AliasSet; ++AliasSet)
Chris Lattner490627a2004-02-09 01:26:13 +0000320 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000321 return false; // Can't use this reg then.
Chris Lattner4664bd52002-12-17 02:50:10 +0000322 return true;
323}
324
325
Chris Lattnerbfa53192003-01-13 00:25:40 +0000326/// getFreeReg - Look to see if there is a free register available in the
327/// specified register class. If not, return 0.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000328///
Chris Lattnerbfa53192003-01-13 00:25:40 +0000329unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000330 // Get iterators defining the range of registers that are valid to allocate in
331 // this class, which also specifies the preferred allocation order.
332 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
333 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattner4664bd52002-12-17 02:50:10 +0000334
Chris Lattnerbfa53192003-01-13 00:25:40 +0000335 for (; RI != RE; ++RI)
336 if (isPhysRegAvailable(*RI)) { // Is reg unused?
337 assert(*RI != 0 && "Cannot use register!");
338 return *RI; // Found an unused register!
339 }
340 return 0;
341}
342
343
344/// liberatePhysReg - Make sure the specified physical register is available for
345/// use. If there is currently a value in it, it is either moved out of the way
346/// or spilled to memory.
347///
348void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
349 unsigned PhysReg) {
350 // FIXME: This code checks to see if a register is available, but it really
351 // wants to know if a reg is available BEFORE the instruction executes. If
352 // called after killed operands are freed, it runs the risk of reallocating a
353 // used operand...
354#if 0
355 if (isPhysRegAvailable(PhysReg)) return; // Already available...
356
357 // Check to see if the register is directly used, not indirectly used through
358 // aliases. If aliased registers are the ones actually used, we cannot be
359 // sure that we will be able to save the whole thing if we do a reg-reg copy.
Chris Lattner490627a2004-02-09 01:26:13 +0000360 if (PhysRegsUsed[PhysReg] != -1) {
361 // The virtual register held...
362 unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000363
364 // Check to see if there is a compatible register available. If so, we can
365 // move the value into the new register...
366 //
367 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
368 if (unsigned NewReg = getFreeReg(RC)) {
369 // Emit the code to copy the value...
370 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
371
372 // Update our internal state to indicate that PhysReg is available and Reg
373 // isn't.
374 Virt2PhysRegMap.erase(VirtReg);
375 removePhysReg(PhysReg); // Free the physreg
376
377 // Move reference over to new register...
378 assignVirtToPhysReg(VirtReg, NewReg);
379 return;
Chris Lattner4664bd52002-12-17 02:50:10 +0000380 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000381 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000382#endif
383 spillPhysReg(MBB, I, PhysReg);
384}
385
386
387/// getReg - Find a physical register to hold the specified virtual
388/// register. If all compatible physical registers are used, this method spills
389/// the last used virtual register to the stack, and uses that register.
390///
391unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
392 unsigned VirtReg) {
393 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
394
395 // First check to see if we have a free register of the requested type...
396 unsigned PhysReg = getFreeReg(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000397
Chris Lattner4664bd52002-12-17 02:50:10 +0000398 // If we didn't find an unused register, scavenge one now!
Chris Lattner101b8cd2002-12-16 16:15:28 +0000399 if (PhysReg == 0) {
Chris Lattner0129b862002-12-16 17:44:42 +0000400 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattner4664bd52002-12-17 02:50:10 +0000401
402 // Loop over all of the preallocated registers from the least recently used
403 // to the most recently used. When we find one that is capable of holding
404 // our register, use it.
405 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattner101b8cd2002-12-16 16:15:28 +0000406 assert(i != PhysRegsUseOrder.size() &&
407 "Couldn't find a register of the appropriate class!");
Chris Lattner4664bd52002-12-17 02:50:10 +0000408
409 unsigned R = PhysRegsUseOrder[i];
Chris Lattnere6235442003-08-23 23:49:42 +0000410
411 // We can only use this register if it holds a virtual register (ie, it
412 // can be spilled). Do not use it if it is an explicitly allocated
413 // physical register!
Chris Lattner490627a2004-02-09 01:26:13 +0000414 assert(PhysRegsUsed[R] != -1 &&
Chris Lattnere6235442003-08-23 23:49:42 +0000415 "PhysReg in PhysRegsUseOrder, but is not allocated?");
416 if (PhysRegsUsed[R]) {
417 // If the current register is compatible, use it.
418 if (RegInfo->getRegClass(R) == RC) {
419 PhysReg = R;
420 break;
421 } else {
422 // If one of the registers aliased to the current register is
423 // compatible, use it.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000424 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
425 *AliasSet; ++AliasSet) {
426 if (RegInfo->getRegClass(*AliasSet) == RC) {
427 PhysReg = *AliasSet; // Take an aliased register
428 break;
429 }
430 }
Chris Lattnere6235442003-08-23 23:49:42 +0000431 }
Chris Lattner4664bd52002-12-17 02:50:10 +0000432 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000433 }
434
Chris Lattner4664bd52002-12-17 02:50:10 +0000435 assert(PhysReg && "Physical register not assigned!?!?");
436
Chris Lattner101b8cd2002-12-16 16:15:28 +0000437 // At this point PhysRegsUseOrder[i] is the least recently used register of
438 // compatible register class. Spill it to memory and reap its remains.
Chris Lattner0129b862002-12-16 17:44:42 +0000439 spillPhysReg(MBB, I, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000440 }
441
442 // Now that we know which register we need to assign this to, do it now!
Chris Lattnerbfa53192003-01-13 00:25:40 +0000443 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000444 return PhysReg;
445}
446
Chris Lattner4664bd52002-12-17 02:50:10 +0000447
Chris Lattner101b8cd2002-12-16 16:15:28 +0000448/// reloadVirtReg - This method loads the specified virtual register into a
449/// physical register, returning the physical register chosen. This updates the
450/// regalloc data structures to reflect the fact that the virtual reg is now
451/// alive in a physical register, and the previous one isn't.
452///
453unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
454 MachineBasicBlock::iterator &I,
455 unsigned VirtReg) {
456 std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
457 if (It != Virt2PhysRegMap.end()) {
458 MarkPhysRegRecentlyUsed(It->second);
459 return It->second; // Already have this value available!
460 }
461
Chris Lattnerbfa53192003-01-13 00:25:40 +0000462 unsigned PhysReg = getReg(MBB, I, VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000463
Chris Lattner42714ec2002-12-25 05:05:46 +0000464 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattnerb4e41112002-12-28 20:40:43 +0000465 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000466
Chris Lattnerbfa53192003-01-13 00:25:40 +0000467 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
468
Chris Lattner815b85e2003-08-04 23:36:39 +0000469 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
470 << RegInfo->getName(PhysReg) << "\n");
471
Chris Lattner101b8cd2002-12-16 16:15:28 +0000472 // Add move instruction(s)
Chris Lattnerb4e41112002-12-28 20:40:43 +0000473 RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000474 ++NumReloaded; // Update statistics
475 return PhysReg;
476}
477
Chris Lattner815b85e2003-08-04 23:36:39 +0000478
479
Chris Lattner101b8cd2002-12-16 16:15:28 +0000480void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
481 // loop over each instruction
482 MachineBasicBlock::iterator I = MBB.begin();
483 for (; I != MBB.end(); ++I) {
484 MachineInstr *MI = *I;
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000485 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattner815b85e2003-08-04 23:36:39 +0000486 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
487 std::cerr << " Regs have values: ";
Chris Lattner490627a2004-02-09 01:26:13 +0000488 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
489 if (PhysRegsUsed[i] != -1)
490 std::cerr << "[" << RegInfo->getName(i)
491 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattner815b85e2003-08-04 23:36:39 +0000492 std::cerr << "\n");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000493
Chris Lattner4664bd52002-12-17 02:50:10 +0000494 // Loop over the implicit uses, making sure that they are at the head of the
495 // use order list, so they don't get reallocated.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000496 for (const unsigned *ImplicitUses = TID.ImplicitUses;
497 *ImplicitUses; ++ImplicitUses)
498 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000499
Brian Gaeke91e16e72003-08-15 21:19:25 +0000500 // Get the used operands into registers. This has the potential to spill
Chris Lattner815b85e2003-08-04 23:36:39 +0000501 // incoming values if we are out of registers. Note that we completely
502 // ignore physical register uses here. We assume that if an explicit
503 // physical register is referenced by the instruction, that it is guaranteed
504 // to be live-in, or the input is badly hosed.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000505 //
506 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000507 if (MI->getOperand(i).isUse() &&
508 !MI->getOperand(i).isDef() &&
509 MI->getOperand(i).isVirtualRegister()){
Chris Lattner101b8cd2002-12-16 16:15:28 +0000510 unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
511 unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
512 MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
513 }
514
Chris Lattnerbfa53192003-01-13 00:25:40 +0000515 if (!DisableKill) {
516 // If this instruction is the last user of anything in registers, kill the
517 // value, freeing the register being used, so it doesn't need to be
518 // spilled to memory.
519 //
520 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000521 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000522 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000523 unsigned PhysReg = VirtReg;
Chris Lattnerc330b982004-01-31 21:27:19 +0000524 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner5a78ee82003-05-12 03:54:14 +0000525 std::map<unsigned, unsigned>::iterator I =
526 Virt2PhysRegMap.find(VirtReg);
527 assert(I != Virt2PhysRegMap.end());
528 PhysReg = I->second;
529 Virt2PhysRegMap.erase(I);
530 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000531
Chris Lattner5a78ee82003-05-12 03:54:14 +0000532 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000533 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
534 << "[%reg" << VirtReg <<"], removing it from live set\n");
Chris Lattner506fa682003-08-05 00:49:09 +0000535 removePhysReg(PhysReg);
Chris Lattner5a78ee82003-05-12 03:54:14 +0000536 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000537 }
538 }
539
540 // Loop over all of the operands of the instruction, spilling registers that
541 // are defined, and marking explicit destinations in the PhysRegsUsed map.
542 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000543 if (MI->getOperand(i).isDef() &&
Chris Lattnerbfa53192003-01-13 00:25:40 +0000544 MI->getOperand(i).isPhysicalRegister()) {
545 unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
Chris Lattner931947d2003-08-17 18:01:15 +0000546 spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg
Chris Lattnerbfa53192003-01-13 00:25:40 +0000547 PhysRegsUsed[Reg] = 0; // It is free and reserved now
548 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000549 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
550 *AliasSet; ++AliasSet) {
551 PhysRegsUseOrder.push_back(*AliasSet);
552 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
553 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000554 }
555
556 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000557 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
558 *ImplicitDefs; ++ImplicitDefs) {
559 unsigned Reg = *ImplicitDefs;
560 spillPhysReg(MBB, I, Reg);
561 PhysRegsUseOrder.push_back(Reg);
562 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000563 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
564 *AliasSet; ++AliasSet) {
565 PhysRegsUseOrder.push_back(*AliasSet);
566 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
567 }
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000568 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000569
Chris Lattner101b8cd2002-12-16 16:15:28 +0000570 // Okay, we have allocated all of the source operands and spilled any values
571 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattnerbfa53192003-01-13 00:25:40 +0000572 // implicit defs and assign them to a register, spilling incoming values if
573 // we need to scavenge a register.
Chris Lattnerd4627092002-12-18 08:14:26 +0000574 //
Chris Lattner101b8cd2002-12-16 16:15:28 +0000575 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000576 if (MI->getOperand(i).isDef() &&
577 MI->getOperand(i).isVirtualRegister()) {
Chris Lattner101b8cd2002-12-16 16:15:28 +0000578 unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
579 unsigned DestPhysReg;
580
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000581 // If DestVirtReg already has a value, use it.
Chris Lattner5a78ee82003-05-12 03:54:14 +0000582 std::map<unsigned, unsigned>::iterator DestI =
583 Virt2PhysRegMap.find(DestVirtReg);
584 if (DestI != Virt2PhysRegMap.end()) {
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000585 DestPhysReg = DestI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000586 }
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000587 else {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000588 DestPhysReg = getReg(MBB, I, DestVirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000589 }
Chris Lattner5a78ee82003-05-12 03:54:14 +0000590 markVirtRegModified(DestVirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000591 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
592 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000593
594 if (!DisableKill) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000595 // If this instruction defines any registers that are immediately dead,
596 // kill them now.
597 //
598 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000599 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000600 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000601 unsigned PhysReg = VirtReg;
Chris Lattnerc330b982004-01-31 21:27:19 +0000602 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner5a78ee82003-05-12 03:54:14 +0000603 std::map<unsigned, unsigned>::iterator I =
604 Virt2PhysRegMap.find(VirtReg);
605 assert(I != Virt2PhysRegMap.end());
606 PhysReg = I->second;
607 Virt2PhysRegMap.erase(I);
608 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000609
Chris Lattner5a78ee82003-05-12 03:54:14 +0000610 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000611 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
612 << " [%reg" << VirtReg
613 << "] is never used, removing it frame live list\n");
Chris Lattner5a78ee82003-05-12 03:54:14 +0000614 removePhysReg(PhysReg);
615 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000616 }
617 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000618 }
619
620 // Rewind the iterator to point to the first flow control instruction...
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000621 const TargetInstrInfo &TII = TM->getInstrInfo();
Chris Lattner176866c2003-01-16 18:06:43 +0000622 I = MBB.end();
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000623 while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
Chris Lattner101b8cd2002-12-16 16:15:28 +0000624 --I;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000625
626 // Spill all physical registers holding virtual registers now.
Chris Lattner490627a2004-02-09 01:26:13 +0000627 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
628 if (PhysRegsUsed[i] != -1)
629 if (unsigned VirtReg = PhysRegsUsed[i])
630 spillVirtReg(MBB, I, VirtReg, i);
631 else
632 removePhysReg(i);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000633
Chris Lattnerbfa53192003-01-13 00:25:40 +0000634 for (std::map<unsigned, unsigned>::iterator I = Virt2PhysRegMap.begin(),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000635 E = Virt2PhysRegMap.end(); I != E; ++I)
Chris Lattnerbfa53192003-01-13 00:25:40 +0000636 std::cerr << "Register still mapped: " << I->first << " -> "
Chris Lattner5a78ee82003-05-12 03:54:14 +0000637 << I->second << "\n";
Chris Lattnerbfa53192003-01-13 00:25:40 +0000638
Chris Lattner101b8cd2002-12-16 16:15:28 +0000639 assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
Chris Lattner931947d2003-08-17 18:01:15 +0000640
641 // Clear any physical register which appear live at the end of the basic
642 // block, but which do not hold any virtual registers. e.g., the stack
643 // pointer.
644 PhysRegsUseOrder.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000645}
646
Chris Lattner0ea32b82002-12-17 03:16:10 +0000647
Chris Lattner101b8cd2002-12-16 16:15:28 +0000648/// runOnMachineFunction - Register allocate the whole function
649///
650bool RA::runOnMachineFunction(MachineFunction &Fn) {
651 DEBUG(std::cerr << "Machine Function " << "\n");
652 MF = &Fn;
Chris Lattnerb4e41112002-12-28 20:40:43 +0000653 TM = &Fn.getTarget();
654 RegInfo = TM->getRegisterInfo();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000655
Chris Lattner490627a2004-02-09 01:26:13 +0000656 memset(PhysRegsUsed, -1, RegInfo->getNumRegs()*sizeof(unsigned));
657
Chris Lattnerd4627092002-12-18 08:14:26 +0000658 if (!DisableKill)
Chris Lattnerbfa53192003-01-13 00:25:40 +0000659 LV = &getAnalysis<LiveVariables>();
Chris Lattnerd4627092002-12-18 08:14:26 +0000660
Chris Lattner101b8cd2002-12-16 16:15:28 +0000661 // Loop over all of the basic blocks, eliminating virtual register references
662 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
663 MBB != MBBe; ++MBB)
664 AllocateBasicBlock(*MBB);
665
Chris Lattnerb4e41112002-12-28 20:40:43 +0000666 StackSlotForVirtReg.clear();
Chris Lattnerbfa53192003-01-13 00:25:40 +0000667 VirtRegModified.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000668 return true;
669}
670
Chris Lattnerc330b982004-01-31 21:27:19 +0000671FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000672 return new RA();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000673}
Brian Gaeke960707c2003-11-11 22:41:34 +0000674