blob: 0194b3a6c2d4479cb7d670c7519596ec2b8dfb34 [file] [log] [blame]
Tim Northover00ed9962014-03-29 10:18:08 +00001; RUN: llc < %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin | FileCheck %s
2
3define void @t0(i32 %a) nounwind {
4entry:
5; CHECK: t0
6; CHECK: str {{w[0-9]+}}, [sp, #12]
7; CHECK-NEXT: ldr [[REGISTER:w[0-9]+]], [sp, #12]
8; CHECK-NEXT: str [[REGISTER]], [sp, #12]
9; CHECK: ret
10 %a.addr = alloca i32, align 4
11 store i32 %a, i32* %a.addr
12 %tmp = load i32* %a.addr
13 store i32 %tmp, i32* %a.addr
14 ret void
15}
16
17define void @t1(i64 %a) nounwind {
18; CHECK: t1
19; CHECK: str {{x[0-9]+}}, [sp, #8]
20; CHECK-NEXT: ldr [[REGISTER:x[0-9]+]], [sp, #8]
21; CHECK-NEXT: str [[REGISTER]], [sp, #8]
22; CHECK: ret
23 %a.addr = alloca i64, align 4
24 store i64 %a, i64* %a.addr
25 %tmp = load i64* %a.addr
26 store i64 %tmp, i64* %a.addr
27 ret void
28}
29
30define zeroext i1 @i1(i1 %a) nounwind {
31entry:
32; CHECK: @i1
33; CHECK: and w0, w0, #0x1
34; CHECK: strb w0, [sp, #15]
35; CHECK: ldrb w0, [sp, #15]
36; CHECK: and w0, w0, #0x1
37; CHECK: and w0, w0, #0x1
38; CHECK: add sp, sp, #16
39; CHECK: ret
40 %a.addr = alloca i1, align 1
41 store i1 %a, i1* %a.addr, align 1
42 %0 = load i1* %a.addr, align 1
43 ret i1 %0
44}
45
46define i32 @t2(i32 *%ptr) nounwind {
47entry:
48; CHECK-LABEL: t2:
49; CHECK: ldur w0, [x0, #-4]
50; CHECK: ret
51 %0 = getelementptr i32 *%ptr, i32 -1
52 %1 = load i32* %0, align 4
53 ret i32 %1
54}
55
56define i32 @t3(i32 *%ptr) nounwind {
57entry:
58; CHECK-LABEL: t3:
59; CHECK: ldur w0, [x0, #-256]
60; CHECK: ret
61 %0 = getelementptr i32 *%ptr, i32 -64
62 %1 = load i32* %0, align 4
63 ret i32 %1
64}
65
66define void @t4(i32 *%ptr) nounwind {
67entry:
68; CHECK-LABEL: t4:
69; CHECK: movz w8, #0
70; CHECK: stur w8, [x0, #-4]
71; CHECK: ret
72 %0 = getelementptr i32 *%ptr, i32 -1
73 store i32 0, i32* %0, align 4
74 ret void
75}
76
77define void @t5(i32 *%ptr) nounwind {
78entry:
79; CHECK-LABEL: t5:
80; CHECK: movz w8, #0
81; CHECK: stur w8, [x0, #-256]
82; CHECK: ret
83 %0 = getelementptr i32 *%ptr, i32 -64
84 store i32 0, i32* %0, align 4
85 ret void
86}
87
88define void @t6() nounwind {
89; CHECK: t6
Tim Northover4b2f8a92014-04-30 11:19:28 +000090; CHECK: brk #0x1
Tim Northover00ed9962014-03-29 10:18:08 +000091 tail call void @llvm.trap()
92 ret void
93}
94
95declare void @llvm.trap() nounwind