blob: 13b4b50149cedc2d70ac34d0ee585967fe2cfffd [file] [log] [blame]
Matt Arsenault52ef4012016-07-26 16:45:58 +00001//===-- AMDGPUMachineFunctionInfo.cpp ---------------------------------------=//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
Vincent Lejeuneace6f732013-04-01 21:47:53 +000010#include "AMDGPUMachineFunction.h"
Matt Arsenault52ef4012016-07-26 16:45:58 +000011#include "AMDGPUSubtarget.h"
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000012#include "AMDGPUPerfHintAnalysis.h"
13#include "llvm/CodeGen/MachineModuleInfo.h"
Matt Arsenaulte935f052016-06-18 05:15:53 +000014
Craig Topper8fc40962013-07-17 00:31:35 +000015using namespace llvm;
Vincent Lejeuneace6f732013-04-01 21:47:53 +000016
Vincent Lejeuneace6f732013-04-01 21:47:53 +000017AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
Matt Arsenault762af962014-07-13 03:06:39 +000018 MachineFunctionInfo(),
Matt Arsenault52ef4012016-07-26 16:45:58 +000019 LocalMemoryObjects(),
Matt Arsenault75e71922018-06-28 10:18:55 +000020 ExplicitKernArgSize(0),
Matt Arsenaulte935f052016-06-18 05:15:53 +000021 MaxKernArgAlign(0),
Matt Arsenault3f981402014-09-15 15:41:53 +000022 LDSSize(0),
Matthias Braunf1caa282017-12-15 22:22:58 +000023 IsEntryFunction(AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())),
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000024 NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath),
25 MemoryBound(false),
26 WaveLimiter(false) {
Matt Arsenault4bec7d42018-07-20 09:05:08 +000027 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
28
Matt Arsenault52ef4012016-07-26 16:45:58 +000029 // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
30 // except reserved size is not correctly aligned.
Matt Arsenault4bec7d42018-07-20 09:05:08 +000031 const Function &F = MF.getFunction();
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000032
33 if (auto *Resolver = MF.getMMI().getResolver()) {
34 if (AMDGPUPerfHintAnalysis *PHA = static_cast<AMDGPUPerfHintAnalysis*>(
35 Resolver->getAnalysisIfAvailable(&AMDGPUPerfHintAnalysisID, true))) {
Matt Arsenault4bec7d42018-07-20 09:05:08 +000036 MemoryBound = PHA->isMemoryBound(&F);
37 WaveLimiter = PHA->needsWaveLimiter(&F);
Stanislav Mekhanoshin1c538422018-05-25 17:25:12 +000038 }
39 }
Matt Arsenault4bec7d42018-07-20 09:05:08 +000040
41 CallingConv::ID CC = F.getCallingConv();
42 if (CC == CallingConv::AMDGPU_KERNEL || CC == CallingConv::SPIR_KERNEL)
43 ExplicitKernArgSize = ST.getExplicitKernArgSize(F, MaxKernArgAlign);
Nikolay Haustovbeb24f52016-07-01 10:00:58 +000044}
45
Matt Arsenault52ef4012016-07-26 16:45:58 +000046unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,
47 const GlobalValue &GV) {
48 auto Entry = LocalMemoryObjects.insert(std::make_pair(&GV, 0));
49 if (!Entry.second)
50 return Entry.first->second;
51
52 unsigned Align = GV.getAlignment();
53 if (Align == 0)
54 Align = DL.getABITypeAlignment(GV.getValueType());
55
56 /// TODO: We should sort these to minimize wasted space due to alignment
57 /// padding. Currently the padding is decided by the first encountered use
58 /// during lowering.
59 unsigned Offset = LDSSize = alignTo(LDSSize, Align);
60
61 Entry.first->second = Offset;
62 LDSSize += DL.getTypeAllocSize(GV.getValueType());
63
64 return Offset;
Nikolay Haustovbeb24f52016-07-01 10:00:58 +000065}