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gerrit-public.fairphone.software / toolchain / llvm-project / 9d16fa09c6827c5baffe2b2a470443f6c9cc560a / . / llvm / test / CodeGen / AMDGPU / amdgpu-codegenprepare-i16-to-i32.ll
blob: 95a206e1dd00d3910c42f8faad0993e2002677a3 [file] [log] [blame]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1; RUN: opt -S -mtriple=amdgcn-- -amdgpu-codegenprepare %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
2; RUN: opt -S -mtriple=amdgcn-- -mcpu=tonga -amdgpu-codegenprepare %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]3
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]4; GCN-LABEL: @add_i3(
5; SI: %r = add i3 %a, %b
6; SI-NEXT: ret i3 %r
7; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
8; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]9; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]10; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
11; VI-NEXT: ret i3 %[[R_3]]
12define i3 @add_i3(i3 %a, i3 %b) {
13 %r = add i3 %a, %b
14 ret i3 %r
15}
16
17; GCN-LABEL: @add_nsw_i3(
18; SI: %r = add nsw i3 %a, %b
19; SI-NEXT: ret i3 %r
20; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
21; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]22; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]23; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
24; VI-NEXT: ret i3 %[[R_3]]
25define i3 @add_nsw_i3(i3 %a, i3 %b) {
26 %r = add nsw i3 %a, %b
27 ret i3 %r
28}
29
30; GCN-LABEL: @add_nuw_i3(
31; SI: %r = add nuw i3 %a, %b
32; SI-NEXT: ret i3 %r
33; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
34; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]35; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]36; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
37; VI-NEXT: ret i3 %[[R_3]]
38define i3 @add_nuw_i3(i3 %a, i3 %b) {
39 %r = add nuw i3 %a, %b
40 ret i3 %r
41}
42
43; GCN-LABEL: @add_nuw_nsw_i3(
44; SI: %r = add nuw nsw i3 %a, %b
45; SI-NEXT: ret i3 %r
46; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
47; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
48; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
49; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
50; VI-NEXT: ret i3 %[[R_3]]
51define i3 @add_nuw_nsw_i3(i3 %a, i3 %b) {
52 %r = add nuw nsw i3 %a, %b
53 ret i3 %r
54}
55
56; GCN-LABEL: @sub_i3(
57; SI: %r = sub i3 %a, %b
58; SI-NEXT: ret i3 %r
59; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
60; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]61; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]62; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
63; VI-NEXT: ret i3 %[[R_3]]
64define i3 @sub_i3(i3 %a, i3 %b) {
65 %r = sub i3 %a, %b
66 ret i3 %r
67}
68
69; GCN-LABEL: @sub_nsw_i3(
70; SI: %r = sub nsw i3 %a, %b
71; SI-NEXT: ret i3 %r
72; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
73; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
74; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw i32 %[[A_32]], %[[B_32]]
75; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
76; VI-NEXT: ret i3 %[[R_3]]
77define i3 @sub_nsw_i3(i3 %a, i3 %b) {
78 %r = sub nsw i3 %a, %b
79 ret i3 %r
80}
81
82; GCN-LABEL: @sub_nuw_i3(
83; SI: %r = sub nuw i3 %a, %b
84; SI-NEXT: ret i3 %r
85; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
86; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]87; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]88; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
89; VI-NEXT: ret i3 %[[R_3]]
90define i3 @sub_nuw_i3(i3 %a, i3 %b) {
91 %r = sub nuw i3 %a, %b
92 ret i3 %r
93}
94
95; GCN-LABEL: @sub_nuw_nsw_i3(
96; SI: %r = sub nuw nsw i3 %a, %b
97; SI-NEXT: ret i3 %r
98; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
99; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
100; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw i32 %[[A_32]], %[[B_32]]
101; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
102; VI-NEXT: ret i3 %[[R_3]]
103define i3 @sub_nuw_nsw_i3(i3 %a, i3 %b) {
104 %r = sub nuw nsw i3 %a, %b
105 ret i3 %r
106}
107
108; GCN-LABEL: @mul_i3(
109; SI: %r = mul i3 %a, %b
110; SI-NEXT: ret i3 %r
111; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
112; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]113; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]114; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
115; VI-NEXT: ret i3 %[[R_3]]
116define i3 @mul_i3(i3 %a, i3 %b) {
117 %r = mul i3 %a, %b
118 ret i3 %r
119}
120
121; GCN-LABEL: @mul_nsw_i3(
122; SI: %r = mul nsw i3 %a, %b
123; SI-NEXT: ret i3 %r
124; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
125; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]126; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]127; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
128; VI-NEXT: ret i3 %[[R_3]]
129define i3 @mul_nsw_i3(i3 %a, i3 %b) {
130 %r = mul nsw i3 %a, %b
131 ret i3 %r
132}
133
134; GCN-LABEL: @mul_nuw_i3(
135; SI: %r = mul nuw i3 %a, %b
136; SI-NEXT: ret i3 %r
137; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
138; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]139; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]140; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
141; VI-NEXT: ret i3 %[[R_3]]
142define i3 @mul_nuw_i3(i3 %a, i3 %b) {
143 %r = mul nuw i3 %a, %b
144 ret i3 %r
145}
146
147; GCN-LABEL: @mul_nuw_nsw_i3(
148; SI: %r = mul nuw nsw i3 %a, %b
149; SI-NEXT: ret i3 %r
150; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
151; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
152; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw i32 %[[A_32]], %[[B_32]]
153; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
154; VI-NEXT: ret i3 %[[R_3]]
155define i3 @mul_nuw_nsw_i3(i3 %a, i3 %b) {
156 %r = mul nuw nsw i3 %a, %b
157 ret i3 %r
158}
159
160; GCN-LABEL: @urem_i3(
161; SI: %r = urem i3 %a, %b
162; SI-NEXT: ret i3 %r
163; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
164; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
165; VI-NEXT: %[[R_32:[0-9]+]] = urem i32 %[[A_32]], %[[B_32]]
166; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
167; VI-NEXT: ret i3 %[[R_3]]
168define i3 @urem_i3(i3 %a, i3 %b) {
169 %r = urem i3 %a, %b
170 ret i3 %r
171}
172
173; GCN-LABEL: @srem_i3(
174; SI: %r = srem i3 %a, %b
175; SI-NEXT: ret i3 %r
176; VI: %[[A_32:[0-9]+]] = sext i3 %a to i32
177; VI-NEXT: %[[B_32:[0-9]+]] = sext i3 %b to i32
178; VI-NEXT: %[[R_32:[0-9]+]] = srem i32 %[[A_32]], %[[B_32]]
179; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
180; VI-NEXT: ret i3 %[[R_3]]
181define i3 @srem_i3(i3 %a, i3 %b) {
182 %r = srem i3 %a, %b
183 ret i3 %r
184}
185
186; GCN-LABEL: @shl_i3(
187; SI: %r = shl i3 %a, %b
188; SI-NEXT: ret i3 %r
189; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
190; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]191; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]192; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
193; VI-NEXT: ret i3 %[[R_3]]
194define i3 @shl_i3(i3 %a, i3 %b) {
195 %r = shl i3 %a, %b
196 ret i3 %r
197}
198
199; GCN-LABEL: @shl_nsw_i3(
200; SI: %r = shl nsw i3 %a, %b
201; SI-NEXT: ret i3 %r
202; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
203; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]204; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]205; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
206; VI-NEXT: ret i3 %[[R_3]]
207define i3 @shl_nsw_i3(i3 %a, i3 %b) {
208 %r = shl nsw i3 %a, %b
209 ret i3 %r
210}
211
212; GCN-LABEL: @shl_nuw_i3(
213; SI: %r = shl nuw i3 %a, %b
214; SI-NEXT: ret i3 %r
215; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
216; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]217; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]218; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
219; VI-NEXT: ret i3 %[[R_3]]
220define i3 @shl_nuw_i3(i3 %a, i3 %b) {
221 %r = shl nuw i3 %a, %b
222 ret i3 %r
223}
224
225; GCN-LABEL: @shl_nuw_nsw_i3(
226; SI: %r = shl nuw nsw i3 %a, %b
227; SI-NEXT: ret i3 %r
228; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
229; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
230; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
231; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
232; VI-NEXT: ret i3 %[[R_3]]
233define i3 @shl_nuw_nsw_i3(i3 %a, i3 %b) {
234 %r = shl nuw nsw i3 %a, %b
235 ret i3 %r
236}
237
238; GCN-LABEL: @lshr_i3(
239; SI: %r = lshr i3 %a, %b
240; SI-NEXT: ret i3 %r
241; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
242; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
243; VI-NEXT: %[[R_32:[0-9]+]] = lshr i32 %[[A_32]], %[[B_32]]
244; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
245; VI-NEXT: ret i3 %[[R_3]]
246define i3 @lshr_i3(i3 %a, i3 %b) {
247 %r = lshr i3 %a, %b
248 ret i3 %r
249}
250
251; GCN-LABEL: @lshr_exact_i3(
252; SI: %r = lshr exact i3 %a, %b
253; SI-NEXT: ret i3 %r
254; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
255; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
256; VI-NEXT: %[[R_32:[0-9]+]] = lshr exact i32 %[[A_32]], %[[B_32]]
257; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
258; VI-NEXT: ret i3 %[[R_3]]
259define i3 @lshr_exact_i3(i3 %a, i3 %b) {
260 %r = lshr exact i3 %a, %b
261 ret i3 %r
262}
263
264; GCN-LABEL: @ashr_i3(
265; SI: %r = ashr i3 %a, %b
266; SI-NEXT: ret i3 %r
267; VI: %[[A_32:[0-9]+]] = sext i3 %a to i32
268; VI-NEXT: %[[B_32:[0-9]+]] = sext i3 %b to i32
269; VI-NEXT: %[[R_32:[0-9]+]] = ashr i32 %[[A_32]], %[[B_32]]
270; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
271; VI-NEXT: ret i3 %[[R_3]]
272define i3 @ashr_i3(i3 %a, i3 %b) {
273 %r = ashr i3 %a, %b
274 ret i3 %r
275}
276
277; GCN-LABEL: @ashr_exact_i3(
278; SI: %r = ashr exact i3 %a, %b
279; SI-NEXT: ret i3 %r
280; VI: %[[A_32:[0-9]+]] = sext i3 %a to i32
281; VI-NEXT: %[[B_32:[0-9]+]] = sext i3 %b to i32
282; VI-NEXT: %[[R_32:[0-9]+]] = ashr exact i32 %[[A_32]], %[[B_32]]
283; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
284; VI-NEXT: ret i3 %[[R_3]]
285define i3 @ashr_exact_i3(i3 %a, i3 %b) {
286 %r = ashr exact i3 %a, %b
287 ret i3 %r
288}
289
290; GCN-LABEL: @and_i3(
291; SI: %r = and i3 %a, %b
292; SI-NEXT: ret i3 %r
293; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
294; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
295; VI-NEXT: %[[R_32:[0-9]+]] = and i32 %[[A_32]], %[[B_32]]
296; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
297; VI-NEXT: ret i3 %[[R_3]]
298define i3 @and_i3(i3 %a, i3 %b) {
299 %r = and i3 %a, %b
300 ret i3 %r
301}
302
303; GCN-LABEL: @or_i3(
304; SI: %r = or i3 %a, %b
305; SI-NEXT: ret i3 %r
306; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
307; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
308; VI-NEXT: %[[R_32:[0-9]+]] = or i32 %[[A_32]], %[[B_32]]
309; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
310; VI-NEXT: ret i3 %[[R_3]]
311define i3 @or_i3(i3 %a, i3 %b) {
312 %r = or i3 %a, %b
313 ret i3 %r
314}
315
316; GCN-LABEL: @xor_i3(
317; SI: %r = xor i3 %a, %b
318; SI-NEXT: ret i3 %r
319; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
320; VI-NEXT: %[[B_32:[0-9]+]] = zext i3 %b to i32
321; VI-NEXT: %[[R_32:[0-9]+]] = xor i32 %[[A_32]], %[[B_32]]
322; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[R_32]] to i3
323; VI-NEXT: ret i3 %[[R_3]]
324define i3 @xor_i3(i3 %a, i3 %b) {
325 %r = xor i3 %a, %b
326 ret i3 %r
327}
328
329; GCN-LABEL: @select_eq_i3(
330; SI: %cmp = icmp eq i3 %a, %b
331; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
332; SI-NEXT: ret i3 %sel
333; VI: %[[A_32_0:[0-9]+]] = zext i3 %a to i32
334; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i3 %b to i32
335; VI-NEXT: %[[CMP:[0-9]+]] = icmp eq i32 %[[A_32_0]], %[[B_32_0]]
336; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i3 %a to i32
337; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i3 %b to i32
338; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
339; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
340; VI-NEXT: ret i3 %[[SEL_3]]
341define i3 @select_eq_i3(i3 %a, i3 %b) {
342 %cmp = icmp eq i3 %a, %b
343 %sel = select i1 %cmp, i3 %a, i3 %b
344 ret i3 %sel
345}
346
347; GCN-LABEL: @select_ne_i3(
348; SI: %cmp = icmp ne i3 %a, %b
349; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
350; SI-NEXT: ret i3 %sel
351; VI: %[[A_32_0:[0-9]+]] = zext i3 %a to i32
352; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i3 %b to i32
353; VI-NEXT: %[[CMP:[0-9]+]] = icmp ne i32 %[[A_32_0]], %[[B_32_0]]
354; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i3 %a to i32
355; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i3 %b to i32
356; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
357; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
358; VI-NEXT: ret i3 %[[SEL_3]]
359define i3 @select_ne_i3(i3 %a, i3 %b) {
360 %cmp = icmp ne i3 %a, %b
361 %sel = select i1 %cmp, i3 %a, i3 %b
362 ret i3 %sel
363}
364
365; GCN-LABEL: @select_ugt_i3(
366; SI: %cmp = icmp ugt i3 %a, %b
367; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
368; SI-NEXT: ret i3 %sel
369; VI: %[[A_32_0:[0-9]+]] = zext i3 %a to i32
370; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i3 %b to i32
371; VI-NEXT: %[[CMP:[0-9]+]] = icmp ugt i32 %[[A_32_0]], %[[B_32_0]]
372; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i3 %a to i32
373; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i3 %b to i32
374; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
375; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
376; VI-NEXT: ret i3 %[[SEL_3]]
377define i3 @select_ugt_i3(i3 %a, i3 %b) {
378 %cmp = icmp ugt i3 %a, %b
379 %sel = select i1 %cmp, i3 %a, i3 %b
380 ret i3 %sel
381}
382
383; GCN-LABEL: @select_uge_i3(
384; SI: %cmp = icmp uge i3 %a, %b
385; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
386; SI-NEXT: ret i3 %sel
387; VI: %[[A_32_0:[0-9]+]] = zext i3 %a to i32
388; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i3 %b to i32
389; VI-NEXT: %[[CMP:[0-9]+]] = icmp uge i32 %[[A_32_0]], %[[B_32_0]]
390; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i3 %a to i32
391; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i3 %b to i32
392; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
393; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
394; VI-NEXT: ret i3 %[[SEL_3]]
395define i3 @select_uge_i3(i3 %a, i3 %b) {
396 %cmp = icmp uge i3 %a, %b
397 %sel = select i1 %cmp, i3 %a, i3 %b
398 ret i3 %sel
399}
400
401; GCN-LABEL: @select_ult_i3(
402; SI: %cmp = icmp ult i3 %a, %b
403; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
404; SI-NEXT: ret i3 %sel
405; VI: %[[A_32_0:[0-9]+]] = zext i3 %a to i32
406; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i3 %b to i32
407; VI-NEXT: %[[CMP:[0-9]+]] = icmp ult i32 %[[A_32_0]], %[[B_32_0]]
408; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i3 %a to i32
409; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i3 %b to i32
410; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
411; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
412; VI-NEXT: ret i3 %[[SEL_3]]
413define i3 @select_ult_i3(i3 %a, i3 %b) {
414 %cmp = icmp ult i3 %a, %b
415 %sel = select i1 %cmp, i3 %a, i3 %b
416 ret i3 %sel
417}
418
419; GCN-LABEL: @select_ule_i3(
420; SI: %cmp = icmp ule i3 %a, %b
421; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
422; SI-NEXT: ret i3 %sel
423; VI: %[[A_32_0:[0-9]+]] = zext i3 %a to i32
424; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i3 %b to i32
425; VI-NEXT: %[[CMP:[0-9]+]] = icmp ule i32 %[[A_32_0]], %[[B_32_0]]
426; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i3 %a to i32
427; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i3 %b to i32
428; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
429; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
430; VI-NEXT: ret i3 %[[SEL_3]]
431define i3 @select_ule_i3(i3 %a, i3 %b) {
432 %cmp = icmp ule i3 %a, %b
433 %sel = select i1 %cmp, i3 %a, i3 %b
434 ret i3 %sel
435}
436
437; GCN-LABEL: @select_sgt_i3(
438; SI: %cmp = icmp sgt i3 %a, %b
439; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
440; SI-NEXT: ret i3 %sel
441; VI: %[[A_32_0:[0-9]+]] = sext i3 %a to i32
442; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i3 %b to i32
443; VI-NEXT: %[[CMP:[0-9]+]] = icmp sgt i32 %[[A_32_0]], %[[B_32_0]]
444; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i3 %a to i32
445; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i3 %b to i32
446; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
447; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
448; VI-NEXT: ret i3 %[[SEL_3]]
449define i3 @select_sgt_i3(i3 %a, i3 %b) {
450 %cmp = icmp sgt i3 %a, %b
451 %sel = select i1 %cmp, i3 %a, i3 %b
452 ret i3 %sel
453}
454
455; GCN-LABEL: @select_sge_i3(
456; SI: %cmp = icmp sge i3 %a, %b
457; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
458; SI-NEXT: ret i3 %sel
459; VI: %[[A_32_0:[0-9]+]] = sext i3 %a to i32
460; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i3 %b to i32
461; VI-NEXT: %[[CMP:[0-9]+]] = icmp sge i32 %[[A_32_0]], %[[B_32_0]]
462; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i3 %a to i32
463; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i3 %b to i32
464; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
465; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
466; VI-NEXT: ret i3 %[[SEL_3]]
467define i3 @select_sge_i3(i3 %a, i3 %b) {
468 %cmp = icmp sge i3 %a, %b
469 %sel = select i1 %cmp, i3 %a, i3 %b
470 ret i3 %sel
471}
472
473; GCN-LABEL: @select_slt_i3(
474; SI: %cmp = icmp slt i3 %a, %b
475; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
476; SI-NEXT: ret i3 %sel
477; VI: %[[A_32_0:[0-9]+]] = sext i3 %a to i32
478; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i3 %b to i32
479; VI-NEXT: %[[CMP:[0-9]+]] = icmp slt i32 %[[A_32_0]], %[[B_32_0]]
480; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i3 %a to i32
481; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i3 %b to i32
482; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
483; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
484; VI-NEXT: ret i3 %[[SEL_3]]
485define i3 @select_slt_i3(i3 %a, i3 %b) {
486 %cmp = icmp slt i3 %a, %b
487 %sel = select i1 %cmp, i3 %a, i3 %b
488 ret i3 %sel
489}
490
491; GCN-LABEL: @select_sle_i3(
492; SI: %cmp = icmp sle i3 %a, %b
493; SI-NEXT: %sel = select i1 %cmp, i3 %a, i3 %b
494; SI-NEXT: ret i3 %sel
495; VI: %[[A_32_0:[0-9]+]] = sext i3 %a to i32
496; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i3 %b to i32
497; VI-NEXT: %[[CMP:[0-9]+]] = icmp sle i32 %[[A_32_0]], %[[B_32_0]]
498; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i3 %a to i32
499; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i3 %b to i32
500; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
501; VI-NEXT: %[[SEL_3:[0-9]+]] = trunc i32 %[[SEL_32]] to i3
502; VI-NEXT: ret i3 %[[SEL_3]]
503define i3 @select_sle_i3(i3 %a, i3 %b) {
504 %cmp = icmp sle i3 %a, %b
505 %sel = select i1 %cmp, i3 %a, i3 %b
506 ret i3 %sel
507}
508
509declare i3 @llvm.bitreverse.i3(i3)
510; GCN-LABEL: @bitreverse_i3(
511; SI: %brev = call i3 @llvm.bitreverse.i3(i3 %a)
512; SI-NEXT: ret i3 %brev
513; VI: %[[A_32:[0-9]+]] = zext i3 %a to i32
514; VI-NEXT: %[[R_32:[0-9]+]] = call i32 @llvm.bitreverse.i32(i32 %[[A_32]])
515; VI-NEXT: %[[S_32:[0-9]+]] = lshr i32 %[[R_32]], 29
516; VI-NEXT: %[[R_3:[0-9]+]] = trunc i32 %[[S_32]] to i3
517; VI-NEXT: ret i3 %[[R_3]]
518define i3 @bitreverse_i3(i3 %a) {
519 %brev = call i3 @llvm.bitreverse.i3(i3 %a)
520 ret i3 %brev
521}
522
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]523; GCN-LABEL: @add_i16(
524; SI: %r = add i16 %a, %b
525; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]526; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]527; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]528; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]529; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
530; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]531define i16 @add_i16(i16 %a, i16 %b) {
532 %r = add i16 %a, %b
533 ret i16 %r
534}
535
Matt Arsenault269ffda2016-12-06 23:18:06 +0000[diff] [blame]536; GCN-LABEL: @constant_add_i16(
537; VI: ret i16 3
538define i16 @constant_add_i16() {
539 %r = add i16 1, 2
540 ret i16 %r
541}
542
543; GCN-LABEL: @constant_add_nsw_i16(
544; VI: ret i16 3
545define i16 @constant_add_nsw_i16() {
546 %r = add nsw i16 1, 2
547 ret i16 %r
548}
549
550; GCN-LABEL: @constant_add_nuw_i16(
551; VI: ret i16 3
552define i16 @constant_add_nuw_i16() {
553 %r = add nsw i16 1, 2
554 ret i16 %r
555}
556
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]557; GCN-LABEL: @add_nsw_i16(
558; SI: %r = add nsw i16 %a, %b
559; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]560; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]561; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]562; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]563; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
564; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]565define i16 @add_nsw_i16(i16 %a, i16 %b) {
566 %r = add nsw i16 %a, %b
567 ret i16 %r
568}
569
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]570; GCN-LABEL: @add_nuw_i16(
571; SI: %r = add nuw i16 %a, %b
572; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]573; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]574; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]575; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]576; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
577; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]578define i16 @add_nuw_i16(i16 %a, i16 %b) {
579 %r = add nuw i16 %a, %b
580 ret i16 %r
581}
582
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]583; GCN-LABEL: @add_nuw_nsw_i16(
584; SI: %r = add nuw nsw i16 %a, %b
585; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]586; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]587; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
588; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw i32 %[[A_32]], %[[B_32]]
589; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
590; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]591define i16 @add_nuw_nsw_i16(i16 %a, i16 %b) {
592 %r = add nuw nsw i16 %a, %b
593 ret i16 %r
594}
595
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]596; GCN-LABEL: @sub_i16(
597; SI: %r = sub i16 %a, %b
598; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]599; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]600; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]601; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]602; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
603; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]604define i16 @sub_i16(i16 %a, i16 %b) {
605 %r = sub i16 %a, %b
606 ret i16 %r
607}
608
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]609; GCN-LABEL: @sub_nsw_i16(
610; SI: %r = sub nsw i16 %a, %b
611; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]612; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]613; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
614; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw i32 %[[A_32]], %[[B_32]]
615; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
616; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]617define i16 @sub_nsw_i16(i16 %a, i16 %b) {
618 %r = sub nsw i16 %a, %b
619 ret i16 %r
620}
621
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]622; GCN-LABEL: @sub_nuw_i16(
623; SI: %r = sub nuw i16 %a, %b
624; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]625; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]626; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]627; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]628; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
629; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]630define i16 @sub_nuw_i16(i16 %a, i16 %b) {
631 %r = sub nuw i16 %a, %b
632 ret i16 %r
633}
634
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]635; GCN-LABEL: @sub_nuw_nsw_i16(
636; SI: %r = sub nuw nsw i16 %a, %b
637; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]638; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]639; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
640; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw i32 %[[A_32]], %[[B_32]]
641; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
642; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]643define i16 @sub_nuw_nsw_i16(i16 %a, i16 %b) {
644 %r = sub nuw nsw i16 %a, %b
645 ret i16 %r
646}
647
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]648; GCN-LABEL: @mul_i16(
649; SI: %r = mul i16 %a, %b
650; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]651; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]652; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]653; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]654; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
655; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]656define i16 @mul_i16(i16 %a, i16 %b) {
657 %r = mul i16 %a, %b
658 ret i16 %r
659}
660
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]661; GCN-LABEL: @mul_nsw_i16(
662; SI: %r = mul nsw i16 %a, %b
663; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]664; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]665; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]666; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]667; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
668; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]669define i16 @mul_nsw_i16(i16 %a, i16 %b) {
670 %r = mul nsw i16 %a, %b
671 ret i16 %r
672}
673
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]674; GCN-LABEL: @mul_nuw_i16(
675; SI: %r = mul nuw i16 %a, %b
676; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]677; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]678; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]679; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]680; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
681; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]682define i16 @mul_nuw_i16(i16 %a, i16 %b) {
683 %r = mul nuw i16 %a, %b
684 ret i16 %r
685}
686
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]687; GCN-LABEL: @mul_nuw_nsw_i16(
688; SI: %r = mul nuw nsw i16 %a, %b
689; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]690; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]691; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
692; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw i32 %[[A_32]], %[[B_32]]
693; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
694; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]695define i16 @mul_nuw_nsw_i16(i16 %a, i16 %b) {
696 %r = mul nuw nsw i16 %a, %b
697 ret i16 %r
698}
699
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]700; GCN-LABEL: @urem_i16(
701; SI: %r = urem i16 %a, %b
702; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]703; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]704; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
705; VI-NEXT: %[[R_32:[0-9]+]] = urem i32 %[[A_32]], %[[B_32]]
706; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
707; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]708define i16 @urem_i16(i16 %a, i16 %b) {
709 %r = urem i16 %a, %b
710 ret i16 %r
711}
712
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]713; GCN-LABEL: @srem_i16(
714; SI: %r = srem i16 %a, %b
715; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]716; VI: %[[A_32:[0-9]+]] = sext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]717; VI-NEXT: %[[B_32:[0-9]+]] = sext i16 %b to i32
718; VI-NEXT: %[[R_32:[0-9]+]] = srem i32 %[[A_32]], %[[B_32]]
719; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
720; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]721define i16 @srem_i16(i16 %a, i16 %b) {
722 %r = srem i16 %a, %b
723 ret i16 %r
724}
725
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]726; GCN-LABEL: @shl_i16(
727; SI: %r = shl i16 %a, %b
728; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]729; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]730; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]731; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]732; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
733; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]734define i16 @shl_i16(i16 %a, i16 %b) {
735 %r = shl i16 %a, %b
736 ret i16 %r
737}
738
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]739; GCN-LABEL: @shl_nsw_i16(
740; SI: %r = shl nsw i16 %a, %b
741; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]742; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]743; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]744; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]745; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
746; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]747define i16 @shl_nsw_i16(i16 %a, i16 %b) {
748 %r = shl nsw i16 %a, %b
749 ret i16 %r
750}
751
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]752; GCN-LABEL: @shl_nuw_i16(
753; SI: %r = shl nuw i16 %a, %b
754; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]755; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]756; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]757; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]758; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
759; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]760define i16 @shl_nuw_i16(i16 %a, i16 %b) {
761 %r = shl nuw i16 %a, %b
762 ret i16 %r
763}
764
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]765; GCN-LABEL: @shl_nuw_nsw_i16(
766; SI: %r = shl nuw nsw i16 %a, %b
767; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]768; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]769; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
770; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw i32 %[[A_32]], %[[B_32]]
771; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
772; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]773define i16 @shl_nuw_nsw_i16(i16 %a, i16 %b) {
774 %r = shl nuw nsw i16 %a, %b
775 ret i16 %r
776}
777
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]778; GCN-LABEL: @lshr_i16(
779; SI: %r = lshr i16 %a, %b
780; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]781; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]782; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
783; VI-NEXT: %[[R_32:[0-9]+]] = lshr i32 %[[A_32]], %[[B_32]]
784; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
785; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]786define i16 @lshr_i16(i16 %a, i16 %b) {
787 %r = lshr i16 %a, %b
788 ret i16 %r
789}
790
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]791; GCN-LABEL: @lshr_exact_i16(
792; SI: %r = lshr exact i16 %a, %b
793; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]794; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]795; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
796; VI-NEXT: %[[R_32:[0-9]+]] = lshr exact i32 %[[A_32]], %[[B_32]]
797; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
798; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]799define i16 @lshr_exact_i16(i16 %a, i16 %b) {
800 %r = lshr exact i16 %a, %b
801 ret i16 %r
802}
803
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]804; GCN-LABEL: @ashr_i16(
805; SI: %r = ashr i16 %a, %b
806; SI-NEXT: ret i16 %r
Konstantin Zhuravlyov691e2e02016-10-03 18:29:01 +0000[diff] [blame]807; VI: %[[A_32:[0-9]+]] = sext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]808; VI-NEXT: %[[B_32:[0-9]+]] = sext i16 %b to i32
809; VI-NEXT: %[[R_32:[0-9]+]] = ashr i32 %[[A_32]], %[[B_32]]
810; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
811; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]812define i16 @ashr_i16(i16 %a, i16 %b) {
813 %r = ashr i16 %a, %b
814 ret i16 %r
815}
816
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]817; GCN-LABEL: @ashr_exact_i16(
818; SI: %r = ashr exact i16 %a, %b
819; SI-NEXT: ret i16 %r
Konstantin Zhuravlyov691e2e02016-10-03 18:29:01 +0000[diff] [blame]820; VI: %[[A_32:[0-9]+]] = sext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]821; VI-NEXT: %[[B_32:[0-9]+]] = sext i16 %b to i32
822; VI-NEXT: %[[R_32:[0-9]+]] = ashr exact i32 %[[A_32]], %[[B_32]]
823; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
824; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]825define i16 @ashr_exact_i16(i16 %a, i16 %b) {
826 %r = ashr exact i16 %a, %b
827 ret i16 %r
828}
829
Matt Arsenault269ffda2016-12-06 23:18:06 +0000[diff] [blame]830; GCN-LABEL: @constant_lshr_exact_i16(
831; VI: ret i16 2
832define i16 @constant_lshr_exact_i16(i16 %a, i16 %b) {
833 %r = lshr exact i16 4, 1
834 ret i16 %r
835}
836
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]837; GCN-LABEL: @and_i16(
838; SI: %r = and i16 %a, %b
839; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]840; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]841; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
842; VI-NEXT: %[[R_32:[0-9]+]] = and i32 %[[A_32]], %[[B_32]]
843; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
844; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]845define i16 @and_i16(i16 %a, i16 %b) {
846 %r = and i16 %a, %b
847 ret i16 %r
848}
849
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]850; GCN-LABEL: @or_i16(
851; SI: %r = or i16 %a, %b
852; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]853; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]854; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
855; VI-NEXT: %[[R_32:[0-9]+]] = or i32 %[[A_32]], %[[B_32]]
856; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
857; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]858define i16 @or_i16(i16 %a, i16 %b) {
859 %r = or i16 %a, %b
860 ret i16 %r
861}
862
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]863; GCN-LABEL: @xor_i16(
864; SI: %r = xor i16 %a, %b
865; SI-NEXT: ret i16 %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]866; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]867; VI-NEXT: %[[B_32:[0-9]+]] = zext i16 %b to i32
868; VI-NEXT: %[[R_32:[0-9]+]] = xor i32 %[[A_32]], %[[B_32]]
869; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[R_32]] to i16
870; VI-NEXT: ret i16 %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]871define i16 @xor_i16(i16 %a, i16 %b) {
872 %r = xor i16 %a, %b
873 ret i16 %r
874}
875
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]876; GCN-LABEL: @select_eq_i16(
877; SI: %cmp = icmp eq i16 %a, %b
878; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
879; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]880; VI: %[[A_32_0:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]881; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i16 %b to i32
882; VI-NEXT: %[[CMP:[0-9]+]] = icmp eq i32 %[[A_32_0]], %[[B_32_0]]
883; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i16 %a to i32
884; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i16 %b to i32
885; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
886; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
887; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]888define i16 @select_eq_i16(i16 %a, i16 %b) {
889 %cmp = icmp eq i16 %a, %b
890 %sel = select i1 %cmp, i16 %a, i16 %b
891 ret i16 %sel
892}
893
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]894; GCN-LABEL: @select_ne_i16(
895; SI: %cmp = icmp ne i16 %a, %b
896; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
897; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]898; VI: %[[A_32_0:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]899; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i16 %b to i32
900; VI-NEXT: %[[CMP:[0-9]+]] = icmp ne i32 %[[A_32_0]], %[[B_32_0]]
901; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i16 %a to i32
902; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i16 %b to i32
903; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
904; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
905; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]906define i16 @select_ne_i16(i16 %a, i16 %b) {
907 %cmp = icmp ne i16 %a, %b
908 %sel = select i1 %cmp, i16 %a, i16 %b
909 ret i16 %sel
910}
911
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]912; GCN-LABEL: @select_ugt_i16(
913; SI: %cmp = icmp ugt i16 %a, %b
914; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
915; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]916; VI: %[[A_32_0:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]917; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i16 %b to i32
918; VI-NEXT: %[[CMP:[0-9]+]] = icmp ugt i32 %[[A_32_0]], %[[B_32_0]]
919; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i16 %a to i32
920; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i16 %b to i32
921; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
922; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
923; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]924define i16 @select_ugt_i16(i16 %a, i16 %b) {
925 %cmp = icmp ugt i16 %a, %b
926 %sel = select i1 %cmp, i16 %a, i16 %b
927 ret i16 %sel
928}
929
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]930; GCN-LABEL: @select_uge_i16(
931; SI: %cmp = icmp uge i16 %a, %b
932; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
933; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]934; VI: %[[A_32_0:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]935; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i16 %b to i32
936; VI-NEXT: %[[CMP:[0-9]+]] = icmp uge i32 %[[A_32_0]], %[[B_32_0]]
937; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i16 %a to i32
938; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i16 %b to i32
939; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
940; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
941; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]942define i16 @select_uge_i16(i16 %a, i16 %b) {
943 %cmp = icmp uge i16 %a, %b
944 %sel = select i1 %cmp, i16 %a, i16 %b
945 ret i16 %sel
946}
947
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]948; GCN-LABEL: @select_ult_i16(
949; SI: %cmp = icmp ult i16 %a, %b
950; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
951; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]952; VI: %[[A_32_0:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]953; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i16 %b to i32
954; VI-NEXT: %[[CMP:[0-9]+]] = icmp ult i32 %[[A_32_0]], %[[B_32_0]]
955; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i16 %a to i32
956; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i16 %b to i32
957; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
958; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
959; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]960define i16 @select_ult_i16(i16 %a, i16 %b) {
961 %cmp = icmp ult i16 %a, %b
962 %sel = select i1 %cmp, i16 %a, i16 %b
963 ret i16 %sel
964}
965
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]966; GCN-LABEL: @select_ule_i16(
967; SI: %cmp = icmp ule i16 %a, %b
968; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
969; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]970; VI: %[[A_32_0:[0-9]+]] = zext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]971; VI-NEXT: %[[B_32_0:[0-9]+]] = zext i16 %b to i32
972; VI-NEXT: %[[CMP:[0-9]+]] = icmp ule i32 %[[A_32_0]], %[[B_32_0]]
973; VI-NEXT: %[[A_32_1:[0-9]+]] = zext i16 %a to i32
974; VI-NEXT: %[[B_32_1:[0-9]+]] = zext i16 %b to i32
975; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
976; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
977; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]978define i16 @select_ule_i16(i16 %a, i16 %b) {
979 %cmp = icmp ule i16 %a, %b
980 %sel = select i1 %cmp, i16 %a, i16 %b
981 ret i16 %sel
982}
983
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]984; GCN-LABEL: @select_sgt_i16(
985; SI: %cmp = icmp sgt i16 %a, %b
986; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
987; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]988; VI: %[[A_32_0:[0-9]+]] = sext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]989; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i16 %b to i32
990; VI-NEXT: %[[CMP:[0-9]+]] = icmp sgt i32 %[[A_32_0]], %[[B_32_0]]
991; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i16 %a to i32
992; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i16 %b to i32
993; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
994; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
995; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]996define i16 @select_sgt_i16(i16 %a, i16 %b) {
997 %cmp = icmp sgt i16 %a, %b
998 %sel = select i1 %cmp, i16 %a, i16 %b
999 ret i16 %sel
1000}
1001
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1002; GCN-LABEL: @select_sge_i16(
1003; SI: %cmp = icmp sge i16 %a, %b
1004; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
1005; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1006; VI: %[[A_32_0:[0-9]+]] = sext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1007; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i16 %b to i32
1008; VI-NEXT: %[[CMP:[0-9]+]] = icmp sge i32 %[[A_32_0]], %[[B_32_0]]
1009; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i16 %a to i32
1010; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i16 %b to i32
1011; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
1012; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
1013; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1014define i16 @select_sge_i16(i16 %a, i16 %b) {
1015 %cmp = icmp sge i16 %a, %b
1016 %sel = select i1 %cmp, i16 %a, i16 %b
1017 ret i16 %sel
1018}
1019
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1020; GCN-LABEL: @select_slt_i16(
1021; SI: %cmp = icmp slt i16 %a, %b
1022; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
1023; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1024; VI: %[[A_32_0:[0-9]+]] = sext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1025; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i16 %b to i32
1026; VI-NEXT: %[[CMP:[0-9]+]] = icmp slt i32 %[[A_32_0]], %[[B_32_0]]
1027; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i16 %a to i32
1028; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i16 %b to i32
1029; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
1030; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
1031; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1032define i16 @select_slt_i16(i16 %a, i16 %b) {
1033 %cmp = icmp slt i16 %a, %b
1034 %sel = select i1 %cmp, i16 %a, i16 %b
1035 ret i16 %sel
1036}
1037
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1038; GCN-LABEL: @select_sle_i16(
1039; SI: %cmp = icmp sle i16 %a, %b
1040; SI-NEXT: %sel = select i1 %cmp, i16 %a, i16 %b
1041; SI-NEXT: ret i16 %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1042; VI: %[[A_32_0:[0-9]+]] = sext i16 %a to i32
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1043; VI-NEXT: %[[B_32_0:[0-9]+]] = sext i16 %b to i32
1044; VI-NEXT: %[[CMP:[0-9]+]] = icmp sle i32 %[[A_32_0]], %[[B_32_0]]
1045; VI-NEXT: %[[A_32_1:[0-9]+]] = sext i16 %a to i32
1046; VI-NEXT: %[[B_32_1:[0-9]+]] = sext i16 %b to i32
1047; VI-NEXT: %[[SEL_32:[0-9]+]] = select i1 %[[CMP]], i32 %[[A_32_1]], i32 %[[B_32_1]]
1048; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc i32 %[[SEL_32]] to i16
1049; VI-NEXT: ret i16 %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1050define i16 @select_sle_i16(i16 %a, i16 %b) {
1051 %cmp = icmp sle i16 %a, %b
1052 %sel = select i1 %cmp, i16 %a, i16 %b
1053 ret i16 %sel
1054}
1055
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1056declare i16 @llvm.bitreverse.i16(i16)
1057; GCN-LABEL: @bitreverse_i16(
1058; SI: %brev = call i16 @llvm.bitreverse.i16(i16 %a)
1059; SI-NEXT: ret i16 %brev
1060; VI: %[[A_32:[0-9]+]] = zext i16 %a to i32
1061; VI-NEXT: %[[R_32:[0-9]+]] = call i32 @llvm.bitreverse.i32(i32 %[[A_32]])
1062; VI-NEXT: %[[S_32:[0-9]+]] = lshr i32 %[[R_32]], 16
1063; VI-NEXT: %[[R_16:[0-9]+]] = trunc i32 %[[S_32]] to i16
1064; VI-NEXT: ret i16 %[[R_16]]
1065define i16 @bitreverse_i16(i16 %a) {
1066 %brev = call i16 @llvm.bitreverse.i16(i16 %a)
1067 ret i16 %brev
1068}
1069
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1070; GCN-LABEL: @add_3xi15(
1071; SI: %r = add <3 x i15> %a, %b
1072; SI-NEXT: ret <3 x i15> %r
1073; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1074; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1075; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1076; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1077; VI-NEXT: ret <3 x i15> %[[R_15]]
1078define <3 x i15> @add_3xi15(<3 x i15> %a, <3 x i15> %b) {
1079 %r = add <3 x i15> %a, %b
1080 ret <3 x i15> %r
1081}
1082
1083; GCN-LABEL: @add_nsw_3xi15(
1084; SI: %r = add nsw <3 x i15> %a, %b
1085; SI-NEXT: ret <3 x i15> %r
1086; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1087; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1088; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1089; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1090; VI-NEXT: ret <3 x i15> %[[R_15]]
1091define <3 x i15> @add_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1092 %r = add nsw <3 x i15> %a, %b
1093 ret <3 x i15> %r
1094}
1095
1096; GCN-LABEL: @add_nuw_3xi15(
1097; SI: %r = add nuw <3 x i15> %a, %b
1098; SI-NEXT: ret <3 x i15> %r
1099; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1100; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1101; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1102; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1103; VI-NEXT: ret <3 x i15> %[[R_15]]
1104define <3 x i15> @add_nuw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1105 %r = add nuw <3 x i15> %a, %b
1106 ret <3 x i15> %r
1107}
1108
1109; GCN-LABEL: @add_nuw_nsw_3xi15(
1110; SI: %r = add nuw nsw <3 x i15> %a, %b
1111; SI-NEXT: ret <3 x i15> %r
1112; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1113; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1114; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1115; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1116; VI-NEXT: ret <3 x i15> %[[R_15]]
1117define <3 x i15> @add_nuw_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1118 %r = add nuw nsw <3 x i15> %a, %b
1119 ret <3 x i15> %r
1120}
1121
1122; GCN-LABEL: @sub_3xi15(
1123; SI: %r = sub <3 x i15> %a, %b
1124; SI-NEXT: ret <3 x i15> %r
1125; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1126; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1127; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1128; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1129; VI-NEXT: ret <3 x i15> %[[R_15]]
1130define <3 x i15> @sub_3xi15(<3 x i15> %a, <3 x i15> %b) {
1131 %r = sub <3 x i15> %a, %b
1132 ret <3 x i15> %r
1133}
1134
1135; GCN-LABEL: @sub_nsw_3xi15(
1136; SI: %r = sub nsw <3 x i15> %a, %b
1137; SI-NEXT: ret <3 x i15> %r
1138; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1139; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1140; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw <3 x i32> %[[A_32]], %[[B_32]]
1141; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1142; VI-NEXT: ret <3 x i15> %[[R_15]]
1143define <3 x i15> @sub_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1144 %r = sub nsw <3 x i15> %a, %b
1145 ret <3 x i15> %r
1146}
1147
1148; GCN-LABEL: @sub_nuw_3xi15(
1149; SI: %r = sub nuw <3 x i15> %a, %b
1150; SI-NEXT: ret <3 x i15> %r
1151; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1152; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1153; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1154; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1155; VI-NEXT: ret <3 x i15> %[[R_15]]
1156define <3 x i15> @sub_nuw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1157 %r = sub nuw <3 x i15> %a, %b
1158 ret <3 x i15> %r
1159}
1160
1161; GCN-LABEL: @sub_nuw_nsw_3xi15(
1162; SI: %r = sub nuw nsw <3 x i15> %a, %b
1163; SI-NEXT: ret <3 x i15> %r
1164; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1165; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1166; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1167; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1168; VI-NEXT: ret <3 x i15> %[[R_15]]
1169define <3 x i15> @sub_nuw_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1170 %r = sub nuw nsw <3 x i15> %a, %b
1171 ret <3 x i15> %r
1172}
1173
1174; GCN-LABEL: @mul_3xi15(
1175; SI: %r = mul <3 x i15> %a, %b
1176; SI-NEXT: ret <3 x i15> %r
1177; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1178; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1179; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1180; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1181; VI-NEXT: ret <3 x i15> %[[R_15]]
1182define <3 x i15> @mul_3xi15(<3 x i15> %a, <3 x i15> %b) {
1183 %r = mul <3 x i15> %a, %b
1184 ret <3 x i15> %r
1185}
1186
1187; GCN-LABEL: @mul_nsw_3xi15(
1188; SI: %r = mul nsw <3 x i15> %a, %b
1189; SI-NEXT: ret <3 x i15> %r
1190; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1191; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1192; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1193; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1194; VI-NEXT: ret <3 x i15> %[[R_15]]
1195define <3 x i15> @mul_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1196 %r = mul nsw <3 x i15> %a, %b
1197 ret <3 x i15> %r
1198}
1199
1200; GCN-LABEL: @mul_nuw_3xi15(
1201; SI: %r = mul nuw <3 x i15> %a, %b
1202; SI-NEXT: ret <3 x i15> %r
1203; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1204; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1205; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1206; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1207; VI-NEXT: ret <3 x i15> %[[R_15]]
1208define <3 x i15> @mul_nuw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1209 %r = mul nuw <3 x i15> %a, %b
1210 ret <3 x i15> %r
1211}
1212
1213; GCN-LABEL: @mul_nuw_nsw_3xi15(
1214; SI: %r = mul nuw nsw <3 x i15> %a, %b
1215; SI-NEXT: ret <3 x i15> %r
1216; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1217; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1218; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1219; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1220; VI-NEXT: ret <3 x i15> %[[R_15]]
1221define <3 x i15> @mul_nuw_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1222 %r = mul nuw nsw <3 x i15> %a, %b
1223 ret <3 x i15> %r
1224}
1225
1226; GCN-LABEL: @urem_3xi15(
1227; SI: %r = urem <3 x i15> %a, %b
1228; SI-NEXT: ret <3 x i15> %r
1229; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1230; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1231; VI-NEXT: %[[R_32:[0-9]+]] = urem <3 x i32> %[[A_32]], %[[B_32]]
1232; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1233; VI-NEXT: ret <3 x i15> %[[R_15]]
1234define <3 x i15> @urem_3xi15(<3 x i15> %a, <3 x i15> %b) {
1235 %r = urem <3 x i15> %a, %b
1236 ret <3 x i15> %r
1237}
1238
1239; GCN-LABEL: @srem_3xi15(
1240; SI: %r = srem <3 x i15> %a, %b
1241; SI-NEXT: ret <3 x i15> %r
1242; VI: %[[A_32:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1243; VI-NEXT: %[[B_32:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1244; VI-NEXT: %[[R_32:[0-9]+]] = srem <3 x i32> %[[A_32]], %[[B_32]]
1245; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1246; VI-NEXT: ret <3 x i15> %[[R_15]]
1247define <3 x i15> @srem_3xi15(<3 x i15> %a, <3 x i15> %b) {
1248 %r = srem <3 x i15> %a, %b
1249 ret <3 x i15> %r
1250}
1251
1252; GCN-LABEL: @shl_3xi15(
1253; SI: %r = shl <3 x i15> %a, %b
1254; SI-NEXT: ret <3 x i15> %r
1255; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1256; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1257; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1258; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1259; VI-NEXT: ret <3 x i15> %[[R_15]]
1260define <3 x i15> @shl_3xi15(<3 x i15> %a, <3 x i15> %b) {
1261 %r = shl <3 x i15> %a, %b
1262 ret <3 x i15> %r
1263}
1264
1265; GCN-LABEL: @shl_nsw_3xi15(
1266; SI: %r = shl nsw <3 x i15> %a, %b
1267; SI-NEXT: ret <3 x i15> %r
1268; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1269; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1270; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1271; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1272; VI-NEXT: ret <3 x i15> %[[R_15]]
1273define <3 x i15> @shl_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1274 %r = shl nsw <3 x i15> %a, %b
1275 ret <3 x i15> %r
1276}
1277
1278; GCN-LABEL: @shl_nuw_3xi15(
1279; SI: %r = shl nuw <3 x i15> %a, %b
1280; SI-NEXT: ret <3 x i15> %r
1281; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1282; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1283; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovf74fc602016-10-07 14:22:58 +0000[diff] [blame]1284; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1285; VI-NEXT: ret <3 x i15> %[[R_15]]
1286define <3 x i15> @shl_nuw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1287 %r = shl nuw <3 x i15> %a, %b
1288 ret <3 x i15> %r
1289}
1290
1291; GCN-LABEL: @shl_nuw_nsw_3xi15(
1292; SI: %r = shl nuw nsw <3 x i15> %a, %b
1293; SI-NEXT: ret <3 x i15> %r
1294; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1295; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1296; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1297; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1298; VI-NEXT: ret <3 x i15> %[[R_15]]
1299define <3 x i15> @shl_nuw_nsw_3xi15(<3 x i15> %a, <3 x i15> %b) {
1300 %r = shl nuw nsw <3 x i15> %a, %b
1301 ret <3 x i15> %r
1302}
1303
1304; GCN-LABEL: @lshr_3xi15(
1305; SI: %r = lshr <3 x i15> %a, %b
1306; SI-NEXT: ret <3 x i15> %r
1307; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1308; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1309; VI-NEXT: %[[R_32:[0-9]+]] = lshr <3 x i32> %[[A_32]], %[[B_32]]
1310; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1311; VI-NEXT: ret <3 x i15> %[[R_15]]
1312define <3 x i15> @lshr_3xi15(<3 x i15> %a, <3 x i15> %b) {
1313 %r = lshr <3 x i15> %a, %b
1314 ret <3 x i15> %r
1315}
1316
1317; GCN-LABEL: @lshr_exact_3xi15(
1318; SI: %r = lshr exact <3 x i15> %a, %b
1319; SI-NEXT: ret <3 x i15> %r
1320; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1321; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1322; VI-NEXT: %[[R_32:[0-9]+]] = lshr exact <3 x i32> %[[A_32]], %[[B_32]]
1323; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1324; VI-NEXT: ret <3 x i15> %[[R_15]]
1325define <3 x i15> @lshr_exact_3xi15(<3 x i15> %a, <3 x i15> %b) {
1326 %r = lshr exact <3 x i15> %a, %b
1327 ret <3 x i15> %r
1328}
1329
1330; GCN-LABEL: @ashr_3xi15(
1331; SI: %r = ashr <3 x i15> %a, %b
1332; SI-NEXT: ret <3 x i15> %r
1333; VI: %[[A_32:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1334; VI-NEXT: %[[B_32:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1335; VI-NEXT: %[[R_32:[0-9]+]] = ashr <3 x i32> %[[A_32]], %[[B_32]]
1336; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1337; VI-NEXT: ret <3 x i15> %[[R_15]]
1338define <3 x i15> @ashr_3xi15(<3 x i15> %a, <3 x i15> %b) {
1339 %r = ashr <3 x i15> %a, %b
1340 ret <3 x i15> %r
1341}
1342
1343; GCN-LABEL: @ashr_exact_3xi15(
1344; SI: %r = ashr exact <3 x i15> %a, %b
1345; SI-NEXT: ret <3 x i15> %r
1346; VI: %[[A_32:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1347; VI-NEXT: %[[B_32:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1348; VI-NEXT: %[[R_32:[0-9]+]] = ashr exact <3 x i32> %[[A_32]], %[[B_32]]
1349; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1350; VI-NEXT: ret <3 x i15> %[[R_15]]
1351define <3 x i15> @ashr_exact_3xi15(<3 x i15> %a, <3 x i15> %b) {
1352 %r = ashr exact <3 x i15> %a, %b
1353 ret <3 x i15> %r
1354}
1355
1356; GCN-LABEL: @and_3xi15(
1357; SI: %r = and <3 x i15> %a, %b
1358; SI-NEXT: ret <3 x i15> %r
1359; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1360; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1361; VI-NEXT: %[[R_32:[0-9]+]] = and <3 x i32> %[[A_32]], %[[B_32]]
1362; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1363; VI-NEXT: ret <3 x i15> %[[R_15]]
1364define <3 x i15> @and_3xi15(<3 x i15> %a, <3 x i15> %b) {
1365 %r = and <3 x i15> %a, %b
1366 ret <3 x i15> %r
1367}
1368
1369; GCN-LABEL: @or_3xi15(
1370; SI: %r = or <3 x i15> %a, %b
1371; SI-NEXT: ret <3 x i15> %r
1372; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1373; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1374; VI-NEXT: %[[R_32:[0-9]+]] = or <3 x i32> %[[A_32]], %[[B_32]]
1375; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1376; VI-NEXT: ret <3 x i15> %[[R_15]]
1377define <3 x i15> @or_3xi15(<3 x i15> %a, <3 x i15> %b) {
1378 %r = or <3 x i15> %a, %b
1379 ret <3 x i15> %r
1380}
1381
1382; GCN-LABEL: @xor_3xi15(
1383; SI: %r = xor <3 x i15> %a, %b
1384; SI-NEXT: ret <3 x i15> %r
1385; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1386; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1387; VI-NEXT: %[[R_32:[0-9]+]] = xor <3 x i32> %[[A_32]], %[[B_32]]
1388; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i15>
1389; VI-NEXT: ret <3 x i15> %[[R_15]]
1390define <3 x i15> @xor_3xi15(<3 x i15> %a, <3 x i15> %b) {
1391 %r = xor <3 x i15> %a, %b
1392 ret <3 x i15> %r
1393}
1394
1395; GCN-LABEL: @select_eq_3xi15(
1396; SI: %cmp = icmp eq <3 x i15> %a, %b
1397; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1398; SI-NEXT: ret <3 x i15> %sel
1399; VI: %[[A_32_0:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1400; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1401; VI-NEXT: %[[CMP:[0-9]+]] = icmp eq <3 x i32> %[[A_32_0]], %[[B_32_0]]
1402; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1403; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1404; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1405; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1406; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1407define <3 x i15> @select_eq_3xi15(<3 x i15> %a, <3 x i15> %b) {
1408 %cmp = icmp eq <3 x i15> %a, %b
1409 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1410 ret <3 x i15> %sel
1411}
1412
1413; GCN-LABEL: @select_ne_3xi15(
1414; SI: %cmp = icmp ne <3 x i15> %a, %b
1415; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1416; SI-NEXT: ret <3 x i15> %sel
1417; VI: %[[A_32_0:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1418; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1419; VI-NEXT: %[[CMP:[0-9]+]] = icmp ne <3 x i32> %[[A_32_0]], %[[B_32_0]]
1420; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1421; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1422; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1423; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1424; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1425define <3 x i15> @select_ne_3xi15(<3 x i15> %a, <3 x i15> %b) {
1426 %cmp = icmp ne <3 x i15> %a, %b
1427 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1428 ret <3 x i15> %sel
1429}
1430
1431; GCN-LABEL: @select_ugt_3xi15(
1432; SI: %cmp = icmp ugt <3 x i15> %a, %b
1433; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1434; SI-NEXT: ret <3 x i15> %sel
1435; VI: %[[A_32_0:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1436; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1437; VI-NEXT: %[[CMP:[0-9]+]] = icmp ugt <3 x i32> %[[A_32_0]], %[[B_32_0]]
1438; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1439; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1440; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1441; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1442; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1443define <3 x i15> @select_ugt_3xi15(<3 x i15> %a, <3 x i15> %b) {
1444 %cmp = icmp ugt <3 x i15> %a, %b
1445 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1446 ret <3 x i15> %sel
1447}
1448
1449; GCN-LABEL: @select_uge_3xi15(
1450; SI: %cmp = icmp uge <3 x i15> %a, %b
1451; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1452; SI-NEXT: ret <3 x i15> %sel
1453; VI: %[[A_32_0:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1454; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1455; VI-NEXT: %[[CMP:[0-9]+]] = icmp uge <3 x i32> %[[A_32_0]], %[[B_32_0]]
1456; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1457; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1458; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1459; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1460; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1461define <3 x i15> @select_uge_3xi15(<3 x i15> %a, <3 x i15> %b) {
1462 %cmp = icmp uge <3 x i15> %a, %b
1463 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1464 ret <3 x i15> %sel
1465}
1466
1467; GCN-LABEL: @select_ult_3xi15(
1468; SI: %cmp = icmp ult <3 x i15> %a, %b
1469; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1470; SI-NEXT: ret <3 x i15> %sel
1471; VI: %[[A_32_0:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1472; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1473; VI-NEXT: %[[CMP:[0-9]+]] = icmp ult <3 x i32> %[[A_32_0]], %[[B_32_0]]
1474; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1475; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1476; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1477; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1478; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1479define <3 x i15> @select_ult_3xi15(<3 x i15> %a, <3 x i15> %b) {
1480 %cmp = icmp ult <3 x i15> %a, %b
1481 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1482 ret <3 x i15> %sel
1483}
1484
1485; GCN-LABEL: @select_ule_3xi15(
1486; SI: %cmp = icmp ule <3 x i15> %a, %b
1487; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1488; SI-NEXT: ret <3 x i15> %sel
1489; VI: %[[A_32_0:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1490; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1491; VI-NEXT: %[[CMP:[0-9]+]] = icmp ule <3 x i32> %[[A_32_0]], %[[B_32_0]]
1492; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1493; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i15> %b to <3 x i32>
1494; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1495; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1496; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1497define <3 x i15> @select_ule_3xi15(<3 x i15> %a, <3 x i15> %b) {
1498 %cmp = icmp ule <3 x i15> %a, %b
1499 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1500 ret <3 x i15> %sel
1501}
1502
1503; GCN-LABEL: @select_sgt_3xi15(
1504; SI: %cmp = icmp sgt <3 x i15> %a, %b
1505; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1506; SI-NEXT: ret <3 x i15> %sel
1507; VI: %[[A_32_0:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1508; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1509; VI-NEXT: %[[CMP:[0-9]+]] = icmp sgt <3 x i32> %[[A_32_0]], %[[B_32_0]]
1510; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1511; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1512; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1513; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1514; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1515define <3 x i15> @select_sgt_3xi15(<3 x i15> %a, <3 x i15> %b) {
1516 %cmp = icmp sgt <3 x i15> %a, %b
1517 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1518 ret <3 x i15> %sel
1519}
1520
1521; GCN-LABEL: @select_sge_3xi15(
1522; SI: %cmp = icmp sge <3 x i15> %a, %b
1523; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1524; SI-NEXT: ret <3 x i15> %sel
1525; VI: %[[A_32_0:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1526; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1527; VI-NEXT: %[[CMP:[0-9]+]] = icmp sge <3 x i32> %[[A_32_0]], %[[B_32_0]]
1528; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1529; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1530; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1531; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1532; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1533define <3 x i15> @select_sge_3xi15(<3 x i15> %a, <3 x i15> %b) {
1534 %cmp = icmp sge <3 x i15> %a, %b
1535 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1536 ret <3 x i15> %sel
1537}
1538
1539; GCN-LABEL: @select_slt_3xi15(
1540; SI: %cmp = icmp slt <3 x i15> %a, %b
1541; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1542; SI-NEXT: ret <3 x i15> %sel
1543; VI: %[[A_32_0:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1544; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1545; VI-NEXT: %[[CMP:[0-9]+]] = icmp slt <3 x i32> %[[A_32_0]], %[[B_32_0]]
1546; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1547; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1548; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1549; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1550; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1551define <3 x i15> @select_slt_3xi15(<3 x i15> %a, <3 x i15> %b) {
1552 %cmp = icmp slt <3 x i15> %a, %b
1553 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1554 ret <3 x i15> %sel
1555}
1556
1557; GCN-LABEL: @select_sle_3xi15(
1558; SI: %cmp = icmp sle <3 x i15> %a, %b
1559; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1560; SI-NEXT: ret <3 x i15> %sel
1561; VI: %[[A_32_0:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1562; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1563; VI-NEXT: %[[CMP:[0-9]+]] = icmp sle <3 x i32> %[[A_32_0]], %[[B_32_0]]
1564; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i15> %a to <3 x i32>
1565; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i15> %b to <3 x i32>
1566; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1567; VI-NEXT: %[[SEL_15:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i15>
1568; VI-NEXT: ret <3 x i15> %[[SEL_15]]
1569define <3 x i15> @select_sle_3xi15(<3 x i15> %a, <3 x i15> %b) {
1570 %cmp = icmp sle <3 x i15> %a, %b
1571 %sel = select <3 x i1> %cmp, <3 x i15> %a, <3 x i15> %b
1572 ret <3 x i15> %sel
1573}
1574
1575declare <3 x i15> @llvm.bitreverse.v3i15(<3 x i15>)
1576; GCN-LABEL: @bitreverse_3xi15(
1577; SI: %brev = call <3 x i15> @llvm.bitreverse.v3i15(<3 x i15> %a)
1578; SI-NEXT: ret <3 x i15> %brev
1579; VI: %[[A_32:[0-9]+]] = zext <3 x i15> %a to <3 x i32>
1580; VI-NEXT: %[[R_32:[0-9]+]] = call <3 x i32> @llvm.bitreverse.v3i32(<3 x i32> %[[A_32]])
1581; VI-NEXT: %[[S_32:[0-9]+]] = lshr <3 x i32> %[[R_32]], <i32 17, i32 17, i32 17>
1582; VI-NEXT: %[[R_15:[0-9]+]] = trunc <3 x i32> %[[S_32]] to <3 x i15>
1583; VI-NEXT: ret <3 x i15> %[[R_15]]
1584define <3 x i15> @bitreverse_3xi15(<3 x i15> %a) {
1585 %brev = call <3 x i15> @llvm.bitreverse.v3i15(<3 x i15> %a)
1586 ret <3 x i15> %brev
1587}
1588
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1589; GCN-LABEL: @add_3xi16(
1590; SI: %r = add <3 x i16> %a, %b
1591; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1592; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1593; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1594; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1595; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1596; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1597define <3 x i16> @add_3xi16(<3 x i16> %a, <3 x i16> %b) {
1598 %r = add <3 x i16> %a, %b
1599 ret <3 x i16> %r
1600}
1601
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1602; GCN-LABEL: @add_nsw_3xi16(
1603; SI: %r = add nsw <3 x i16> %a, %b
1604; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1605; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1606; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1607; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1608; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1609; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1610define <3 x i16> @add_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1611 %r = add nsw <3 x i16> %a, %b
1612 ret <3 x i16> %r
1613}
1614
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1615; GCN-LABEL: @add_nuw_3xi16(
1616; SI: %r = add nuw <3 x i16> %a, %b
1617; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1618; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1619; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1620; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1621; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1622; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1623define <3 x i16> @add_nuw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1624 %r = add nuw <3 x i16> %a, %b
1625 ret <3 x i16> %r
1626}
1627
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1628; GCN-LABEL: @add_nuw_nsw_3xi16(
1629; SI: %r = add nuw nsw <3 x i16> %a, %b
1630; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1631; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1632; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1633; VI-NEXT: %[[R_32:[0-9]+]] = add nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1634; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1635; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1636define <3 x i16> @add_nuw_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1637 %r = add nuw nsw <3 x i16> %a, %b
1638 ret <3 x i16> %r
1639}
1640
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1641; GCN-LABEL: @sub_3xi16(
1642; SI: %r = sub <3 x i16> %a, %b
1643; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1644; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1645; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1646; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1647; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1648; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1649define <3 x i16> @sub_3xi16(<3 x i16> %a, <3 x i16> %b) {
1650 %r = sub <3 x i16> %a, %b
1651 ret <3 x i16> %r
1652}
1653
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1654; GCN-LABEL: @sub_nsw_3xi16(
1655; SI: %r = sub nsw <3 x i16> %a, %b
1656; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1657; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1658; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1659; VI-NEXT: %[[R_32:[0-9]+]] = sub nsw <3 x i32> %[[A_32]], %[[B_32]]
1660; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1661; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1662define <3 x i16> @sub_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1663 %r = sub nsw <3 x i16> %a, %b
1664 ret <3 x i16> %r
1665}
1666
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1667; GCN-LABEL: @sub_nuw_3xi16(
1668; SI: %r = sub nuw <3 x i16> %a, %b
1669; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1670; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1671; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1672; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1673; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1674; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1675define <3 x i16> @sub_nuw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1676 %r = sub nuw <3 x i16> %a, %b
1677 ret <3 x i16> %r
1678}
1679
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1680; GCN-LABEL: @sub_nuw_nsw_3xi16(
1681; SI: %r = sub nuw nsw <3 x i16> %a, %b
1682; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1683; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1684; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1685; VI-NEXT: %[[R_32:[0-9]+]] = sub nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1686; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1687; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1688define <3 x i16> @sub_nuw_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1689 %r = sub nuw nsw <3 x i16> %a, %b
1690 ret <3 x i16> %r
1691}
1692
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1693; GCN-LABEL: @mul_3xi16(
1694; SI: %r = mul <3 x i16> %a, %b
1695; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1696; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1697; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1698; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1699; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1700; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1701define <3 x i16> @mul_3xi16(<3 x i16> %a, <3 x i16> %b) {
1702 %r = mul <3 x i16> %a, %b
1703 ret <3 x i16> %r
1704}
1705
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1706; GCN-LABEL: @mul_nsw_3xi16(
1707; SI: %r = mul nsw <3 x i16> %a, %b
1708; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1709; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1710; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1711; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1712; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1713; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1714define <3 x i16> @mul_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1715 %r = mul nsw <3 x i16> %a, %b
1716 ret <3 x i16> %r
1717}
1718
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1719; GCN-LABEL: @mul_nuw_3xi16(
1720; SI: %r = mul nuw <3 x i16> %a, %b
1721; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1722; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1723; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1724; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1725; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1726; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1727define <3 x i16> @mul_nuw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1728 %r = mul nuw <3 x i16> %a, %b
1729 ret <3 x i16> %r
1730}
1731
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1732; GCN-LABEL: @mul_nuw_nsw_3xi16(
1733; SI: %r = mul nuw nsw <3 x i16> %a, %b
1734; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1735; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1736; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1737; VI-NEXT: %[[R_32:[0-9]+]] = mul nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1738; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1739; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1740define <3 x i16> @mul_nuw_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1741 %r = mul nuw nsw <3 x i16> %a, %b
1742 ret <3 x i16> %r
1743}
1744
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1745; GCN-LABEL: @urem_3xi16(
1746; SI: %r = urem <3 x i16> %a, %b
1747; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1748; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1749; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1750; VI-NEXT: %[[R_32:[0-9]+]] = urem <3 x i32> %[[A_32]], %[[B_32]]
1751; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1752; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1753define <3 x i16> @urem_3xi16(<3 x i16> %a, <3 x i16> %b) {
1754 %r = urem <3 x i16> %a, %b
1755 ret <3 x i16> %r
1756}
1757
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1758; GCN-LABEL: @srem_3xi16(
1759; SI: %r = srem <3 x i16> %a, %b
1760; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1761; VI: %[[A_32:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1762; VI-NEXT: %[[B_32:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
1763; VI-NEXT: %[[R_32:[0-9]+]] = srem <3 x i32> %[[A_32]], %[[B_32]]
1764; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1765; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1766define <3 x i16> @srem_3xi16(<3 x i16> %a, <3 x i16> %b) {
1767 %r = srem <3 x i16> %a, %b
1768 ret <3 x i16> %r
1769}
1770
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1771; GCN-LABEL: @shl_3xi16(
1772; SI: %r = shl <3 x i16> %a, %b
1773; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1774; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1775; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1776; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1777; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1778; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1779define <3 x i16> @shl_3xi16(<3 x i16> %a, <3 x i16> %b) {
1780 %r = shl <3 x i16> %a, %b
1781 ret <3 x i16> %r
1782}
1783
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1784; GCN-LABEL: @shl_nsw_3xi16(
1785; SI: %r = shl nsw <3 x i16> %a, %b
1786; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1787; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1788; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1789; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1790; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1791; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1792define <3 x i16> @shl_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1793 %r = shl nsw <3 x i16> %a, %b
1794 ret <3 x i16> %r
1795}
1796
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1797; GCN-LABEL: @shl_nuw_3xi16(
1798; SI: %r = shl nuw <3 x i16> %a, %b
1799; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1800; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1801; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
Matt Arsenaultd59e6402017-02-01 16:25:23 +0000[diff] [blame]1802; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1803; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1804; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1805define <3 x i16> @shl_nuw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1806 %r = shl nuw <3 x i16> %a, %b
1807 ret <3 x i16> %r
1808}
1809
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1810; GCN-LABEL: @shl_nuw_nsw_3xi16(
1811; SI: %r = shl nuw nsw <3 x i16> %a, %b
1812; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1813; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1814; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1815; VI-NEXT: %[[R_32:[0-9]+]] = shl nuw nsw <3 x i32> %[[A_32]], %[[B_32]]
1816; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1817; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1818define <3 x i16> @shl_nuw_nsw_3xi16(<3 x i16> %a, <3 x i16> %b) {
1819 %r = shl nuw nsw <3 x i16> %a, %b
1820 ret <3 x i16> %r
1821}
1822
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1823; GCN-LABEL: @lshr_3xi16(
1824; SI: %r = lshr <3 x i16> %a, %b
1825; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1826; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1827; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1828; VI-NEXT: %[[R_32:[0-9]+]] = lshr <3 x i32> %[[A_32]], %[[B_32]]
1829; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1830; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1831define <3 x i16> @lshr_3xi16(<3 x i16> %a, <3 x i16> %b) {
1832 %r = lshr <3 x i16> %a, %b
1833 ret <3 x i16> %r
1834}
1835
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1836; GCN-LABEL: @lshr_exact_3xi16(
1837; SI: %r = lshr exact <3 x i16> %a, %b
1838; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1839; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1840; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1841; VI-NEXT: %[[R_32:[0-9]+]] = lshr exact <3 x i32> %[[A_32]], %[[B_32]]
1842; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1843; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1844define <3 x i16> @lshr_exact_3xi16(<3 x i16> %a, <3 x i16> %b) {
1845 %r = lshr exact <3 x i16> %a, %b
1846 ret <3 x i16> %r
1847}
1848
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1849; GCN-LABEL: @ashr_3xi16(
1850; SI: %r = ashr <3 x i16> %a, %b
1851; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyov691e2e02016-10-03 18:29:01 +0000[diff] [blame]1852; VI: %[[A_32:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1853; VI-NEXT: %[[B_32:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
1854; VI-NEXT: %[[R_32:[0-9]+]] = ashr <3 x i32> %[[A_32]], %[[B_32]]
1855; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1856; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1857define <3 x i16> @ashr_3xi16(<3 x i16> %a, <3 x i16> %b) {
1858 %r = ashr <3 x i16> %a, %b
1859 ret <3 x i16> %r
1860}
1861
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1862; GCN-LABEL: @ashr_exact_3xi16(
1863; SI: %r = ashr exact <3 x i16> %a, %b
1864; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyov691e2e02016-10-03 18:29:01 +0000[diff] [blame]1865; VI: %[[A_32:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1866; VI-NEXT: %[[B_32:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
1867; VI-NEXT: %[[R_32:[0-9]+]] = ashr exact <3 x i32> %[[A_32]], %[[B_32]]
1868; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1869; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1870define <3 x i16> @ashr_exact_3xi16(<3 x i16> %a, <3 x i16> %b) {
1871 %r = ashr exact <3 x i16> %a, %b
1872 ret <3 x i16> %r
1873}
1874
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1875; GCN-LABEL: @and_3xi16(
1876; SI: %r = and <3 x i16> %a, %b
1877; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1878; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1879; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1880; VI-NEXT: %[[R_32:[0-9]+]] = and <3 x i32> %[[A_32]], %[[B_32]]
1881; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1882; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1883define <3 x i16> @and_3xi16(<3 x i16> %a, <3 x i16> %b) {
1884 %r = and <3 x i16> %a, %b
1885 ret <3 x i16> %r
1886}
1887
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1888; GCN-LABEL: @or_3xi16(
1889; SI: %r = or <3 x i16> %a, %b
1890; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1891; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1892; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1893; VI-NEXT: %[[R_32:[0-9]+]] = or <3 x i32> %[[A_32]], %[[B_32]]
1894; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1895; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1896define <3 x i16> @or_3xi16(<3 x i16> %a, <3 x i16> %b) {
1897 %r = or <3 x i16> %a, %b
1898 ret <3 x i16> %r
1899}
1900
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1901; GCN-LABEL: @xor_3xi16(
1902; SI: %r = xor <3 x i16> %a, %b
1903; SI-NEXT: ret <3 x i16> %r
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1904; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1905; VI-NEXT: %[[B_32:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1906; VI-NEXT: %[[R_32:[0-9]+]] = xor <3 x i32> %[[A_32]], %[[B_32]]
1907; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[R_32]] to <3 x i16>
1908; VI-NEXT: ret <3 x i16> %[[R_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1909define <3 x i16> @xor_3xi16(<3 x i16> %a, <3 x i16> %b) {
1910 %r = xor <3 x i16> %a, %b
1911 ret <3 x i16> %r
1912}
1913
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1914; GCN-LABEL: @select_eq_3xi16(
1915; SI: %cmp = icmp eq <3 x i16> %a, %b
1916; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1917; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1918; VI: %[[A_32_0:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1919; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1920; VI-NEXT: %[[CMP:[0-9]+]] = icmp eq <3 x i32> %[[A_32_0]], %[[B_32_0]]
1921; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
1922; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1923; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1924; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
1925; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1926define <3 x i16> @select_eq_3xi16(<3 x i16> %a, <3 x i16> %b) {
1927 %cmp = icmp eq <3 x i16> %a, %b
1928 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1929 ret <3 x i16> %sel
1930}
1931
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1932; GCN-LABEL: @select_ne_3xi16(
1933; SI: %cmp = icmp ne <3 x i16> %a, %b
1934; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1935; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1936; VI: %[[A_32_0:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1937; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1938; VI-NEXT: %[[CMP:[0-9]+]] = icmp ne <3 x i32> %[[A_32_0]], %[[B_32_0]]
1939; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
1940; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1941; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1942; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
1943; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1944define <3 x i16> @select_ne_3xi16(<3 x i16> %a, <3 x i16> %b) {
1945 %cmp = icmp ne <3 x i16> %a, %b
1946 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1947 ret <3 x i16> %sel
1948}
1949
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1950; GCN-LABEL: @select_ugt_3xi16(
1951; SI: %cmp = icmp ugt <3 x i16> %a, %b
1952; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1953; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1954; VI: %[[A_32_0:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1955; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1956; VI-NEXT: %[[CMP:[0-9]+]] = icmp ugt <3 x i32> %[[A_32_0]], %[[B_32_0]]
1957; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
1958; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1959; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1960; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
1961; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1962define <3 x i16> @select_ugt_3xi16(<3 x i16> %a, <3 x i16> %b) {
1963 %cmp = icmp ugt <3 x i16> %a, %b
1964 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1965 ret <3 x i16> %sel
1966}
1967
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1968; GCN-LABEL: @select_uge_3xi16(
1969; SI: %cmp = icmp uge <3 x i16> %a, %b
1970; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1971; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1972; VI: %[[A_32_0:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1973; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1974; VI-NEXT: %[[CMP:[0-9]+]] = icmp uge <3 x i32> %[[A_32_0]], %[[B_32_0]]
1975; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
1976; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1977; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1978; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
1979; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1980define <3 x i16> @select_uge_3xi16(<3 x i16> %a, <3 x i16> %b) {
1981 %cmp = icmp uge <3 x i16> %a, %b
1982 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1983 ret <3 x i16> %sel
1984}
1985
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1986; GCN-LABEL: @select_ult_3xi16(
1987; SI: %cmp = icmp ult <3 x i16> %a, %b
1988; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
1989; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1990; VI: %[[A_32_0:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]1991; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1992; VI-NEXT: %[[CMP:[0-9]+]] = icmp ult <3 x i32> %[[A_32_0]], %[[B_32_0]]
1993; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
1994; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
1995; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
1996; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
1997; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]1998define <3 x i16> @select_ult_3xi16(<3 x i16> %a, <3 x i16> %b) {
1999 %cmp = icmp ult <3 x i16> %a, %b
2000 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2001 ret <3 x i16> %sel
2002}
2003
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2004; GCN-LABEL: @select_ule_3xi16(
2005; SI: %cmp = icmp ule <3 x i16> %a, %b
2006; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2007; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2008; VI: %[[A_32_0:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2009; VI-NEXT: %[[B_32_0:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
2010; VI-NEXT: %[[CMP:[0-9]+]] = icmp ule <3 x i32> %[[A_32_0]], %[[B_32_0]]
2011; VI-NEXT: %[[A_32_1:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
2012; VI-NEXT: %[[B_32_1:[0-9]+]] = zext <3 x i16> %b to <3 x i32>
2013; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
2014; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
2015; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2016define <3 x i16> @select_ule_3xi16(<3 x i16> %a, <3 x i16> %b) {
2017 %cmp = icmp ule <3 x i16> %a, %b
2018 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2019 ret <3 x i16> %sel
2020}
2021
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2022; GCN-LABEL: @select_sgt_3xi16(
2023; SI: %cmp = icmp sgt <3 x i16> %a, %b
2024; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2025; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2026; VI: %[[A_32_0:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2027; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2028; VI-NEXT: %[[CMP:[0-9]+]] = icmp sgt <3 x i32> %[[A_32_0]], %[[B_32_0]]
2029; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
2030; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2031; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
2032; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
2033; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2034define <3 x i16> @select_sgt_3xi16(<3 x i16> %a, <3 x i16> %b) {
2035 %cmp = icmp sgt <3 x i16> %a, %b
2036 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2037 ret <3 x i16> %sel
2038}
2039
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2040; GCN-LABEL: @select_sge_3xi16(
2041; SI: %cmp = icmp sge <3 x i16> %a, %b
2042; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2043; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2044; VI: %[[A_32_0:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2045; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2046; VI-NEXT: %[[CMP:[0-9]+]] = icmp sge <3 x i32> %[[A_32_0]], %[[B_32_0]]
2047; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
2048; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2049; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
2050; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
2051; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2052define <3 x i16> @select_sge_3xi16(<3 x i16> %a, <3 x i16> %b) {
2053 %cmp = icmp sge <3 x i16> %a, %b
2054 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2055 ret <3 x i16> %sel
2056}
2057
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2058; GCN-LABEL: @select_slt_3xi16(
2059; SI: %cmp = icmp slt <3 x i16> %a, %b
2060; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2061; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2062; VI: %[[A_32_0:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2063; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2064; VI-NEXT: %[[CMP:[0-9]+]] = icmp slt <3 x i32> %[[A_32_0]], %[[B_32_0]]
2065; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
2066; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2067; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
2068; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
2069; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2070define <3 x i16> @select_slt_3xi16(<3 x i16> %a, <3 x i16> %b) {
2071 %cmp = icmp slt <3 x i16> %a, %b
2072 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2073 ret <3 x i16> %sel
2074}
2075
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2076; GCN-LABEL: @select_sle_3xi16(
2077; SI: %cmp = icmp sle <3 x i16> %a, %b
2078; SI-NEXT: %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2079; SI-NEXT: ret <3 x i16> %sel
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2080; VI: %[[A_32_0:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2081; VI-NEXT: %[[B_32_0:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2082; VI-NEXT: %[[CMP:[0-9]+]] = icmp sle <3 x i32> %[[A_32_0]], %[[B_32_0]]
2083; VI-NEXT: %[[A_32_1:[0-9]+]] = sext <3 x i16> %a to <3 x i32>
2084; VI-NEXT: %[[B_32_1:[0-9]+]] = sext <3 x i16> %b to <3 x i32>
2085; VI-NEXT: %[[SEL_32:[0-9]+]] = select <3 x i1> %[[CMP]], <3 x i32> %[[A_32_1]], <3 x i32> %[[B_32_1]]
2086; VI-NEXT: %[[SEL_16:[0-9]+]] = trunc <3 x i32> %[[SEL_32]] to <3 x i16>
2087; VI-NEXT: ret <3 x i16> %[[SEL_16]]
Konstantin Zhuravlyove14df4b2016-09-28 20:05:39 +0000[diff] [blame]2088define <3 x i16> @select_sle_3xi16(<3 x i16> %a, <3 x i16> %b) {
2089 %cmp = icmp sle <3 x i16> %a, %b
2090 %sel = select <3 x i1> %cmp, <3 x i16> %a, <3 x i16> %b
2091 ret <3 x i16> %sel
2092}
Konstantin Zhuravlyovb4eb5d52016-10-06 02:20:46 +0000[diff] [blame]2093
2094declare <3 x i16> @llvm.bitreverse.v3i16(<3 x i16>)
2095; GCN-LABEL: @bitreverse_3xi16(
2096; SI: %brev = call <3 x i16> @llvm.bitreverse.v3i16(<3 x i16> %a)
2097; SI-NEXT: ret <3 x i16> %brev
2098; VI: %[[A_32:[0-9]+]] = zext <3 x i16> %a to <3 x i32>
2099; VI-NEXT: %[[R_32:[0-9]+]] = call <3 x i32> @llvm.bitreverse.v3i32(<3 x i32> %[[A_32]])
2100; VI-NEXT: %[[S_32:[0-9]+]] = lshr <3 x i32> %[[R_32]], <i32 16, i32 16, i32 16>
2101; VI-NEXT: %[[R_16:[0-9]+]] = trunc <3 x i32> %[[S_32]] to <3 x i16>
2102; VI-NEXT: ret <3 x i16> %[[R_16]]
2103define <3 x i16> @bitreverse_3xi16(<3 x i16> %a) {
2104 %brev = call <3 x i16> @llvm.bitreverse.v3i16(<3 x i16> %a)
2105 ret <3 x i16> %brev
2106}