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Chris Lattner101b8cd2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +00002//
John Criswell482202a2003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +00007//
John Criswell482202a2003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattner101b8cd2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner74e4e9b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattnerbfa53192003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattnerb4e41112002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattner42714ec2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnerca4362f2002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattnerbfa53192003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattnerb4d58d72003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattnerd4627092002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattner1007f032003-08-01 22:21:34 +000025#include "Support/Debug.h"
26#include "Support/Statistic.h"
Chris Lattner101b8cd2002-12-16 16:15:28 +000027#include <iostream>
Chris Lattnerc330b982004-01-31 21:27:19 +000028using namespace llvm;
Brian Gaeke960707c2003-11-11 22:41:34 +000029
Chris Lattner101b8cd2002-12-16 16:15:28 +000030namespace {
31 Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
32 Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
Chris Lattner4e21b232004-02-17 08:09:40 +000033 Statistic<> NumFused ("ra-local", "Number of reloads fused into instructions");
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +000034 cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
Chris Lattnerd4627092002-12-18 08:14:26 +000035 cl::desc("Disable register kill in local-ra"));
Chris Lattner101b8cd2002-12-16 16:15:28 +000036
Chris Lattnerb4e41112002-12-28 20:40:43 +000037 class RA : public MachineFunctionPass {
38 const TargetMachine *TM;
Chris Lattner101b8cd2002-12-16 16:15:28 +000039 MachineFunction *MF;
Chris Lattnerb4e41112002-12-28 20:40:43 +000040 const MRegisterInfo *RegInfo;
Chris Lattnerbfa53192003-01-13 00:25:40 +000041 LiveVariables *LV;
Chris Lattner42714ec2002-12-25 05:05:46 +000042
Chris Lattner815b85e2003-08-04 23:36:39 +000043 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
44 // values are spilled.
Chris Lattnerb4e41112002-12-28 20:40:43 +000045 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattner101b8cd2002-12-16 16:15:28 +000046
47 // Virt2PhysRegMap - This map contains entries for each virtual register
Chris Lattner80cbed42004-02-09 02:12:04 +000048 // that is currently available in a physical register. This is "logically"
49 // a map from virtual register numbers to physical register numbers.
50 // Instead of using a map, however, which is slow, we use a vector. The
51 // index is the VREG number - FirstVirtualRegister. If the entry is zero,
52 // then it is logically "not in the map".
Chris Lattner101b8cd2002-12-16 16:15:28 +000053 //
Chris Lattner80cbed42004-02-09 02:12:04 +000054 std::vector<unsigned> Virt2PhysRegMap;
55
56 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
Alkis Evlogimenosbbf53932004-02-15 21:37:17 +000057 assert(MRegisterInfo::isVirtualRegister(VirtReg) &&"Illegal VREG #");
Chris Lattner80cbed42004-02-09 02:12:04 +000058 assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
59 && "VirtReg not in map!");
60 return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
61 }
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +000062
Chris Lattner490627a2004-02-09 01:26:13 +000063 // PhysRegsUsed - This array is effectively a map, containing entries for
64 // each physical register that currently has a value (ie, it is in
65 // Virt2PhysRegMap). The value mapped to is the virtual register
66 // corresponding to the physical register (the inverse of the
67 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
68 // because it is used by a future instruction. If the entry for a physical
69 // register is -1, then the physical register is "not in the map".
Chris Lattner101b8cd2002-12-16 16:15:28 +000070 //
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +000071 std::vector<int> PhysRegsUsed;
Chris Lattner101b8cd2002-12-16 16:15:28 +000072
73 // PhysRegsUseOrder - This contains a list of the physical registers that
74 // currently have a virtual register value in them. This list provides an
75 // ordering of registers, imposing a reallocation order. This list is only
76 // used if all registers are allocated and we have to spill one, in which
77 // case we spill the least recently used register. Entries at the front of
78 // the list are the least recently used registers, entries at the back are
79 // the most recently used.
80 //
81 std::vector<unsigned> PhysRegsUseOrder;
82
Chris Lattnerbfa53192003-01-13 00:25:40 +000083 // VirtRegModified - This bitset contains information about which virtual
84 // registers need to be spilled back to memory when their registers are
85 // scavenged. If a virtual register has simply been rematerialized, there
86 // is no reason to spill it to memory when we need the register back.
Chris Lattnerd4627092002-12-18 08:14:26 +000087 //
Chris Lattnerbfa53192003-01-13 00:25:40 +000088 std::vector<bool> VirtRegModified;
89
90 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattnerc330b982004-01-31 21:27:19 +000091 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattnerbfa53192003-01-13 00:25:40 +000092 Reg -= MRegisterInfo::FirstVirtualRegister;
93 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
94 VirtRegModified[Reg] = Val;
95 }
96
97 bool isVirtRegModified(unsigned Reg) const {
Chris Lattnerc330b982004-01-31 21:27:19 +000098 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattnerbfa53192003-01-13 00:25:40 +000099 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000100 && "Illegal virtual register!");
Chris Lattnerbfa53192003-01-13 00:25:40 +0000101 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
102 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000103
Chris Lattner101b8cd2002-12-16 16:15:28 +0000104 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattnerd4627092002-12-18 08:14:26 +0000105 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner763729c52002-12-24 00:04:55 +0000106 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
107
108 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000109 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
110 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
111 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
112 // Add it to the end of the list
113 PhysRegsUseOrder.push_back(RegMatch);
114 if (RegMatch == Reg)
115 return; // Found an exact match, exit early
116 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000117 }
118
119 public:
Chris Lattner101b8cd2002-12-16 16:15:28 +0000120 virtual const char *getPassName() const {
121 return "Local Register Allocator";
122 }
123
Chris Lattnerbfa53192003-01-13 00:25:40 +0000124 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
125 if (!DisableKill)
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000126 AU.addRequired<LiveVariables>();
Chris Lattnerbfa53192003-01-13 00:25:40 +0000127 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos71390902003-12-18 22:40:24 +0000128 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000129 MachineFunctionPass::getAnalysisUsage(AU);
130 }
131
Chris Lattner101b8cd2002-12-16 16:15:28 +0000132 private:
133 /// runOnMachineFunction - Register allocate the whole function
134 bool runOnMachineFunction(MachineFunction &Fn);
135
136 /// AllocateBasicBlock - Register allocate the specified basic block.
137 void AllocateBasicBlock(MachineBasicBlock &MBB);
138
Chris Lattnerd4627092002-12-18 08:14:26 +0000139
Chris Lattnerd4627092002-12-18 08:14:26 +0000140 /// areRegsEqual - This method returns true if the specified registers are
141 /// related to each other. To do this, it checks to see if they are equal
142 /// or if the first register is in the alias set of the second register.
143 ///
144 bool areRegsEqual(unsigned R1, unsigned R2) const {
145 if (R1 == R2) return true;
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000146 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
147 *AliasSet; ++AliasSet) {
148 if (*AliasSet == R1) return true;
149 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000150 return false;
151 }
152
Chris Lattnerb4e41112002-12-28 20:40:43 +0000153 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattner815b85e2003-08-04 23:36:39 +0000154 /// register on the stack, allocating space if necessary.
Chris Lattnerb4e41112002-12-28 20:40:43 +0000155 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000156
Chris Lattner815b85e2003-08-04 23:36:39 +0000157 /// removePhysReg - This method marks the specified physical register as no
158 /// longer being in use.
159 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000160 void removePhysReg(unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000161
162 /// spillVirtReg - This method spills the value specified by PhysReg into
163 /// the virtual register slot specified by VirtReg. It then updates the RA
164 /// data structures to indicate the fact that PhysReg is now available.
165 ///
Chris Lattnerddedac52004-02-17 03:57:19 +0000166 void spillVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
Chris Lattner101b8cd2002-12-16 16:15:28 +0000167 unsigned VirtReg, unsigned PhysReg);
168
Chris Lattner0129b862002-12-16 17:44:42 +0000169 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner931947d2003-08-17 18:01:15 +0000170 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
171 /// true, then the request is ignored if the physical register does not
172 /// contain a virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000173 ///
Chris Lattnerddedac52004-02-17 03:57:19 +0000174 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner931947d2003-08-17 18:01:15 +0000175 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattner0129b862002-12-16 17:44:42 +0000176
Chris Lattnerbfa53192003-01-13 00:25:40 +0000177 /// assignVirtToPhysReg - This method updates local state so that we know
178 /// that PhysReg is the proper container for VirtReg now. The physical
179 /// register must not be used for anything else when this is called.
180 ///
181 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
182
183 /// liberatePhysReg - Make sure the specified physical register is available
184 /// for use. If there is currently a value in it, it is either moved out of
185 /// the way or spilled to memory.
186 ///
187 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000188 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000189
Chris Lattner4664bd52002-12-17 02:50:10 +0000190 /// isPhysRegAvailable - Return true if the specified physical register is
191 /// free and available for use. This also includes checking to see if
192 /// aliased registers are all free...
193 ///
Chris Lattnerd4627092002-12-18 08:14:26 +0000194 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000195
196 /// getFreeReg - Look to see if there is a free register available in the
197 /// specified register class. If not, return 0.
198 ///
199 unsigned getFreeReg(const TargetRegisterClass *RC);
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000200
Chris Lattnerbfa53192003-01-13 00:25:40 +0000201 /// getReg - Find a physical register to hold the specified virtual
Chris Lattner101b8cd2002-12-16 16:15:28 +0000202 /// register. If all compatible physical registers are used, this method
203 /// spills the last used virtual register to the stack, and uses that
204 /// register.
205 ///
Chris Lattnerddedac52004-02-17 03:57:19 +0000206 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000207 unsigned VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000208
Chris Lattnerddedac52004-02-17 03:57:19 +0000209 /// reloadVirtReg - This method transforms the specified specified virtual
210 /// register use to refer to a physical register. This method may do this
211 /// in one of several ways: if the register is available in a physical
212 /// register already, it uses that physical register. If the value is not
213 /// in a physical register, and if there are physical registers available,
214 /// it loads it into a register. If register pressure is high, and it is
215 /// possible, it tries to fold the load of the virtual register into the
216 /// instruction itself. It avoids doing this if register pressure is low to
217 /// improve the chance that subsequent instructions can use the reloaded
218 /// value. This method returns the modified instruction.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000219 ///
Chris Lattnerddedac52004-02-17 03:57:19 +0000220 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
221 unsigned OpNum);
222
Chris Lattner815b85e2003-08-04 23:36:39 +0000223
224 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
225 unsigned PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000226 };
Chris Lattner101b8cd2002-12-16 16:15:28 +0000227}
228
Chris Lattner815b85e2003-08-04 23:36:39 +0000229/// getStackSpaceFor - This allocates space for the specified virtual register
230/// to be held on the stack.
231int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
232 // Find the location Reg would belong...
233 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000234
Chris Lattnerb4e41112002-12-28 20:40:43 +0000235 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattner101b8cd2002-12-16 16:15:28 +0000236 return I->second; // Already has space allocated?
237
Chris Lattnerb4e41112002-12-28 20:40:43 +0000238 // Allocate a new stack object for this spill location...
Chris Lattnerbfa53192003-01-13 00:25:40 +0000239 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000240
Chris Lattner101b8cd2002-12-16 16:15:28 +0000241 // Assign the slot...
Chris Lattnerb4e41112002-12-28 20:40:43 +0000242 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
243 return FrameIdx;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000244}
245
Chris Lattner4664bd52002-12-17 02:50:10 +0000246
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000247/// removePhysReg - This method marks the specified physical register as no
Chris Lattnerd4627092002-12-18 08:14:26 +0000248/// longer being in use.
249///
250void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner490627a2004-02-09 01:26:13 +0000251 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattnerd4627092002-12-18 08:14:26 +0000252
253 std::vector<unsigned>::iterator It =
254 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000255 if (It != PhysRegsUseOrder.end())
256 PhysRegsUseOrder.erase(It);
Chris Lattnerd4627092002-12-18 08:14:26 +0000257}
258
Chris Lattnerbfa53192003-01-13 00:25:40 +0000259
Chris Lattner101b8cd2002-12-16 16:15:28 +0000260/// spillVirtReg - This method spills the value specified by PhysReg into the
261/// virtual register slot specified by VirtReg. It then updates the RA data
262/// structures to indicate the fact that PhysReg is now available.
263///
Chris Lattnerddedac52004-02-17 03:57:19 +0000264void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner101b8cd2002-12-16 16:15:28 +0000265 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner92a199d2003-08-05 04:13:58 +0000266 if (!VirtReg && DisableKill) return;
267 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattner506fa682003-08-05 00:49:09 +0000268 " Must not have appropriate kill for the register or use exists beyond"
269 " the intended one.");
270 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
271 std::cerr << " containing %reg" << VirtReg;
272 if (!isVirtRegModified(VirtReg))
273 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000274
Chris Lattner506fa682003-08-05 00:49:09 +0000275 // Otherwise, there is a virtual register corresponding to this physical
276 // register. We only need to spill it into its stack slot if it has been
277 // modified.
278 if (isVirtRegModified(VirtReg)) {
279 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
280 int FrameIndex = getStackSpaceFor(VirtReg, RC);
281 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
282 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
283 ++NumSpilled; // Update statistics
Chris Lattner101b8cd2002-12-16 16:15:28 +0000284 }
Chris Lattner80cbed42004-02-09 02:12:04 +0000285
286 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattner101b8cd2002-12-16 16:15:28 +0000287
Chris Lattner815b85e2003-08-04 23:36:39 +0000288 DEBUG(std::cerr << "\n");
Chris Lattnerd4627092002-12-18 08:14:26 +0000289 removePhysReg(PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000290}
291
Chris Lattner4664bd52002-12-17 02:50:10 +0000292
Chris Lattnerbfa53192003-01-13 00:25:40 +0000293/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner931947d2003-08-17 18:01:15 +0000294/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
295/// then the request is ignored if the physical register does not contain a
296/// virtual register.
Chris Lattnerbfa53192003-01-13 00:25:40 +0000297///
Chris Lattnerddedac52004-02-17 03:57:19 +0000298void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner931947d2003-08-17 18:01:15 +0000299 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner490627a2004-02-09 01:26:13 +0000300 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
301 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
302 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000303 } else {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000304 // If the selected register aliases any other registers, we must make
305 // sure that one of the aliases isn't alive...
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000306 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner490627a2004-02-09 01:26:13 +0000307 *AliasSet; ++AliasSet)
308 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
309 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
310 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattnerbfa53192003-01-13 00:25:40 +0000311 }
312}
313
314
315/// assignVirtToPhysReg - This method updates local state so that we know
316/// that PhysReg is the proper container for VirtReg now. The physical
317/// register must not be used for anything else when this is called.
318///
319void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner490627a2004-02-09 01:26:13 +0000320 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattnerbfa53192003-01-13 00:25:40 +0000321 // Update information to note the fact that this register was just used, and
322 // it holds VirtReg.
323 PhysRegsUsed[PhysReg] = VirtReg;
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000324 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000325 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
326}
327
328
Chris Lattner4664bd52002-12-17 02:50:10 +0000329/// isPhysRegAvailable - Return true if the specified physical register is free
330/// and available for use. This also includes checking to see if aliased
331/// registers are all free...
332///
333bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner490627a2004-02-09 01:26:13 +0000334 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattner4664bd52002-12-17 02:50:10 +0000335
336 // If the selected register aliases any other allocated registers, it is
337 // not free!
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000338 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
339 *AliasSet; ++AliasSet)
Chris Lattner490627a2004-02-09 01:26:13 +0000340 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000341 return false; // Can't use this reg then.
Chris Lattner4664bd52002-12-17 02:50:10 +0000342 return true;
343}
344
345
Chris Lattnerbfa53192003-01-13 00:25:40 +0000346/// getFreeReg - Look to see if there is a free register available in the
347/// specified register class. If not, return 0.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000348///
Chris Lattnerbfa53192003-01-13 00:25:40 +0000349unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000350 // Get iterators defining the range of registers that are valid to allocate in
351 // this class, which also specifies the preferred allocation order.
352 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
353 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattner4664bd52002-12-17 02:50:10 +0000354
Chris Lattnerbfa53192003-01-13 00:25:40 +0000355 for (; RI != RE; ++RI)
356 if (isPhysRegAvailable(*RI)) { // Is reg unused?
357 assert(*RI != 0 && "Cannot use register!");
358 return *RI; // Found an unused register!
359 }
360 return 0;
361}
362
363
364/// liberatePhysReg - Make sure the specified physical register is available for
365/// use. If there is currently a value in it, it is either moved out of the way
366/// or spilled to memory.
367///
368void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000369 unsigned PhysReg) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000370 // FIXME: This code checks to see if a register is available, but it really
371 // wants to know if a reg is available BEFORE the instruction executes. If
372 // called after killed operands are freed, it runs the risk of reallocating a
373 // used operand...
374#if 0
375 if (isPhysRegAvailable(PhysReg)) return; // Already available...
376
377 // Check to see if the register is directly used, not indirectly used through
378 // aliases. If aliased registers are the ones actually used, we cannot be
379 // sure that we will be able to save the whole thing if we do a reg-reg copy.
Chris Lattner490627a2004-02-09 01:26:13 +0000380 if (PhysRegsUsed[PhysReg] != -1) {
381 // The virtual register held...
382 unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000383
384 // Check to see if there is a compatible register available. If so, we can
385 // move the value into the new register...
386 //
387 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
388 if (unsigned NewReg = getFreeReg(RC)) {
389 // Emit the code to copy the value...
390 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000391
Chris Lattnerbfa53192003-01-13 00:25:40 +0000392 // Update our internal state to indicate that PhysReg is available and Reg
393 // isn't.
Chris Lattner80cbed42004-02-09 02:12:04 +0000394 getVirt2PhysRegMapSlot[VirtReg] = 0;
Chris Lattnerbfa53192003-01-13 00:25:40 +0000395 removePhysReg(PhysReg); // Free the physreg
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000396
Chris Lattnerbfa53192003-01-13 00:25:40 +0000397 // Move reference over to new register...
398 assignVirtToPhysReg(VirtReg, NewReg);
399 return;
Chris Lattner4664bd52002-12-17 02:50:10 +0000400 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000401 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000402#endif
403 spillPhysReg(MBB, I, PhysReg);
404}
405
406
407/// getReg - Find a physical register to hold the specified virtual
408/// register. If all compatible physical registers are used, this method spills
409/// the last used virtual register to the stack, and uses that register.
410///
Chris Lattnerddedac52004-02-17 03:57:19 +0000411unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000412 unsigned VirtReg) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000413 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
414
415 // First check to see if we have a free register of the requested type...
416 unsigned PhysReg = getFreeReg(RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000417
Chris Lattner4664bd52002-12-17 02:50:10 +0000418 // If we didn't find an unused register, scavenge one now!
Chris Lattner101b8cd2002-12-16 16:15:28 +0000419 if (PhysReg == 0) {
Chris Lattner0129b862002-12-16 17:44:42 +0000420 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattner4664bd52002-12-17 02:50:10 +0000421
422 // Loop over all of the preallocated registers from the least recently used
423 // to the most recently used. When we find one that is capable of holding
424 // our register, use it.
425 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattner101b8cd2002-12-16 16:15:28 +0000426 assert(i != PhysRegsUseOrder.size() &&
427 "Couldn't find a register of the appropriate class!");
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000428
Chris Lattner4664bd52002-12-17 02:50:10 +0000429 unsigned R = PhysRegsUseOrder[i];
Chris Lattnere6235442003-08-23 23:49:42 +0000430
431 // We can only use this register if it holds a virtual register (ie, it
432 // can be spilled). Do not use it if it is an explicitly allocated
433 // physical register!
Chris Lattner490627a2004-02-09 01:26:13 +0000434 assert(PhysRegsUsed[R] != -1 &&
Chris Lattnere6235442003-08-23 23:49:42 +0000435 "PhysReg in PhysRegsUseOrder, but is not allocated?");
436 if (PhysRegsUsed[R]) {
437 // If the current register is compatible, use it.
438 if (RegInfo->getRegClass(R) == RC) {
439 PhysReg = R;
440 break;
441 } else {
442 // If one of the registers aliased to the current register is
443 // compatible, use it.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000444 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
445 *AliasSet; ++AliasSet) {
446 if (RegInfo->getRegClass(*AliasSet) == RC) {
447 PhysReg = *AliasSet; // Take an aliased register
448 break;
449 }
450 }
Chris Lattnere6235442003-08-23 23:49:42 +0000451 }
Chris Lattner4664bd52002-12-17 02:50:10 +0000452 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000453 }
454
Chris Lattner4664bd52002-12-17 02:50:10 +0000455 assert(PhysReg && "Physical register not assigned!?!?");
456
Chris Lattner101b8cd2002-12-16 16:15:28 +0000457 // At this point PhysRegsUseOrder[i] is the least recently used register of
458 // compatible register class. Spill it to memory and reap its remains.
Chris Lattner0129b862002-12-16 17:44:42 +0000459 spillPhysReg(MBB, I, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000460 }
461
462 // Now that we know which register we need to assign this to, do it now!
Chris Lattnerbfa53192003-01-13 00:25:40 +0000463 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000464 return PhysReg;
465}
466
Chris Lattner4664bd52002-12-17 02:50:10 +0000467
Chris Lattnerddedac52004-02-17 03:57:19 +0000468/// reloadVirtReg - This method transforms the specified specified virtual
469/// register use to refer to a physical register. This method may do this in
470/// one of several ways: if the register is available in a physical register
471/// already, it uses that physical register. If the value is not in a physical
472/// register, and if there are physical registers available, it loads it into a
473/// register. If register pressure is high, and it is possible, it tries to
474/// fold the load of the virtual register into the instruction itself. It
475/// avoids doing this if register pressure is low to improve the chance that
476/// subsequent instructions can use the reloaded value. This method returns the
477/// modified instruction.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000478///
Chris Lattnerddedac52004-02-17 03:57:19 +0000479MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
480 unsigned OpNum) {
481 unsigned VirtReg = MI->getOperand(OpNum).getReg();
482
483 // If the virtual register is already available, just update the instruction
484 // and return.
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000485 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
Chris Lattnerddedac52004-02-17 03:57:19 +0000486 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
487 MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
488 return MI;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000489 }
490
Chris Lattnerba9e3e22004-02-17 04:08:37 +0000491 // Otherwise, we need to fold it into the current instruction, or reload it.
492 // If we have registers available to hold the value, use them.
Chris Lattner42714ec2002-12-25 05:05:46 +0000493 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattnerba9e3e22004-02-17 04:08:37 +0000494 unsigned PhysReg = getFreeReg(RC);
Chris Lattner4e21b232004-02-17 08:09:40 +0000495 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattnerba9e3e22004-02-17 04:08:37 +0000496
Chris Lattner4e21b232004-02-17 08:09:40 +0000497 if (PhysReg) { // Register is available, allocate it!
498 assignVirtToPhysReg(VirtReg, PhysReg);
499 } else { // No registers available.
500 // If we can fold this spill into this instruction, do so now.
501 MachineBasicBlock::iterator MII = MI;
502 if (RegInfo->foldMemoryOperand(MII, OpNum, FrameIndex)) {
503 ++NumFused;
504 return MII;
Chris Lattnerba9e3e22004-02-17 04:08:37 +0000505 }
506
507 // It looks like we can't fold this virtual register load into this
508 // instruction. Force some poor hapless value out of the register file to
509 // make room for the new register, and reload it.
510 PhysReg = getReg(MBB, MI, VirtReg);
511 }
512
Chris Lattnerbfa53192003-01-13 00:25:40 +0000513 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
514
Chris Lattner815b85e2003-08-04 23:36:39 +0000515 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
516 << RegInfo->getName(PhysReg) << "\n");
517
Chris Lattner101b8cd2002-12-16 16:15:28 +0000518 // Add move instruction(s)
Chris Lattnerddedac52004-02-17 03:57:19 +0000519 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000520 ++NumReloaded; // Update statistics
Chris Lattnerddedac52004-02-17 03:57:19 +0000521
522 MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
523 return MI;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000524}
525
Chris Lattner815b85e2003-08-04 23:36:39 +0000526
527
Chris Lattner101b8cd2002-12-16 16:15:28 +0000528void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
529 // loop over each instruction
Alkis Evlogimenos80da8652004-02-12 02:27:10 +0000530 MachineBasicBlock::iterator MI = MBB.begin();
531 for (; MI != MBB.end(); ++MI) {
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000532 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattner815b85e2003-08-04 23:36:39 +0000533 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
534 std::cerr << " Regs have values: ";
Chris Lattner490627a2004-02-09 01:26:13 +0000535 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
536 if (PhysRegsUsed[i] != -1)
537 std::cerr << "[" << RegInfo->getName(i)
538 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattner815b85e2003-08-04 23:36:39 +0000539 std::cerr << "\n");
Chris Lattner101b8cd2002-12-16 16:15:28 +0000540
Chris Lattner4664bd52002-12-17 02:50:10 +0000541 // Loop over the implicit uses, making sure that they are at the head of the
542 // use order list, so they don't get reallocated.
Alkis Evlogimenos5f1f3372003-10-08 05:20:08 +0000543 for (const unsigned *ImplicitUses = TID.ImplicitUses;
544 *ImplicitUses; ++ImplicitUses)
Chris Lattner80cbed42004-02-09 02:12:04 +0000545 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000546
Brian Gaeke91e16e72003-08-15 21:19:25 +0000547 // Get the used operands into registers. This has the potential to spill
Chris Lattner815b85e2003-08-04 23:36:39 +0000548 // incoming values if we are out of registers. Note that we completely
549 // ignore physical register uses here. We assume that if an explicit
550 // physical register is referenced by the instruction, that it is guaranteed
551 // to be live-in, or the input is badly hosed.
Chris Lattner101b8cd2002-12-16 16:15:28 +0000552 //
Chris Lattnerddedac52004-02-17 03:57:19 +0000553 for (unsigned i = 0; i != MI->getNumOperands(); ++i)
Alkis Evlogimenosaaba4632003-12-14 13:24:17 +0000554 if (MI->getOperand(i).isUse() &&
Chris Lattner5dd5be32004-02-10 21:12:22 +0000555 !MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
Chris Lattnerddedac52004-02-17 03:57:19 +0000556 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg()))
557 MI = reloadVirtReg(MBB, MI, i);
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000558
Chris Lattnerbfa53192003-01-13 00:25:40 +0000559 if (!DisableKill) {
560 // If this instruction is the last user of anything in registers, kill the
561 // value, freeing the register being used, so it doesn't need to be
562 // spilled to memory.
563 //
564 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000565 KE = LV->killed_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000566 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000567 unsigned PhysReg = VirtReg;
Chris Lattnerc330b982004-01-31 21:27:19 +0000568 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner4e21b232004-02-17 08:09:40 +0000569 // If the virtual register was never materialized into a register, it
570 // might not be in the map, but it won't hurt to zero it out anyway.
Chris Lattner80cbed42004-02-09 02:12:04 +0000571 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
572 PhysReg = PhysRegSlot;
Chris Lattner80cbed42004-02-09 02:12:04 +0000573 PhysRegSlot = 0;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000574 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000575
Chris Lattner5a78ee82003-05-12 03:54:14 +0000576 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000577 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
578 << "[%reg" << VirtReg <<"], removing it from live set\n");
Chris Lattner506fa682003-08-05 00:49:09 +0000579 removePhysReg(PhysReg);
Chris Lattner5a78ee82003-05-12 03:54:14 +0000580 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000581 }
582 }
583
584 // Loop over all of the operands of the instruction, spilling registers that
585 // are defined, and marking explicit destinations in the PhysRegsUsed map.
586 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner373fba52004-02-10 20:41:10 +0000587 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
588 MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenos8cdd0212004-02-13 21:01:20 +0000589 unsigned Reg = MI->getOperand(i).getReg();
Alkis Evlogimenos80da8652004-02-12 02:27:10 +0000590 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
Chris Lattnerbfa53192003-01-13 00:25:40 +0000591 PhysRegsUsed[Reg] = 0; // It is free and reserved now
592 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000593 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
594 *AliasSet; ++AliasSet) {
Chris Lattner80cbed42004-02-09 02:12:04 +0000595 PhysRegsUseOrder.push_back(*AliasSet);
596 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000597 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000598 }
599
600 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000601 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
602 *ImplicitDefs; ++ImplicitDefs) {
603 unsigned Reg = *ImplicitDefs;
Chris Lattner4e21b232004-02-17 08:09:40 +0000604 spillPhysReg(MBB, MI, Reg, true);
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000605 PhysRegsUseOrder.push_back(Reg);
606 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000607 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
608 *AliasSet; ++AliasSet) {
Chris Lattner80cbed42004-02-09 02:12:04 +0000609 PhysRegsUseOrder.push_back(*AliasSet);
610 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenosebbd66c2004-01-13 06:24:30 +0000611 }
Alkis Evlogimenos9bced942003-12-13 01:20:58 +0000612 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000613
Chris Lattner101b8cd2002-12-16 16:15:28 +0000614 // Okay, we have allocated all of the source operands and spilled any values
615 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattnerbfa53192003-01-13 00:25:40 +0000616 // implicit defs and assign them to a register, spilling incoming values if
617 // we need to scavenge a register.
Chris Lattnerd4627092002-12-18 08:14:26 +0000618 //
Chris Lattner101b8cd2002-12-16 16:15:28 +0000619 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner5dd5be32004-02-10 21:12:22 +0000620 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
621 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenos8cdd0212004-02-13 21:01:20 +0000622 unsigned DestVirtReg = MI->getOperand(i).getReg();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000623 unsigned DestPhysReg;
624
Alkis Evlogimenosc17d57b2003-12-18 13:08:52 +0000625 // If DestVirtReg already has a value, use it.
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000626 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
Alkis Evlogimenos80da8652004-02-12 02:27:10 +0000627 DestPhysReg = getReg(MBB, MI, DestVirtReg);
Chris Lattner5a78ee82003-05-12 03:54:14 +0000628 markVirtRegModified(DestVirtReg);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000629 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
630 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000631
632 if (!DisableKill) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000633 // If this instruction defines any registers that are immediately dead,
634 // kill them now.
635 //
636 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
Chris Lattner5a78ee82003-05-12 03:54:14 +0000637 KE = LV->dead_end(MI); KI != KE; ++KI) {
Chris Lattnerbfa53192003-01-13 00:25:40 +0000638 unsigned VirtReg = KI->second;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000639 unsigned PhysReg = VirtReg;
Chris Lattnerc330b982004-01-31 21:27:19 +0000640 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
Chris Lattner80cbed42004-02-09 02:12:04 +0000641 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
642 PhysReg = PhysRegSlot;
643 assert(PhysReg != 0);
644 PhysRegSlot = 0;
Chris Lattner5a78ee82003-05-12 03:54:14 +0000645 }
Chris Lattnerbfa53192003-01-13 00:25:40 +0000646
Chris Lattner5a78ee82003-05-12 03:54:14 +0000647 if (PhysReg) {
Chris Lattner815b85e2003-08-04 23:36:39 +0000648 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
649 << " [%reg" << VirtReg
650 << "] is never used, removing it frame live list\n");
Chris Lattner5a78ee82003-05-12 03:54:14 +0000651 removePhysReg(PhysReg);
652 }
Chris Lattnerd4627092002-12-18 08:14:26 +0000653 }
654 }
Chris Lattner101b8cd2002-12-16 16:15:28 +0000655 }
656
657 // Rewind the iterator to point to the first flow control instruction...
Chris Lattnerb4d58d72003-01-14 22:00:31 +0000658 const TargetInstrInfo &TII = TM->getInstrInfo();
Alkis Evlogimenos80da8652004-02-12 02:27:10 +0000659 MI = MBB.end();
660 while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode()));
661 ++MI;
Chris Lattner101b8cd2002-12-16 16:15:28 +0000662
663 // Spill all physical registers holding virtual registers now.
Chris Lattner490627a2004-02-09 01:26:13 +0000664 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
665 if (PhysRegsUsed[i] != -1)
666 if (unsigned VirtReg = PhysRegsUsed[i])
Alkis Evlogimenos80da8652004-02-12 02:27:10 +0000667 spillVirtReg(MBB, MI, VirtReg, i);
Chris Lattner490627a2004-02-09 01:26:13 +0000668 else
669 removePhysReg(i);
Chris Lattner101b8cd2002-12-16 16:15:28 +0000670
Chris Lattner80cbed42004-02-09 02:12:04 +0000671#ifndef NDEBUG
672 bool AllOk = true;
673 for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
674 if (unsigned PR = Virt2PhysRegMap[i]) {
675 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
676 AllOk = false;
677 }
678 assert(AllOk && "Virtual registers still in phys regs?");
679#endif
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000680
Chris Lattner931947d2003-08-17 18:01:15 +0000681 // Clear any physical register which appear live at the end of the basic
682 // block, but which do not hold any virtual registers. e.g., the stack
683 // pointer.
684 PhysRegsUseOrder.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000685}
686
Chris Lattner0ea32b82002-12-17 03:16:10 +0000687
Chris Lattner101b8cd2002-12-16 16:15:28 +0000688/// runOnMachineFunction - Register allocate the whole function
689///
690bool RA::runOnMachineFunction(MachineFunction &Fn) {
691 DEBUG(std::cerr << "Machine Function " << "\n");
692 MF = &Fn;
Chris Lattnerb4e41112002-12-28 20:40:43 +0000693 TM = &Fn.getTarget();
694 RegInfo = TM->getRegisterInfo();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000695
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000696 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
Chris Lattner490627a2004-02-09 01:26:13 +0000697
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000698 // initialize the virtual->physical register map to have a 'null'
699 // mapping for all virtual registers
700 Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0);
Chris Lattner80cbed42004-02-09 02:12:04 +0000701
Chris Lattnerd4627092002-12-18 08:14:26 +0000702 if (!DisableKill)
Chris Lattnerbfa53192003-01-13 00:25:40 +0000703 LV = &getAnalysis<LiveVariables>();
Chris Lattnerd4627092002-12-18 08:14:26 +0000704
Chris Lattner101b8cd2002-12-16 16:15:28 +0000705 // Loop over all of the basic blocks, eliminating virtual register references
706 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
707 MBB != MBBe; ++MBB)
708 AllocateBasicBlock(*MBB);
709
Chris Lattnerb4e41112002-12-28 20:40:43 +0000710 StackSlotForVirtReg.clear();
Alkis Evlogimenosde6a3812004-02-13 18:20:47 +0000711 PhysRegsUsed.clear();
Chris Lattnerbfa53192003-01-13 00:25:40 +0000712 VirtRegModified.clear();
Chris Lattner80cbed42004-02-09 02:12:04 +0000713 Virt2PhysRegMap.clear();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000714 return true;
715}
716
Chris Lattnerc330b982004-01-31 21:27:19 +0000717FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattnerb4e41112002-12-28 20:40:43 +0000718 return new RA();
Chris Lattner101b8cd2002-12-16 16:15:28 +0000719}