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Chris Lattner1c4ae852004-08-01 05:59:33 +00001//===- AsmWriterEmitter.cpp - Generate an assembly writer -----------------===//
Misha Brukman650ba8e2005-04-22 00:00:37 +00002//
Chris Lattner1c4ae852004-08-01 05:59:33 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattner8adcd9f2007-12-29 20:37:13 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukman650ba8e2005-04-22 00:00:37 +00007//
Chris Lattner1c4ae852004-08-01 05:59:33 +00008//===----------------------------------------------------------------------===//
9//
10// This tablegen backend is emits an assembly printer for the current target.
11// Note that this is currently fairly skeletal, but will grow over time.
12//
13//===----------------------------------------------------------------------===//
14
Sean Callananb7e8f4a2010-02-09 21:50:41 +000015#include "AsmWriterInst.h"
Chris Lattner1c4ae852004-08-01 05:59:33 +000016#include "CodeGenTarget.h"
Jakob Stoklund Olesen892f4802012-03-30 21:12:52 +000017#include "SequenceToOffsetTable.h"
Craig Topperb6350132012-07-27 06:44:02 +000018#include "llvm/ADT/StringExtras.h"
Owen Andersona84be6c2011-06-27 21:06:21 +000019#include "llvm/ADT/Twine.h"
Chris Lattner692374c2006-07-18 17:18:03 +000020#include "llvm/Support/Debug.h"
Benjamin Kramer17c17bc2013-09-11 15:42:16 +000021#include "llvm/Support/Format.h"
Chris Lattner692374c2006-07-18 17:18:03 +000022#include "llvm/Support/MathExtras.h"
Peter Collingbourne84c287e2011-10-01 16:41:13 +000023#include "llvm/TableGen/Error.h"
24#include "llvm/TableGen/Record.h"
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000025#include "llvm/TableGen/TableGenBackend.h"
Jeff Cohenda636b32005-01-22 18:50:10 +000026#include <algorithm>
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000027#include <cassert>
28#include <map>
29#include <vector>
Chris Lattner1c4ae852004-08-01 05:59:33 +000030using namespace llvm;
31
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000032namespace {
33class AsmWriterEmitter {
34 RecordKeeper &Records;
Ahmed Bougachabd214002013-10-28 18:07:17 +000035 CodeGenTarget Target;
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000036 std::map<const CodeGenInstruction*, AsmWriterInst*> CGIAWIMap;
Craig Topper4c6129a2014-02-05 07:56:49 +000037 const std::vector<const CodeGenInstruction*> *NumberedInstructions;
Ahmed Bougachabd214002013-10-28 18:07:17 +000038 std::vector<AsmWriterInst> Instructions;
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000039public:
Ahmed Bougachabd214002013-10-28 18:07:17 +000040 AsmWriterEmitter(RecordKeeper &R);
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000041
42 void run(raw_ostream &o);
43
44private:
45 void EmitPrintInstruction(raw_ostream &o);
46 void EmitGetRegisterName(raw_ostream &o);
47 void EmitPrintAliasInstruction(raw_ostream &O);
48
49 AsmWriterInst *getAsmWriterInstByID(unsigned ID) const {
Craig Topper4c6129a2014-02-05 07:56:49 +000050 assert(ID < NumberedInstructions->size());
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000051 std::map<const CodeGenInstruction*, AsmWriterInst*>::const_iterator I =
Craig Topper4c6129a2014-02-05 07:56:49 +000052 CGIAWIMap.find(NumberedInstructions->at(ID));
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +000053 assert(I != CGIAWIMap.end() && "Didn't find inst!");
54 return I->second;
55 }
56 void FindUniqueOperandCommands(std::vector<std::string> &UOC,
57 std::vector<unsigned> &InstIdxs,
58 std::vector<unsigned> &InstOpsUsed) const;
59};
60} // end anonymous namespace
61
Chris Lattner59a7f5c2005-01-22 20:31:17 +000062static void PrintCases(std::vector<std::pair<std::string,
Daniel Dunbar38a22bf2009-07-03 00:10:29 +000063 AsmWriterOperand> > &OpsToPrint, raw_ostream &O) {
Chris Lattner59a7f5c2005-01-22 20:31:17 +000064 O << " case " << OpsToPrint.back().first << ": ";
65 AsmWriterOperand TheOp = OpsToPrint.back().second;
66 OpsToPrint.pop_back();
67
68 // Check to see if any other operands are identical in this list, and if so,
69 // emit a case label for them.
70 for (unsigned i = OpsToPrint.size(); i != 0; --i)
71 if (OpsToPrint[i-1].second == TheOp) {
72 O << "\n case " << OpsToPrint[i-1].first << ": ";
73 OpsToPrint.erase(OpsToPrint.begin()+i-1);
74 }
75
76 // Finally, emit the code.
Chris Lattner692374c2006-07-18 17:18:03 +000077 O << TheOp.getCode();
Chris Lattner59a7f5c2005-01-22 20:31:17 +000078 O << "break;\n";
79}
80
Chris Lattner9ceb7c82005-01-22 18:38:13 +000081
82/// EmitInstructions - Emit the last instruction in the vector and any other
83/// instructions that are suitably similar to it.
84static void EmitInstructions(std::vector<AsmWriterInst> &Insts,
Daniel Dunbar38a22bf2009-07-03 00:10:29 +000085 raw_ostream &O) {
Chris Lattner9ceb7c82005-01-22 18:38:13 +000086 AsmWriterInst FirstInst = Insts.back();
87 Insts.pop_back();
88
89 std::vector<AsmWriterInst> SimilarInsts;
90 unsigned DifferingOperand = ~0;
91 for (unsigned i = Insts.size(); i != 0; --i) {
Chris Lattner92275bb2005-01-22 19:22:23 +000092 unsigned DiffOp = Insts[i-1].MatchesAllButOneOp(FirstInst);
93 if (DiffOp != ~1U) {
Chris Lattner9ceb7c82005-01-22 18:38:13 +000094 if (DifferingOperand == ~0U) // First match!
95 DifferingOperand = DiffOp;
96
97 // If this differs in the same operand as the rest of the instructions in
98 // this class, move it to the SimilarInsts list.
Chris Lattner92275bb2005-01-22 19:22:23 +000099 if (DifferingOperand == DiffOp || DiffOp == ~0U) {
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000100 SimilarInsts.push_back(Insts[i-1]);
101 Insts.erase(Insts.begin()+i-1);
102 }
103 }
104 }
105
Chris Lattner017b93d2006-05-01 17:01:17 +0000106 O << " case " << FirstInst.CGI->Namespace << "::"
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000107 << FirstInst.CGI->TheDef->getName() << ":\n";
108 for (unsigned i = 0, e = SimilarInsts.size(); i != e; ++i)
Chris Lattner017b93d2006-05-01 17:01:17 +0000109 O << " case " << SimilarInsts[i].CGI->Namespace << "::"
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000110 << SimilarInsts[i].CGI->TheDef->getName() << ":\n";
111 for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) {
112 if (i != DifferingOperand) {
113 // If the operand is the same for all instructions, just print it.
Chris Lattner692374c2006-07-18 17:18:03 +0000114 O << " " << FirstInst.Operands[i].getCode();
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000115 } else {
116 // If this is the operand that varies between all of the instructions,
117 // emit a switch for just this operand now.
118 O << " switch (MI->getOpcode()) {\n";
Chris Lattner59a7f5c2005-01-22 20:31:17 +0000119 std::vector<std::pair<std::string, AsmWriterOperand> > OpsToPrint;
Chris Lattner017b93d2006-05-01 17:01:17 +0000120 OpsToPrint.push_back(std::make_pair(FirstInst.CGI->Namespace + "::" +
Chris Lattner59a7f5c2005-01-22 20:31:17 +0000121 FirstInst.CGI->TheDef->getName(),
122 FirstInst.Operands[i]));
Misha Brukman650ba8e2005-04-22 00:00:37 +0000123
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000124 for (unsigned si = 0, e = SimilarInsts.size(); si != e; ++si) {
Chris Lattner59a7f5c2005-01-22 20:31:17 +0000125 AsmWriterInst &AWI = SimilarInsts[si];
Chris Lattner017b93d2006-05-01 17:01:17 +0000126 OpsToPrint.push_back(std::make_pair(AWI.CGI->Namespace+"::"+
Chris Lattner59a7f5c2005-01-22 20:31:17 +0000127 AWI.CGI->TheDef->getName(),
128 AWI.Operands[i]));
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000129 }
Chris Lattner59a7f5c2005-01-22 20:31:17 +0000130 std::reverse(OpsToPrint.begin(), OpsToPrint.end());
131 while (!OpsToPrint.empty())
132 PrintCases(OpsToPrint, O);
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000133 O << " }";
134 }
135 O << "\n";
136 }
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000137 O << " break;\n";
138}
Chris Lattner0c23ba52005-01-22 17:32:42 +0000139
Chris Lattner692374c2006-07-18 17:18:03 +0000140void AsmWriterEmitter::
Jim Grosbacha5497342010-09-29 22:32:50 +0000141FindUniqueOperandCommands(std::vector<std::string> &UniqueOperandCommands,
Chris Lattneredee5252006-07-18 18:28:27 +0000142 std::vector<unsigned> &InstIdxs,
143 std::vector<unsigned> &InstOpsUsed) const {
Craig Topper4c6129a2014-02-05 07:56:49 +0000144 InstIdxs.assign(NumberedInstructions->size(), ~0U);
Jim Grosbacha5497342010-09-29 22:32:50 +0000145
Chris Lattner692374c2006-07-18 17:18:03 +0000146 // This vector parallels UniqueOperandCommands, keeping track of which
147 // instructions each case are used for. It is a comma separated string of
148 // enums.
149 std::vector<std::string> InstrsForCase;
150 InstrsForCase.resize(UniqueOperandCommands.size());
Chris Lattneredee5252006-07-18 18:28:27 +0000151 InstOpsUsed.assign(UniqueOperandCommands.size(), 0);
Jim Grosbacha5497342010-09-29 22:32:50 +0000152
Craig Topper4c6129a2014-02-05 07:56:49 +0000153 for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
Chris Lattner692374c2006-07-18 17:18:03 +0000154 const AsmWriterInst *Inst = getAsmWriterInstByID(i);
Rafael Espindolab1f25f12014-03-07 06:08:31 +0000155 if (Inst == 0)
156 continue; // PHI, INLINEASM, CFI_INSTRUCTION, etc.
Jim Grosbacha5497342010-09-29 22:32:50 +0000157
Chris Lattner692374c2006-07-18 17:18:03 +0000158 std::string Command;
Chris Lattnercb0c8482006-07-18 17:56:07 +0000159 if (Inst->Operands.empty())
Chris Lattner692374c2006-07-18 17:18:03 +0000160 continue; // Instruction already done.
Chris Lattner9d250692006-07-18 17:50:22 +0000161
Chris Lattnercb0c8482006-07-18 17:56:07 +0000162 Command = " " + Inst->Operands[0].getCode() + "\n";
Chris Lattner9d250692006-07-18 17:50:22 +0000163
Chris Lattner692374c2006-07-18 17:18:03 +0000164 // Check to see if we already have 'Command' in UniqueOperandCommands.
165 // If not, add it.
166 bool FoundIt = false;
167 for (unsigned idx = 0, e = UniqueOperandCommands.size(); idx != e; ++idx)
168 if (UniqueOperandCommands[idx] == Command) {
169 InstIdxs[i] = idx;
170 InstrsForCase[idx] += ", ";
171 InstrsForCase[idx] += Inst->CGI->TheDef->getName();
172 FoundIt = true;
173 break;
174 }
175 if (!FoundIt) {
176 InstIdxs[i] = UniqueOperandCommands.size();
177 UniqueOperandCommands.push_back(Command);
178 InstrsForCase.push_back(Inst->CGI->TheDef->getName());
Chris Lattneredee5252006-07-18 18:28:27 +0000179
180 // This command matches one operand so far.
181 InstOpsUsed.push_back(1);
182 }
183 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000184
Chris Lattneredee5252006-07-18 18:28:27 +0000185 // For each entry of UniqueOperandCommands, there is a set of instructions
186 // that uses it. If the next command of all instructions in the set are
187 // identical, fold it into the command.
188 for (unsigned CommandIdx = 0, e = UniqueOperandCommands.size();
189 CommandIdx != e; ++CommandIdx) {
Jim Grosbacha5497342010-09-29 22:32:50 +0000190
Chris Lattneredee5252006-07-18 18:28:27 +0000191 for (unsigned Op = 1; ; ++Op) {
192 // Scan for the first instruction in the set.
193 std::vector<unsigned>::iterator NIT =
194 std::find(InstIdxs.begin(), InstIdxs.end(), CommandIdx);
195 if (NIT == InstIdxs.end()) break; // No commonality.
196
197 // If this instruction has no more operands, we isn't anything to merge
198 // into this command.
Jim Grosbacha5497342010-09-29 22:32:50 +0000199 const AsmWriterInst *FirstInst =
Chris Lattneredee5252006-07-18 18:28:27 +0000200 getAsmWriterInstByID(NIT-InstIdxs.begin());
201 if (!FirstInst || FirstInst->Operands.size() == Op)
202 break;
203
204 // Otherwise, scan to see if all of the other instructions in this command
205 // set share the operand.
206 bool AllSame = true;
David Greene5b4bc262009-07-29 20:10:24 +0000207 // Keep track of the maximum, number of operands or any
208 // instruction we see in the group.
209 size_t MaxSize = FirstInst->Operands.size();
210
Chris Lattneredee5252006-07-18 18:28:27 +0000211 for (NIT = std::find(NIT+1, InstIdxs.end(), CommandIdx);
212 NIT != InstIdxs.end();
213 NIT = std::find(NIT+1, InstIdxs.end(), CommandIdx)) {
214 // Okay, found another instruction in this command set. If the operand
215 // matches, we're ok, otherwise bail out.
Jim Grosbacha5497342010-09-29 22:32:50 +0000216 const AsmWriterInst *OtherInst =
Chris Lattneredee5252006-07-18 18:28:27 +0000217 getAsmWriterInstByID(NIT-InstIdxs.begin());
David Greene5b4bc262009-07-29 20:10:24 +0000218
219 if (OtherInst &&
220 OtherInst->Operands.size() > FirstInst->Operands.size())
221 MaxSize = std::max(MaxSize, OtherInst->Operands.size());
222
Chris Lattneredee5252006-07-18 18:28:27 +0000223 if (!OtherInst || OtherInst->Operands.size() == Op ||
224 OtherInst->Operands[Op] != FirstInst->Operands[Op]) {
225 AllSame = false;
226 break;
227 }
228 }
229 if (!AllSame) break;
Jim Grosbacha5497342010-09-29 22:32:50 +0000230
Chris Lattneredee5252006-07-18 18:28:27 +0000231 // Okay, everything in this command set has the same next operand. Add it
232 // to UniqueOperandCommands and remember that it was consumed.
233 std::string Command = " " + FirstInst->Operands[Op].getCode() + "\n";
Jim Grosbacha5497342010-09-29 22:32:50 +0000234
Chris Lattneredee5252006-07-18 18:28:27 +0000235 UniqueOperandCommands[CommandIdx] += Command;
236 InstOpsUsed[CommandIdx]++;
Chris Lattner692374c2006-07-18 17:18:03 +0000237 }
238 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000239
Chris Lattner692374c2006-07-18 17:18:03 +0000240 // Prepend some of the instructions each case is used for onto the case val.
241 for (unsigned i = 0, e = InstrsForCase.size(); i != e; ++i) {
242 std::string Instrs = InstrsForCase[i];
243 if (Instrs.size() > 70) {
244 Instrs.erase(Instrs.begin()+70, Instrs.end());
245 Instrs += "...";
246 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000247
Chris Lattner692374c2006-07-18 17:18:03 +0000248 if (!Instrs.empty())
Jim Grosbacha5497342010-09-29 22:32:50 +0000249 UniqueOperandCommands[i] = " // " + Instrs + "\n" +
Chris Lattner692374c2006-07-18 17:18:03 +0000250 UniqueOperandCommands[i];
251 }
252}
253
254
Daniel Dunbar04f049f2009-10-17 20:43:42 +0000255static void UnescapeString(std::string &Str) {
256 for (unsigned i = 0; i != Str.size(); ++i) {
257 if (Str[i] == '\\' && i != Str.size()-1) {
258 switch (Str[i+1]) {
259 default: continue; // Don't execute the code after the switch.
260 case 'a': Str[i] = '\a'; break;
261 case 'b': Str[i] = '\b'; break;
262 case 'e': Str[i] = 27; break;
263 case 'f': Str[i] = '\f'; break;
264 case 'n': Str[i] = '\n'; break;
265 case 'r': Str[i] = '\r'; break;
266 case 't': Str[i] = '\t'; break;
267 case 'v': Str[i] = '\v'; break;
268 case '"': Str[i] = '\"'; break;
269 case '\'': Str[i] = '\''; break;
270 case '\\': Str[i] = '\\'; break;
271 }
272 // Nuke the second character.
273 Str.erase(Str.begin()+i+1);
274 }
275 }
276}
277
Chris Lattner06c5eed2009-09-13 20:08:00 +0000278/// EmitPrintInstruction - Generate the code for the "printInstruction" method
Ahmed Bougachabd214002013-10-28 18:07:17 +0000279/// implementation. Destroys all instances of AsmWriterInst information, by
280/// clearing the Instructions vector.
Chris Lattner06c5eed2009-09-13 20:08:00 +0000281void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) {
Chris Lattner6ffa5012004-08-14 22:50:53 +0000282 Record *AsmWriter = Target.getAsmWriter();
Chris Lattner72770f52004-10-03 20:19:02 +0000283 std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
Jim Grosbacha5497342010-09-29 22:32:50 +0000284
Chris Lattner1c4ae852004-08-01 05:59:33 +0000285 O <<
286 "/// printInstruction - This method is automatically generated by tablegen\n"
Chris Lattner06c5eed2009-09-13 20:08:00 +0000287 "/// from the instruction set description.\n"
Chris Lattnerb94284b2009-08-08 01:32:19 +0000288 "void " << Target.getName() << ClassName
Roman Divacky9dc6df52014-01-10 22:59:49 +0000289 << "::printInstruction(const MCInst *MI, raw_ostream &O) {\n";
Chris Lattner1c4ae852004-08-01 05:59:33 +0000290
Chris Lattnere32982c2006-07-14 22:59:11 +0000291 // Build an aggregate string, and build a table of offsets into it.
Benjamin Kramer22d093e2012-04-02 09:13:46 +0000292 SequenceToOffsetTable<std::string> StringTable;
Jim Grosbacha5497342010-09-29 22:32:50 +0000293
Chris Lattner5d751b42006-09-27 16:44:09 +0000294 /// OpcodeInfo - This encodes the index of the string to use for the first
Chris Lattner1ac0eb72006-07-18 17:32:27 +0000295 /// chunk of the output as well as indices used for operand printing.
Manman Ren68cf9fc2012-09-13 17:43:46 +0000296 /// To reduce the number of unhandled cases, we expand the size from 32-bit
297 /// to 32+16 = 48-bit.
Craig Topper06cec4c2012-09-14 08:33:11 +0000298 std::vector<uint64_t> OpcodeInfo;
Jim Grosbacha5497342010-09-29 22:32:50 +0000299
Benjamin Kramer22d093e2012-04-02 09:13:46 +0000300 // Add all strings to the string table upfront so it can generate an optimized
301 // representation.
Craig Topper4c6129a2014-02-05 07:56:49 +0000302 for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
303 AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)];
Benjamin Kramer22d093e2012-04-02 09:13:46 +0000304 if (AWI != 0 &&
Jim Grosbachf4e67082012-04-18 18:56:33 +0000305 AWI->Operands[0].OperandType ==
306 AsmWriterOperand::isLiteralTextOperand &&
Benjamin Kramer22d093e2012-04-02 09:13:46 +0000307 !AWI->Operands[0].Str.empty()) {
308 std::string Str = AWI->Operands[0].Str;
309 UnescapeString(Str);
310 StringTable.add(Str);
311 }
312 }
313
314 StringTable.layout();
315
Chris Lattner1ac0eb72006-07-18 17:32:27 +0000316 unsigned MaxStringIdx = 0;
Craig Topper4c6129a2014-02-05 07:56:49 +0000317 for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
318 AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions->at(i)];
Chris Lattnere32982c2006-07-14 22:59:11 +0000319 unsigned Idx;
Chris Lattner36504652006-07-19 01:39:06 +0000320 if (AWI == 0) {
Chris Lattnere32982c2006-07-14 22:59:11 +0000321 // Something not handled by the asmwriter printer.
Chris Lattnerb47ed612009-09-14 01:16:36 +0000322 Idx = ~0U;
Jim Grosbacha5497342010-09-29 22:32:50 +0000323 } else if (AWI->Operands[0].OperandType !=
Chris Lattner36504652006-07-19 01:39:06 +0000324 AsmWriterOperand::isLiteralTextOperand ||
325 AWI->Operands[0].Str.empty()) {
326 // Something handled by the asmwriter printer, but with no leading string.
Benjamin Kramer22d093e2012-04-02 09:13:46 +0000327 Idx = StringTable.get("");
Chris Lattnere32982c2006-07-14 22:59:11 +0000328 } else {
Chris Lattnerb47ed612009-09-14 01:16:36 +0000329 std::string Str = AWI->Operands[0].Str;
330 UnescapeString(Str);
Benjamin Kramer22d093e2012-04-02 09:13:46 +0000331 Idx = StringTable.get(Str);
Chris Lattnerb47ed612009-09-14 01:16:36 +0000332 MaxStringIdx = std::max(MaxStringIdx, Idx);
Jim Grosbacha5497342010-09-29 22:32:50 +0000333
Chris Lattnere32982c2006-07-14 22:59:11 +0000334 // Nuke the string from the operand list. It is now handled!
335 AWI->Operands.erase(AWI->Operands.begin());
Chris Lattner92275bb2005-01-22 19:22:23 +0000336 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000337
Chris Lattnerb47ed612009-09-14 01:16:36 +0000338 // Bias offset by one since we want 0 as a sentinel.
Craig Topper06cec4c2012-09-14 08:33:11 +0000339 OpcodeInfo.push_back(Idx+1);
Chris Lattner92275bb2005-01-22 19:22:23 +0000340 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000341
Chris Lattner1ac0eb72006-07-18 17:32:27 +0000342 // Figure out how many bits we used for the string index.
Chris Lattnerb47ed612009-09-14 01:16:36 +0000343 unsigned AsmStrBits = Log2_32_Ceil(MaxStringIdx+2);
Jim Grosbacha5497342010-09-29 22:32:50 +0000344
Chris Lattner692374c2006-07-18 17:18:03 +0000345 // To reduce code size, we compactify common instructions into a few bits
346 // in the opcode-indexed table.
Craig Topper06cec4c2012-09-14 08:33:11 +0000347 unsigned BitsLeft = 64-AsmStrBits;
Chris Lattner692374c2006-07-18 17:18:03 +0000348
349 std::vector<std::vector<std::string> > TableDrivenOperandPrinters;
Jim Grosbacha5497342010-09-29 22:32:50 +0000350
Chris Lattnercb0c8482006-07-18 17:56:07 +0000351 while (1) {
Chris Lattner692374c2006-07-18 17:18:03 +0000352 std::vector<std::string> UniqueOperandCommands;
Chris Lattner692374c2006-07-18 17:18:03 +0000353 std::vector<unsigned> InstIdxs;
Chris Lattneredee5252006-07-18 18:28:27 +0000354 std::vector<unsigned> NumInstOpsHandled;
355 FindUniqueOperandCommands(UniqueOperandCommands, InstIdxs,
356 NumInstOpsHandled);
Jim Grosbacha5497342010-09-29 22:32:50 +0000357
Chris Lattner692374c2006-07-18 17:18:03 +0000358 // If we ran out of operands to print, we're done.
359 if (UniqueOperandCommands.empty()) break;
Jim Grosbacha5497342010-09-29 22:32:50 +0000360
Chris Lattner692374c2006-07-18 17:18:03 +0000361 // Compute the number of bits we need to represent these cases, this is
362 // ceil(log2(numentries)).
363 unsigned NumBits = Log2_32_Ceil(UniqueOperandCommands.size());
Jim Grosbacha5497342010-09-29 22:32:50 +0000364
Chris Lattner692374c2006-07-18 17:18:03 +0000365 // If we don't have enough bits for this operand, don't include it.
366 if (NumBits > BitsLeft) {
Chris Lattner34822f62009-08-23 04:44:11 +0000367 DEBUG(errs() << "Not enough bits to densely encode " << NumBits
368 << " more bits\n");
Chris Lattner692374c2006-07-18 17:18:03 +0000369 break;
370 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000371
Chris Lattner692374c2006-07-18 17:18:03 +0000372 // Otherwise, we can include this in the initial lookup table. Add it in.
Chris Lattner692374c2006-07-18 17:18:03 +0000373 for (unsigned i = 0, e = InstIdxs.size(); i != e; ++i)
Manman Ren68cf9fc2012-09-13 17:43:46 +0000374 if (InstIdxs[i] != ~0U) {
Craig Topper06cec4c2012-09-14 08:33:11 +0000375 OpcodeInfo[i] |= (uint64_t)InstIdxs[i] << (64-BitsLeft);
Manman Ren68cf9fc2012-09-13 17:43:46 +0000376 }
Craig Topper06cec4c2012-09-14 08:33:11 +0000377 BitsLeft -= NumBits;
Jim Grosbacha5497342010-09-29 22:32:50 +0000378
Chris Lattnercb0c8482006-07-18 17:56:07 +0000379 // Remove the info about this operand.
Craig Topper4c6129a2014-02-05 07:56:49 +0000380 for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
Chris Lattnercb0c8482006-07-18 17:56:07 +0000381 if (AsmWriterInst *Inst = getAsmWriterInstByID(i))
Chris Lattneredee5252006-07-18 18:28:27 +0000382 if (!Inst->Operands.empty()) {
383 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]];
Chris Lattner6e172082006-07-18 19:06:01 +0000384 assert(NumOps <= Inst->Operands.size() &&
385 "Can't remove this many ops!");
Chris Lattneredee5252006-07-18 18:28:27 +0000386 Inst->Operands.erase(Inst->Operands.begin(),
387 Inst->Operands.begin()+NumOps);
388 }
Chris Lattnercb0c8482006-07-18 17:56:07 +0000389 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000390
Chris Lattnercb0c8482006-07-18 17:56:07 +0000391 // Remember the handlers for this set of operands.
Chris Lattner692374c2006-07-18 17:18:03 +0000392 TableDrivenOperandPrinters.push_back(UniqueOperandCommands);
393 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000394
395
Craig Topper06cec4c2012-09-14 08:33:11 +0000396 // We always emit at least one 32-bit table. A second table is emitted if
397 // more bits are needed.
398 O<<" static const uint32_t OpInfo[] = {\n";
Craig Topper4c6129a2014-02-05 07:56:49 +0000399 for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
Craig Topper06cec4c2012-09-14 08:33:11 +0000400 O << " " << (OpcodeInfo[i] & 0xffffffff) << "U,\t// "
Craig Topper4c6129a2014-02-05 07:56:49 +0000401 << NumberedInstructions->at(i)->TheDef->getName() << "\n";
Chris Lattner692374c2006-07-18 17:18:03 +0000402 }
403 // Add a dummy entry so the array init doesn't end with a comma.
Chris Lattner1ac0eb72006-07-18 17:32:27 +0000404 O << " 0U\n";
Chris Lattnere32982c2006-07-14 22:59:11 +0000405 O << " };\n\n";
Jim Grosbacha5497342010-09-29 22:32:50 +0000406
Craig Topper06cec4c2012-09-14 08:33:11 +0000407 if (BitsLeft < 32) {
Manman Ren68cf9fc2012-09-13 17:43:46 +0000408 // Add a second OpInfo table only when it is necessary.
Craig Topper06cec4c2012-09-14 08:33:11 +0000409 // Adjust the type of the second table based on the number of bits needed.
410 O << " static const uint"
411 << ((BitsLeft < 16) ? "32" : (BitsLeft < 24) ? "16" : "8")
412 << "_t OpInfo2[] = {\n";
Craig Topper4c6129a2014-02-05 07:56:49 +0000413 for (unsigned i = 0, e = NumberedInstructions->size(); i != e; ++i) {
Craig Topper06cec4c2012-09-14 08:33:11 +0000414 O << " " << (OpcodeInfo[i] >> 32) << "U,\t// "
Craig Topper4c6129a2014-02-05 07:56:49 +0000415 << NumberedInstructions->at(i)->TheDef->getName() << "\n";
Manman Ren68cf9fc2012-09-13 17:43:46 +0000416 }
417 // Add a dummy entry so the array init doesn't end with a comma.
418 O << " 0U\n";
419 O << " };\n\n";
420 }
421
Chris Lattnere32982c2006-07-14 22:59:11 +0000422 // Emit the string itself.
Benjamin Kramer22d093e2012-04-02 09:13:46 +0000423 O << " const char AsmStrs[] = {\n";
424 StringTable.emit(O, printChar);
425 O << " };\n\n";
Chris Lattnere32982c2006-07-14 22:59:11 +0000426
Evan Cheng32e53472008-02-02 08:39:46 +0000427 O << " O << \"\\t\";\n\n";
428
Craig Topper06cec4c2012-09-14 08:33:11 +0000429 O << " // Emit the opcode for the instruction.\n";
430 if (BitsLeft < 32) {
431 // If we have two tables then we need to perform two lookups and combine
432 // the results into a single 64-bit value.
433 O << " uint64_t Bits1 = OpInfo[MI->getOpcode()];\n"
434 << " uint64_t Bits2 = OpInfo2[MI->getOpcode()];\n"
435 << " uint64_t Bits = (Bits2 << 32) | Bits1;\n";
436 } else {
437 // If only one table is used we just need to perform a single lookup.
438 O << " uint32_t Bits = OpInfo[MI->getOpcode()];\n";
439 }
Manman Ren68cf9fc2012-09-13 17:43:46 +0000440 O << " assert(Bits != 0 && \"Cannot print this instruction.\");\n"
Chris Lattnerb47ed612009-09-14 01:16:36 +0000441 << " O << AsmStrs+(Bits & " << (1 << AsmStrBits)-1 << ")-1;\n\n";
David Greenefdd25192009-08-05 21:00:52 +0000442
Chris Lattner692374c2006-07-18 17:18:03 +0000443 // Output the table driven operand information.
Craig Topper06cec4c2012-09-14 08:33:11 +0000444 BitsLeft = 64-AsmStrBits;
Chris Lattner692374c2006-07-18 17:18:03 +0000445 for (unsigned i = 0, e = TableDrivenOperandPrinters.size(); i != e; ++i) {
446 std::vector<std::string> &Commands = TableDrivenOperandPrinters[i];
447
448 // Compute the number of bits we need to represent these cases, this is
449 // ceil(log2(numentries)).
450 unsigned NumBits = Log2_32_Ceil(Commands.size());
451 assert(NumBits <= BitsLeft && "consistency error");
Jim Grosbacha5497342010-09-29 22:32:50 +0000452
Chris Lattner692374c2006-07-18 17:18:03 +0000453 // Emit code to extract this field from Bits.
Chris Lattner692374c2006-07-18 17:18:03 +0000454 O << "\n // Fragment " << i << " encoded into " << NumBits
Chris Lattner75dcf6c2006-07-18 17:43:54 +0000455 << " bits for " << Commands.size() << " unique commands.\n";
Jim Grosbacha5497342010-09-29 22:32:50 +0000456
Chris Lattneredee5252006-07-18 18:28:27 +0000457 if (Commands.size() == 2) {
Chris Lattner75dcf6c2006-07-18 17:43:54 +0000458 // Emit two possibilitys with if/else.
Craig Topper06cec4c2012-09-14 08:33:11 +0000459 O << " if ((Bits >> "
460 << (64-BitsLeft) << ") & "
Chris Lattner75dcf6c2006-07-18 17:43:54 +0000461 << ((1 << NumBits)-1) << ") {\n"
462 << Commands[1]
463 << " } else {\n"
464 << Commands[0]
465 << " }\n\n";
Eric Christophera573d192010-09-18 18:50:27 +0000466 } else if (Commands.size() == 1) {
467 // Emit a single possibility.
468 O << Commands[0] << "\n\n";
Chris Lattner75dcf6c2006-07-18 17:43:54 +0000469 } else {
Craig Topper06cec4c2012-09-14 08:33:11 +0000470 O << " switch ((Bits >> "
471 << (64-BitsLeft) << ") & "
Chris Lattner75dcf6c2006-07-18 17:43:54 +0000472 << ((1 << NumBits)-1) << ") {\n"
473 << " default: // unreachable.\n";
Jim Grosbacha5497342010-09-29 22:32:50 +0000474
Chris Lattner75dcf6c2006-07-18 17:43:54 +0000475 // Print out all the cases.
476 for (unsigned i = 0, e = Commands.size(); i != e; ++i) {
477 O << " case " << i << ":\n";
478 O << Commands[i];
479 O << " break;\n";
480 }
481 O << " }\n\n";
Chris Lattner692374c2006-07-18 17:18:03 +0000482 }
Craig Topper06cec4c2012-09-14 08:33:11 +0000483 BitsLeft -= NumBits;
Chris Lattner692374c2006-07-18 17:18:03 +0000484 }
Jim Grosbacha5497342010-09-29 22:32:50 +0000485
Chris Lattnercb0c8482006-07-18 17:56:07 +0000486 // Okay, delete instructions with no operand info left.
Chris Lattner692374c2006-07-18 17:18:03 +0000487 for (unsigned i = 0, e = Instructions.size(); i != e; ++i) {
488 // Entire instruction has been emitted?
489 AsmWriterInst &Inst = Instructions[i];
Chris Lattnercb0c8482006-07-18 17:56:07 +0000490 if (Inst.Operands.empty()) {
Chris Lattner692374c2006-07-18 17:18:03 +0000491 Instructions.erase(Instructions.begin()+i);
Chris Lattnercb0c8482006-07-18 17:56:07 +0000492 --i; --e;
Chris Lattner692374c2006-07-18 17:18:03 +0000493 }
494 }
495
Jim Grosbacha5497342010-09-29 22:32:50 +0000496
Chris Lattner692374c2006-07-18 17:18:03 +0000497 // Because this is a vector, we want to emit from the end. Reverse all of the
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000498 // elements in the vector.
499 std::reverse(Instructions.begin(), Instructions.end());
Jim Grosbacha5497342010-09-29 22:32:50 +0000500
501
Chris Lattnerbf1a7692009-09-18 18:10:19 +0000502 // Now that we've emitted all of the operand info that fit into 32 bits, emit
503 // information for those instructions that are left. This is a less dense
504 // encoding, but we expect the main 32-bit table to handle the majority of
505 // instructions.
Chris Lattner66e288b2006-07-18 17:38:46 +0000506 if (!Instructions.empty()) {
507 // Find the opcode # of inline asm.
508 O << " switch (MI->getOpcode()) {\n";
509 while (!Instructions.empty())
510 EmitInstructions(Instructions, O);
Chris Lattner9ceb7c82005-01-22 18:38:13 +0000511
Chris Lattner66e288b2006-07-18 17:38:46 +0000512 O << " }\n";
Chris Lattnerb94284b2009-08-08 01:32:19 +0000513 O << " return;\n";
Chris Lattner66e288b2006-07-18 17:38:46 +0000514 }
David Greene5b4bc262009-07-29 20:10:24 +0000515
Chris Lattner6e172082006-07-18 19:06:01 +0000516 O << "}\n";
Chris Lattner1c4ae852004-08-01 05:59:33 +0000517}
Chris Lattner06c5eed2009-09-13 20:08:00 +0000518
Owen Andersona84be6c2011-06-27 21:06:21 +0000519static void
520emitRegisterNameString(raw_ostream &O, StringRef AltName,
Craig Topper9c252eb2012-04-03 06:52:47 +0000521 const std::vector<CodeGenRegister*> &Registers) {
Jakob Stoklund Olesen892f4802012-03-30 21:12:52 +0000522 SequenceToOffsetTable<std::string> StringTable;
523 SmallVector<std::string, 4> AsmNames(Registers.size());
Owen Andersona84be6c2011-06-27 21:06:21 +0000524 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
525 const CodeGenRegister &Reg = *Registers[i];
Jakob Stoklund Olesen892f4802012-03-30 21:12:52 +0000526 std::string &AsmName = AsmNames[i];
Owen Andersona84be6c2011-06-27 21:06:21 +0000527
Owen Andersona84be6c2011-06-27 21:06:21 +0000528 // "NoRegAltName" is special. We don't need to do a lookup for that,
529 // as it's just a reference to the default register name.
530 if (AltName == "" || AltName == "NoRegAltName") {
531 AsmName = Reg.TheDef->getValueAsString("AsmName");
532 if (AsmName.empty())
533 AsmName = Reg.getName();
534 } else {
535 // Make sure the register has an alternate name for this index.
536 std::vector<Record*> AltNameList =
537 Reg.TheDef->getValueAsListOfDefs("RegAltNameIndices");
538 unsigned Idx = 0, e;
539 for (e = AltNameList.size();
540 Idx < e && (AltNameList[Idx]->getName() != AltName);
541 ++Idx)
542 ;
543 // If the register has an alternate name for this index, use it.
544 // Otherwise, leave it empty as an error flag.
545 if (Idx < e) {
546 std::vector<std::string> AltNames =
547 Reg.TheDef->getValueAsListOfStrings("AltNames");
548 if (AltNames.size() <= Idx)
Joerg Sonnenberger635debe2012-10-25 20:33:17 +0000549 PrintFatalError(Reg.TheDef->getLoc(),
550 (Twine("Register definition missing alt name for '") +
551 AltName + "'.").str());
Owen Andersona84be6c2011-06-27 21:06:21 +0000552 AsmName = AltNames[Idx];
553 }
554 }
Jakob Stoklund Olesen892f4802012-03-30 21:12:52 +0000555 StringTable.add(AsmName);
556 }
Owen Andersona84be6c2011-06-27 21:06:21 +0000557
Craig Topperf8f0a232012-09-15 01:22:42 +0000558 StringTable.layout();
Jakob Stoklund Olesen892f4802012-03-30 21:12:52 +0000559 O << " static const char AsmStrs" << AltName << "[] = {\n";
560 StringTable.emit(O, printChar);
561 O << " };\n\n";
562
Craig Topperf8f0a232012-09-15 01:22:42 +0000563 O << " static const uint32_t RegAsmOffset" << AltName << "[] = {";
Jakob Stoklund Olesen892f4802012-03-30 21:12:52 +0000564 for (unsigned i = 0, e = Registers.size(); i != e; ++i) {
Craig Topper7a2cea12012-04-02 00:47:39 +0000565 if ((i % 14) == 0)
566 O << "\n ";
567 O << StringTable.get(AsmNames[i]) << ", ";
Owen Andersona84be6c2011-06-27 21:06:21 +0000568 }
Craig Topper9c252eb2012-04-03 06:52:47 +0000569 O << "\n };\n"
Owen Andersona84be6c2011-06-27 21:06:21 +0000570 << "\n";
Owen Andersona84be6c2011-06-27 21:06:21 +0000571}
Chris Lattner06c5eed2009-09-13 20:08:00 +0000572
573void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) {
Chris Lattner06c5eed2009-09-13 20:08:00 +0000574 Record *AsmWriter = Target.getAsmWriter();
575 std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
Jakob Stoklund Olesen8e188be2011-06-18 04:26:06 +0000576 const std::vector<CodeGenRegister*> &Registers =
577 Target.getRegBank().getRegisters();
Owen Andersona84be6c2011-06-27 21:06:21 +0000578 std::vector<Record*> AltNameIndices = Target.getRegAltNameIndices();
579 bool hasAltNames = AltNameIndices.size() > 1;
Jim Grosbacha5497342010-09-29 22:32:50 +0000580
Chris Lattner06c5eed2009-09-13 20:08:00 +0000581 O <<
582 "\n\n/// getRegisterName - This method is automatically generated by tblgen\n"
583 "/// from the register set description. This returns the assembler name\n"
584 "/// for the specified register.\n"
Owen Andersona84be6c2011-06-27 21:06:21 +0000585 "const char *" << Target.getName() << ClassName << "::";
586 if (hasAltNames)
587 O << "\ngetRegisterName(unsigned RegNo, unsigned AltIdx) {\n";
588 else
589 O << "getRegisterName(unsigned RegNo) {\n";
590 O << " assert(RegNo && RegNo < " << (Registers.size()+1)
591 << " && \"Invalid register number!\");\n"
Chris Lattnera7e8ae42009-09-14 01:26:18 +0000592 << "\n";
Jim Grosbacha5497342010-09-29 22:32:50 +0000593
Owen Andersona84be6c2011-06-27 21:06:21 +0000594 if (hasAltNames) {
595 for (unsigned i = 0, e = AltNameIndices.size(); i < e; ++i)
596 emitRegisterNameString(O, AltNameIndices[i]->getName(), Registers);
597 } else
598 emitRegisterNameString(O, "", Registers);
Jim Grosbacha5497342010-09-29 22:32:50 +0000599
Owen Andersona84be6c2011-06-27 21:06:21 +0000600 if (hasAltNames) {
Craig Topperf8f0a232012-09-15 01:22:42 +0000601 O << " const uint32_t *RegAsmOffset;\n"
Owen Andersona84be6c2011-06-27 21:06:21 +0000602 << " const char *AsmStrs;\n"
603 << " switch(AltIdx) {\n"
Craig Topperc4965bc2012-02-05 07:21:30 +0000604 << " default: llvm_unreachable(\"Invalid register alt name index!\");\n";
Owen Andersona84be6c2011-06-27 21:06:21 +0000605 for (unsigned i = 0, e = AltNameIndices.size(); i < e; ++i) {
Tim Northover4e55afe2014-03-29 16:59:27 +0000606 std::string Namespace = AltNameIndices[1]->getValueAsString("Namespace");
607 std::string AltName(AltNameIndices[i]->getName());
Owen Andersona84be6c2011-06-27 21:06:21 +0000608 O << " case " << Namespace << "::" << AltName
609 << ":\n"
610 << " AsmStrs = AsmStrs" << AltName << ";\n"
611 << " RegAsmOffset = RegAsmOffset" << AltName << ";\n"
612 << " break;\n";
613 }
614 O << "}\n";
615 }
616
617 O << " assert (*(AsmStrs+RegAsmOffset[RegNo-1]) &&\n"
618 << " \"Invalid alt name index for register!\");\n"
619 << " return AsmStrs+RegAsmOffset[RegNo-1];\n"
Chris Lattner06c5eed2009-09-13 20:08:00 +0000620 << "}\n";
621}
622
Bill Wendling7e5771d2011-03-21 08:31:53 +0000623namespace {
Bill Wendling5d3174c2011-03-21 08:40:31 +0000624// IAPrinter - Holds information about an InstAlias. Two InstAliases match if
625// they both have the same conditionals. In which case, we cannot print out the
626// alias for that pattern.
627class IAPrinter {
Bill Wendling5d3174c2011-03-21 08:40:31 +0000628 std::vector<std::string> Conds;
629 std::map<StringRef, unsigned> OpMap;
630 std::string Result;
631 std::string AsmString;
Jim Grosbachdba3f5b2012-04-18 19:02:43 +0000632 SmallVector<Record*, 4> ReqFeatures;
Bill Wendling5d3174c2011-03-21 08:40:31 +0000633public:
Evan Cheng4d806e22011-07-06 02:02:33 +0000634 IAPrinter(std::string R, std::string AS)
635 : Result(R), AsmString(AS) {}
Bill Wendling5d3174c2011-03-21 08:40:31 +0000636
637 void addCond(const std::string &C) { Conds.push_back(C); }
Bill Wendling5d3174c2011-03-21 08:40:31 +0000638
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000639 void addOperand(StringRef Op, unsigned Idx) {
640 assert(Idx < 0xFF && "Index too large!");
641 OpMap[Op] = Idx;
642 }
Bill Wendling5d3174c2011-03-21 08:40:31 +0000643 unsigned getOpIndex(StringRef Op) { return OpMap[Op]; }
644 bool isOpMapped(StringRef Op) { return OpMap.find(Op) != OpMap.end(); }
645
Evan Cheng4d806e22011-07-06 02:02:33 +0000646 void print(raw_ostream &O) {
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000647 if (Conds.empty() && ReqFeatures.empty()) {
648 O.indent(6) << "return true;\n";
Evan Cheng4d806e22011-07-06 02:02:33 +0000649 return;
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000650 }
Bill Wendling7e570b52011-03-21 08:59:17 +0000651
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000652 O << "if (";
Bill Wendling5d3174c2011-03-21 08:40:31 +0000653
654 for (std::vector<std::string>::iterator
655 I = Conds.begin(), E = Conds.end(); I != E; ++I) {
656 if (I != Conds.begin()) {
657 O << " &&\n";
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000658 O.indent(8);
Bill Wendling5d3174c2011-03-21 08:40:31 +0000659 }
Bill Wendling7e570b52011-03-21 08:59:17 +0000660
Bill Wendling5d3174c2011-03-21 08:40:31 +0000661 O << *I;
662 }
663
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000664 O << ") {\n";
665 O.indent(6) << "// " << Result << "\n";
Bill Wendling5d3174c2011-03-21 08:40:31 +0000666
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000667 // Directly mangle mapped operands into the string. Each operand is
668 // identified by a '$' sign followed by a byte identifying the number of the
669 // operand. We add one to the index to avoid zero bytes.
670 std::pair<StringRef, StringRef> ASM = StringRef(AsmString).split(' ');
671 SmallString<128> OutString = ASM.first;
672 if (!ASM.second.empty()) {
673 raw_svector_ostream OS(OutString);
674 OS << ' ';
675 for (StringRef::iterator I = ASM.second.begin(), E = ASM.second.end();
676 I != E;) {
677 OS << *I;
678 if (*I == '$') {
679 StringRef::iterator Start = ++I;
680 while (I != E &&
681 ((*I >= 'a' && *I <= 'z') || (*I >= 'A' && *I <= 'Z') ||
682 (*I >= '0' && *I <= '9') || *I == '_'))
683 ++I;
684 StringRef Name(Start, I - Start);
685 assert(isOpMapped(Name) && "Unmapped operand!");
686 OS << format("\\x%02X", (unsigned char)getOpIndex(Name) + 1);
687 } else {
688 ++I;
689 }
690 }
691 }
692
693 // Emit the string.
694 O.indent(6) << "AsmString = \"" << OutString.str() << "\";\n";
Bill Wendling5d3174c2011-03-21 08:40:31 +0000695
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000696 O.indent(6) << "break;\n";
697 O.indent(4) << '}';
Bill Wendling5d3174c2011-03-21 08:40:31 +0000698 }
699
700 bool operator==(const IAPrinter &RHS) {
701 if (Conds.size() != RHS.Conds.size())
702 return false;
703
704 unsigned Idx = 0;
705 for (std::vector<std::string>::iterator
706 I = Conds.begin(), E = Conds.end(); I != E; ++I)
707 if (*I != RHS.Conds[Idx++])
708 return false;
709
710 return true;
711 }
712
713 bool operator()(const IAPrinter &RHS) {
714 if (Conds.size() < RHS.Conds.size())
715 return true;
716
717 unsigned Idx = 0;
718 for (std::vector<std::string>::iterator
719 I = Conds.begin(), E = Conds.end(); I != E; ++I)
720 if (*I != RHS.Conds[Idx++])
721 return *I < RHS.Conds[Idx++];
722
723 return false;
724 }
725};
726
Bill Wendling7e5771d2011-03-21 08:31:53 +0000727} // end anonymous namespace
728
Bill Wendlinge7124492011-06-14 03:17:20 +0000729static unsigned CountNumOperands(StringRef AsmString) {
730 unsigned NumOps = 0;
731 std::pair<StringRef, StringRef> ASM = AsmString.split(' ');
732
733 while (!ASM.second.empty()) {
734 ++NumOps;
735 ASM = ASM.second.split(' ');
736 }
737
738 return NumOps;
739}
740
Bill Wendling36c0c6d2011-06-15 04:31:19 +0000741static unsigned CountResultNumOperands(StringRef AsmString) {
742 unsigned NumOps = 0;
743 std::pair<StringRef, StringRef> ASM = AsmString.split('\t');
744
745 if (!ASM.second.empty()) {
746 size_t I = ASM.second.find('{');
747 StringRef Str = ASM.second;
748 if (I != StringRef::npos)
749 Str = ASM.second.substr(I, ASM.second.find('|', I));
750
751 ASM = Str.split(' ');
752
753 do {
754 ++NumOps;
755 ASM = ASM.second.split(' ');
756 } while (!ASM.second.empty());
757 }
758
759 return NumOps;
760}
Bill Wendlinge7124492011-06-14 03:17:20 +0000761
Bill Wendling7e5771d2011-03-21 08:31:53 +0000762void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) {
Bill Wendling7e5771d2011-03-21 08:31:53 +0000763 Record *AsmWriter = Target.getAsmWriter();
764
765 O << "\n#ifdef PRINT_ALIAS_INSTR\n";
766 O << "#undef PRINT_ALIAS_INSTR\n\n";
767
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000768 // Emit the method that prints the alias instruction.
769 std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName");
770
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000771 std::vector<Record*> AllInstAliases =
772 Records.getAllDerivedDefinitions("InstAlias");
773
774 // Create a map from the qualified name to a list of potential matches.
Jim Grosbachefe653f2012-04-18 20:24:49 +0000775 std::map<std::string, std::vector<CodeGenInstAlias*> > AliasMap;
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000776 for (std::vector<Record*>::iterator
777 I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) {
778 CodeGenInstAlias *Alias = new CodeGenInstAlias(*I, Target);
779 const Record *R = *I;
Bill Wendling6dd69d92011-04-13 23:36:21 +0000780 if (!R->getValueAsBit("EmitAlias"))
781 continue; // We were told not to emit the alias, but to emit the aliasee.
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000782 const DagInit *DI = R->getValueAsDag("ResultInst");
Sean Silva88eb8dd2012-10-10 20:24:47 +0000783 const DefInit *Op = cast<DefInit>(DI->getOperator());
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000784 AliasMap[getQualifiedName(Op->getDef())].push_back(Alias);
785 }
786
Bill Wendling7e570b52011-03-21 08:59:17 +0000787 // A map of which conditions need to be met for each instruction operand
788 // before it can be matched to the mnemonic.
Jim Grosbachefe653f2012-04-18 20:24:49 +0000789 std::map<std::string, std::vector<IAPrinter*> > IAPrinterMap;
Bill Wendling7e570b52011-03-21 08:59:17 +0000790
Jim Grosbachefe653f2012-04-18 20:24:49 +0000791 for (std::map<std::string, std::vector<CodeGenInstAlias*> >::iterator
Bill Wendling7e570b52011-03-21 08:59:17 +0000792 I = AliasMap.begin(), E = AliasMap.end(); I != E; ++I) {
793 std::vector<CodeGenInstAlias*> &Aliases = I->second;
794
795 for (std::vector<CodeGenInstAlias*>::iterator
796 II = Aliases.begin(), IE = Aliases.end(); II != IE; ++II) {
797 const CodeGenInstAlias *CGA = *II;
Bill Wendlinge7124492011-06-14 03:17:20 +0000798 unsigned LastOpNo = CGA->ResultInstOperandIndex.size();
Bill Wendling36c0c6d2011-06-15 04:31:19 +0000799 unsigned NumResultOps =
800 CountResultNumOperands(CGA->ResultInst->AsmString);
Bill Wendlinge7124492011-06-14 03:17:20 +0000801
802 // Don't emit the alias if it has more operands than what it's aliasing.
Bill Wendling36c0c6d2011-06-15 04:31:19 +0000803 if (NumResultOps < CountNumOperands(CGA->AsmString))
Bill Wendlinge7124492011-06-14 03:17:20 +0000804 continue;
805
Evan Cheng4d806e22011-07-06 02:02:33 +0000806 IAPrinter *IAP = new IAPrinter(CGA->Result->getAsString(),
Bill Wendling7e570b52011-03-21 08:59:17 +0000807 CGA->AsmString);
Bill Wendling7e570b52011-03-21 08:59:17 +0000808
Bill Wendling7e570b52011-03-21 08:59:17 +0000809 std::string Cond;
810 Cond = std::string("MI->getNumOperands() == ") + llvm::utostr(LastOpNo);
811 IAP->addCond(Cond);
812
Bill Wendling7e570b52011-03-21 08:59:17 +0000813 bool CantHandle = false;
814
815 for (unsigned i = 0, e = LastOpNo; i != e; ++i) {
816 const CodeGenInstAlias::ResultOperand &RO = CGA->ResultOperands[i];
817
818 switch (RO.Kind) {
Bill Wendling7e570b52011-03-21 08:59:17 +0000819 case CodeGenInstAlias::ResultOperand::K_Record: {
820 const Record *Rec = RO.getRecord();
821 StringRef ROName = RO.getName();
822
Owen Andersona84be6c2011-06-27 21:06:21 +0000823
824 if (Rec->isSubClassOf("RegisterOperand"))
825 Rec = Rec->getValueAsDef("RegClass");
Bill Wendling7e570b52011-03-21 08:59:17 +0000826 if (Rec->isSubClassOf("RegisterClass")) {
827 Cond = std::string("MI->getOperand(")+llvm::utostr(i)+").isReg()";
828 IAP->addCond(Cond);
829
830 if (!IAP->isOpMapped(ROName)) {
831 IAP->addOperand(ROName, i);
Jack Carter9c1a0272013-02-05 08:32:10 +0000832 Record *R = CGA->ResultOperands[i].getRecord();
833 if (R->isSubClassOf("RegisterOperand"))
834 R = R->getValueAsDef("RegClass");
Benjamin Kramer682de392012-03-30 23:13:40 +0000835 Cond = std::string("MRI.getRegClass(") + Target.getName() + "::" +
Jack Carter9c1a0272013-02-05 08:32:10 +0000836 R->getName() + "RegClassID)"
Benjamin Kramer682de392012-03-30 23:13:40 +0000837 ".contains(MI->getOperand(" + llvm::utostr(i) + ").getReg())";
Bill Wendling7e570b52011-03-21 08:59:17 +0000838 IAP->addCond(Cond);
839 } else {
840 Cond = std::string("MI->getOperand(") +
841 llvm::utostr(i) + ").getReg() == MI->getOperand(" +
842 llvm::utostr(IAP->getOpIndex(ROName)) + ").getReg()";
843 IAP->addCond(Cond);
844 }
845 } else {
846 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
Bill Wendlinge7124492011-06-14 03:17:20 +0000847 // FIXME: We may need to handle these situations.
Bill Wendling7e570b52011-03-21 08:59:17 +0000848 delete IAP;
849 IAP = 0;
850 CantHandle = true;
851 break;
852 }
853
854 break;
855 }
Tim Northoverab7689e2013-01-09 13:32:04 +0000856 case CodeGenInstAlias::ResultOperand::K_Imm: {
857 std::string Op = "MI->getOperand(" + llvm::utostr(i) + ")";
858
859 // Just because the alias has an immediate result, doesn't mean the
860 // MCInst will. An MCExpr could be present, for example.
861 IAP->addCond(Op + ".isImm()");
862
863 Cond = Op + ".getImm() == "
864 + llvm::utostr(CGA->ResultOperands[i].getImm());
Bill Wendling7e570b52011-03-21 08:59:17 +0000865 IAP->addCond(Cond);
866 break;
Tim Northoverab7689e2013-01-09 13:32:04 +0000867 }
Bill Wendling7e570b52011-03-21 08:59:17 +0000868 case CodeGenInstAlias::ResultOperand::K_Reg:
Jim Grosbach29cdcda2011-11-15 01:46:57 +0000869 // If this is zero_reg, something's playing tricks we're not
870 // equipped to handle.
871 if (!CGA->ResultOperands[i].getRegister()) {
872 CantHandle = true;
873 break;
874 }
875
Bill Wendling7e570b52011-03-21 08:59:17 +0000876 Cond = std::string("MI->getOperand(") +
877 llvm::utostr(i) + ").getReg() == " + Target.getName() +
878 "::" + CGA->ResultOperands[i].getRegister()->getName();
879 IAP->addCond(Cond);
880 break;
881 }
882
883 if (!IAP) break;
884 }
885
886 if (CantHandle) continue;
Jim Grosbachefe653f2012-04-18 20:24:49 +0000887 IAPrinterMap[I->first].push_back(IAP);
Bill Wendling7e570b52011-03-21 08:59:17 +0000888 }
889 }
890
Bill Wendlingf5199de2011-05-23 00:18:33 +0000891 std::string Header;
892 raw_string_ostream HeaderO(Header);
893
894 HeaderO << "bool " << Target.getName() << ClassName
Bill Wendlinge7124492011-06-14 03:17:20 +0000895 << "::printAliasInstr(const MCInst"
Bill Wendlingf5199de2011-05-23 00:18:33 +0000896 << " *MI, raw_ostream &OS) {\n";
Bill Wendling7e570b52011-03-21 08:59:17 +0000897
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000898 std::string Cases;
899 raw_string_ostream CasesO(Cases);
900
Jim Grosbachefe653f2012-04-18 20:24:49 +0000901 for (std::map<std::string, std::vector<IAPrinter*> >::iterator
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000902 I = IAPrinterMap.begin(), E = IAPrinterMap.end(); I != E; ++I) {
903 std::vector<IAPrinter*> &IAPs = I->second;
904 std::vector<IAPrinter*> UniqueIAPs;
905
906 for (std::vector<IAPrinter*>::iterator
907 II = IAPs.begin(), IE = IAPs.end(); II != IE; ++II) {
908 IAPrinter *LHS = *II;
909 bool IsDup = false;
910 for (std::vector<IAPrinter*>::iterator
911 III = IAPs.begin(), IIE = IAPs.end(); III != IIE; ++III) {
912 IAPrinter *RHS = *III;
913 if (LHS != RHS && *LHS == *RHS) {
914 IsDup = true;
915 break;
916 }
917 }
918
919 if (!IsDup) UniqueIAPs.push_back(LHS);
920 }
921
922 if (UniqueIAPs.empty()) continue;
923
Jim Grosbachefe653f2012-04-18 20:24:49 +0000924 CasesO.indent(2) << "case " << I->first << ":\n";
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000925
926 for (std::vector<IAPrinter*>::iterator
927 II = UniqueIAPs.begin(), IE = UniqueIAPs.end(); II != IE; ++II) {
928 IAPrinter *IAP = *II;
929 CasesO.indent(4);
Evan Cheng4d806e22011-07-06 02:02:33 +0000930 IAP->print(CasesO);
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000931 CasesO << '\n';
932 }
933
Eric Christopher2e3fbaa2011-04-18 21:28:11 +0000934 CasesO.indent(4) << "return false;\n";
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000935 }
936
Bill Wendlinge7124492011-06-14 03:17:20 +0000937 if (CasesO.str().empty()) {
Bill Wendlingf5199de2011-05-23 00:18:33 +0000938 O << HeaderO.str();
Eric Christopher2e3fbaa2011-04-18 21:28:11 +0000939 O << " return false;\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000940 O << "}\n\n";
941 O << "#endif // PRINT_ALIAS_INSTR\n";
942 return;
943 }
944
Bill Wendlingf5199de2011-05-23 00:18:33 +0000945 O << HeaderO.str();
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000946 O.indent(2) << "const char *AsmString;\n";
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000947 O.indent(2) << "switch (MI->getOpcode()) {\n";
Eric Christopher2e3fbaa2011-04-18 21:28:11 +0000948 O.indent(2) << "default: return false;\n";
Bill Wendlingbc3f7902011-04-07 21:20:06 +0000949 O << CasesO.str();
950 O.indent(2) << "}\n\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000951
952 // Code that prints the alias, replacing the operands with the ones from the
953 // MCInst.
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000954 O << " unsigned I = 0;\n";
955 O << " while (AsmString[I] != ' ' && AsmString[I] != '\\0')\n";
956 O << " ++I;\n";
957 O << " OS << '\\t' << StringRef(AsmString, I);\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000958
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000959 O << " if (AsmString[I] != '\\0') {\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000960 O << " OS << '\\t';\n";
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000961 O << " do {\n";
962 O << " if (AsmString[I] == '$') {\n";
963 O << " ++I;\n";
964 O << " printOperand(MI, unsigned(AsmString[I++]) - 1, OS);\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000965 O << " } else {\n";
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000966 O << " OS << AsmString[I++];\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000967 O << " }\n";
Benjamin Kramer17c17bc2013-09-11 15:42:16 +0000968 O << " } while (AsmString[I] != '\\0');\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000969 O << " }\n\n";
Jim Grosbachf4e67082012-04-18 18:56:33 +0000970
Eric Christopher2e3fbaa2011-04-18 21:28:11 +0000971 O << " return true;\n";
Bill Wendling31ca7ef2011-02-26 03:09:12 +0000972 O << "}\n\n";
973
974 O << "#endif // PRINT_ALIAS_INSTR\n";
975}
Chris Lattner06c5eed2009-09-13 20:08:00 +0000976
Ahmed Bougachabd214002013-10-28 18:07:17 +0000977AsmWriterEmitter::AsmWriterEmitter(RecordKeeper &R) : Records(R), Target(R) {
978 Record *AsmWriter = Target.getAsmWriter();
979 for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
980 E = Target.inst_end();
981 I != E; ++I)
982 if (!(*I)->AsmString.empty() && (*I)->TheDef->getName() != "PHI")
983 Instructions.push_back(
984 AsmWriterInst(**I, AsmWriter->getValueAsInt("Variant"),
Ahmed Bougachabd214002013-10-28 18:07:17 +0000985 AsmWriter->getValueAsInt("OperandSpacing")));
986
987 // Get the instruction numbering.
Craig Topper4c6129a2014-02-05 07:56:49 +0000988 NumberedInstructions = &Target.getInstructionsByEnumValue();
Ahmed Bougachabd214002013-10-28 18:07:17 +0000989
990 // Compute the CodeGenInstruction -> AsmWriterInst mapping. Note that not
991 // all machine instructions are necessarily being printed, so there may be
992 // target instructions not in this map.
993 for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
994 CGIAWIMap.insert(std::make_pair(Instructions[i].CGI, &Instructions[i]));
995}
996
Chris Lattner06c5eed2009-09-13 20:08:00 +0000997void AsmWriterEmitter::run(raw_ostream &O) {
Chris Lattner06c5eed2009-09-13 20:08:00 +0000998 EmitPrintInstruction(O);
999 EmitGetRegisterName(O);
Bill Wendling31ca7ef2011-02-26 03:09:12 +00001000 EmitPrintAliasInstruction(O);
Chris Lattner06c5eed2009-09-13 20:08:00 +00001001}
1002
Jakob Stoklund Olesene6aed132012-06-11 15:37:55 +00001003
1004namespace llvm {
1005
1006void EmitAsmWriter(RecordKeeper &RK, raw_ostream &OS) {
1007 emitSourceFileHeader("Assembly Writer Source Fragment", OS);
1008 AsmWriterEmitter(RK).run(OS);
1009}
1010
1011} // End llvm namespace