Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-AARCH64 |
| 2 | ; RUN: llc -mtriple=arm64-none-linux-gnu < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM64 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 3 | |
| 4 | ; First, a simple example from Clang. The registers could plausibly be |
| 5 | ; different, but probably won't be. |
| 6 | |
| 7 | %struct.foo = type { i8, [2 x i8], i8 } |
| 8 | |
| 9 | define [1 x i64] @from_clang([1 x i64] %f.coerce, i32 %n) nounwind readnone { |
Stephen Lin | d24ab20 | 2013-07-14 06:24:09 +0000 | [diff] [blame] | 10 | ; CHECK-LABEL: from_clang: |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 11 | ; CHECK-AARCH64: bfi w0, w1, #3, #4 |
| 12 | ; CHECK-ARCH64-NEXT: ret |
| 13 | |
| 14 | ; CHECK-ARM64: bfm {{w[0-9]+}}, {{w[0-9]+}}, #29, #3 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 15 | |
| 16 | entry: |
| 17 | %f.coerce.fca.0.extract = extractvalue [1 x i64] %f.coerce, 0 |
| 18 | %tmp.sroa.0.0.extract.trunc = trunc i64 %f.coerce.fca.0.extract to i32 |
| 19 | %bf.value = shl i32 %n, 3 |
| 20 | %0 = and i32 %bf.value, 120 |
| 21 | %f.sroa.0.0.insert.ext.masked = and i32 %tmp.sroa.0.0.extract.trunc, 135 |
| 22 | %1 = or i32 %f.sroa.0.0.insert.ext.masked, %0 |
| 23 | %f.sroa.0.0.extract.trunc = zext i32 %1 to i64 |
| 24 | %tmp1.sroa.1.1.insert.insert = and i64 %f.coerce.fca.0.extract, 4294967040 |
| 25 | %tmp1.sroa.0.0.insert.insert = or i64 %f.sroa.0.0.extract.trunc, %tmp1.sroa.1.1.insert.insert |
| 26 | %.fca.0.insert = insertvalue [1 x i64] undef, i64 %tmp1.sroa.0.0.insert.insert, 0 |
| 27 | ret [1 x i64] %.fca.0.insert |
| 28 | } |
| 29 | |
| 30 | define void @test_whole32(i32* %existing, i32* %new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 31 | ; CHECK-LABEL: test_whole32: |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 32 | |
| 33 | ; CHECK-AARCH64: bfi {{w[0-9]+}}, {{w[0-9]+}}, #26, #5 |
| 34 | ; CHECK-ARM64: bfm {{w[0-9]+}}, {{w[0-9]+}}, #6, #4 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 35 | |
| 36 | %oldval = load volatile i32* %existing |
| 37 | %oldval_keep = and i32 %oldval, 2214592511 ; =0x83ffffff |
| 38 | |
| 39 | %newval = load volatile i32* %new |
| 40 | %newval_shifted = shl i32 %newval, 26 |
| 41 | %newval_masked = and i32 %newval_shifted, 2080374784 ; = 0x7c000000 |
| 42 | |
| 43 | %combined = or i32 %oldval_keep, %newval_masked |
| 44 | store volatile i32 %combined, i32* %existing |
| 45 | |
| 46 | ret void |
| 47 | } |
| 48 | |
| 49 | define void @test_whole64(i64* %existing, i64* %new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 50 | ; CHECK-LABEL: test_whole64: |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 51 | ; CHECK-AARCH64: bfi {{x[0-9]+}}, {{x[0-9]+}}, #26, #14 |
| 52 | ; CHECK-ARM64: bfm {{x[0-9]+}}, {{x[0-9]+}}, #38, #13 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 53 | ; CHECK-NOT: and |
| 54 | ; CHECK: ret |
| 55 | |
| 56 | %oldval = load volatile i64* %existing |
| 57 | %oldval_keep = and i64 %oldval, 18446742974265032703 ; = 0xffffff0003ffffffL |
| 58 | |
| 59 | %newval = load volatile i64* %new |
| 60 | %newval_shifted = shl i64 %newval, 26 |
| 61 | %newval_masked = and i64 %newval_shifted, 1099444518912 ; = 0xfffc000000 |
| 62 | |
| 63 | %combined = or i64 %oldval_keep, %newval_masked |
| 64 | store volatile i64 %combined, i64* %existing |
| 65 | |
| 66 | ret void |
| 67 | } |
| 68 | |
| 69 | define void @test_whole32_from64(i64* %existing, i64* %new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 70 | ; CHECK-LABEL: test_whole32_from64: |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 71 | |
| 72 | ; CHECK-AARCH64: bfi {{w[0-9]+}}, {{w[0-9]+}}, #{{0|16}}, #16 |
| 73 | ; CHECK-AARCH64-NOT: and |
| 74 | ; CHECK-ARM64: bfm {{x[0-9]+}}, {{x[0-9]+}}, #0, #15 |
| 75 | |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 76 | ; CHECK: ret |
| 77 | |
| 78 | %oldval = load volatile i64* %existing |
| 79 | %oldval_keep = and i64 %oldval, 4294901760 ; = 0xffff0000 |
| 80 | |
| 81 | %newval = load volatile i64* %new |
| 82 | %newval_masked = and i64 %newval, 65535 ; = 0xffff |
| 83 | |
| 84 | %combined = or i64 %oldval_keep, %newval_masked |
| 85 | store volatile i64 %combined, i64* %existing |
| 86 | |
| 87 | ret void |
| 88 | } |
| 89 | |
| 90 | define void @test_32bit_masked(i32 *%existing, i32 *%new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 91 | ; CHECK-LABEL: test_32bit_masked: |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 92 | |
| 93 | ; CHECK-AARCH64: bfi [[INSERT:w[0-9]+]], {{w[0-9]+}}, #3, #4 |
| 94 | ; CHECK-AARCH64: and {{w[0-9]+}}, [[INSERT]], #0xff |
| 95 | |
| 96 | ; CHECK-ARM64: and |
| 97 | ; CHECK-ARM64: bfm {{w[0-9]+}}, {{w[0-9]+}}, #29, #3 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 98 | |
| 99 | %oldval = load volatile i32* %existing |
| 100 | %oldval_keep = and i32 %oldval, 135 ; = 0x87 |
| 101 | |
| 102 | %newval = load volatile i32* %new |
| 103 | %newval_shifted = shl i32 %newval, 3 |
| 104 | %newval_masked = and i32 %newval_shifted, 120 ; = 0x78 |
| 105 | |
| 106 | %combined = or i32 %oldval_keep, %newval_masked |
| 107 | store volatile i32 %combined, i32* %existing |
| 108 | |
| 109 | ret void |
| 110 | } |
| 111 | |
| 112 | define void @test_64bit_masked(i64 *%existing, i64 *%new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 113 | ; CHECK-LABEL: test_64bit_masked: |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 114 | ; CHECK-AARCH64: bfi [[INSERT:x[0-9]+]], {{x[0-9]+}}, #40, #8 |
| 115 | ; CHECK-AARCH64: and {{x[0-9]+}}, [[INSERT]], #0xffff00000000 |
| 116 | |
| 117 | ; CHECK-ARM64: and |
| 118 | ; CHECK-ARM64: bfm {{x[0-9]+}}, {{x[0-9]+}}, #24, #7 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 119 | |
| 120 | %oldval = load volatile i64* %existing |
| 121 | %oldval_keep = and i64 %oldval, 1095216660480 ; = 0xff_0000_0000 |
| 122 | |
| 123 | %newval = load volatile i64* %new |
| 124 | %newval_shifted = shl i64 %newval, 40 |
| 125 | %newval_masked = and i64 %newval_shifted, 280375465082880 ; = 0xff00_0000_0000 |
| 126 | |
| 127 | %combined = or i64 %newval_masked, %oldval_keep |
| 128 | store volatile i64 %combined, i64* %existing |
| 129 | |
| 130 | ret void |
| 131 | } |
| 132 | |
| 133 | ; Mask is too complicated for literal ANDwwi, make sure other avenues are tried. |
| 134 | define void @test_32bit_complexmask(i32 *%existing, i32 *%new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 135 | ; CHECK-LABEL: test_32bit_complexmask: |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 136 | |
| 137 | ; CHECK-AARCH64: bfi {{w[0-9]+}}, {{w[0-9]+}}, #3, #4 |
| 138 | ; CHECK-AARCH64: and {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}} |
| 139 | |
| 140 | ; CHECK-ARM64: and |
| 141 | ; CHECK-ARM64: bfm {{w[0-9]+}}, {{w[0-9]+}}, #29, #3 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 142 | |
| 143 | %oldval = load volatile i32* %existing |
| 144 | %oldval_keep = and i32 %oldval, 647 ; = 0x287 |
| 145 | |
| 146 | %newval = load volatile i32* %new |
| 147 | %newval_shifted = shl i32 %newval, 3 |
| 148 | %newval_masked = and i32 %newval_shifted, 120 ; = 0x278 |
| 149 | |
| 150 | %combined = or i32 %oldval_keep, %newval_masked |
| 151 | store volatile i32 %combined, i32* %existing |
| 152 | |
| 153 | ret void |
| 154 | } |
| 155 | |
| 156 | ; Neither mask is is a contiguous set of 1s. BFI can't be used |
| 157 | define void @test_32bit_badmask(i32 *%existing, i32 *%new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 158 | ; CHECK-LABEL: test_32bit_badmask: |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 159 | ; CHECK-NOT: bfi |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 160 | ; CHECK-NOT: bfm |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 161 | ; CHECK: ret |
| 162 | |
| 163 | %oldval = load volatile i32* %existing |
| 164 | %oldval_keep = and i32 %oldval, 135 ; = 0x87 |
| 165 | |
| 166 | %newval = load volatile i32* %new |
| 167 | %newval_shifted = shl i32 %newval, 3 |
| 168 | %newval_masked = and i32 %newval_shifted, 632 ; = 0x278 |
| 169 | |
| 170 | %combined = or i32 %oldval_keep, %newval_masked |
| 171 | store volatile i32 %combined, i32* %existing |
| 172 | |
| 173 | ret void |
| 174 | } |
| 175 | |
| 176 | ; Ditto |
| 177 | define void @test_64bit_badmask(i64 *%existing, i64 *%new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 178 | ; CHECK-LABEL: test_64bit_badmask: |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 179 | ; CHECK-NOT: bfi |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 180 | ; CHECK-NOT: bfm |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 181 | ; CHECK: ret |
| 182 | |
| 183 | %oldval = load volatile i64* %existing |
| 184 | %oldval_keep = and i64 %oldval, 135 ; = 0x87 |
| 185 | |
| 186 | %newval = load volatile i64* %new |
| 187 | %newval_shifted = shl i64 %newval, 3 |
| 188 | %newval_masked = and i64 %newval_shifted, 664 ; = 0x278 |
| 189 | |
| 190 | %combined = or i64 %oldval_keep, %newval_masked |
| 191 | store volatile i64 %combined, i64* %existing |
| 192 | |
| 193 | ret void |
| 194 | } |
| 195 | |
| 196 | ; Bitfield insert where there's a left-over shr needed at the beginning |
| 197 | ; (e.g. result of str.bf1 = str.bf2) |
| 198 | define void @test_32bit_with_shr(i32* %existing, i32* %new) { |
Stephen Lin | f799e3f | 2013-07-13 20:38:47 +0000 | [diff] [blame] | 199 | ; CHECK-LABEL: test_32bit_with_shr: |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 200 | |
| 201 | %oldval = load volatile i32* %existing |
| 202 | %oldval_keep = and i32 %oldval, 2214592511 ; =0x83ffffff |
| 203 | |
| 204 | %newval = load i32* %new |
| 205 | %newval_shifted = shl i32 %newval, 12 |
| 206 | %newval_masked = and i32 %newval_shifted, 2080374784 ; = 0x7c000000 |
| 207 | |
| 208 | %combined = or i32 %oldval_keep, %newval_masked |
| 209 | store volatile i32 %combined, i32* %existing |
| 210 | ; CHECK: lsr [[BIT:w[0-9]+]], {{w[0-9]+}}, #14 |
Tim Northover | eb6611e | 2014-04-24 12:11:53 +0000 | [diff] [blame] | 211 | ; CHECK-AARCH64: bfi {{w[0-9]+}}, [[BIT]], #26, #5 |
| 212 | ; CHECK-ARM64: bfm {{w[0-9]+}}, [[BIT]], #6, #4 |
Tim Northover | e0e3aef | 2013-01-31 12:12:40 +0000 | [diff] [blame] | 213 | |
| 214 | ret void |
| 215 | } |