| Ulrich Weigand | 640192d | 2013-05-03 19:49:39 +0000 | [diff] [blame] | 1 | |
| 2 | # RUN: not llvm-mc -triple powerpc64-unknown-unknown < %s 2> %t |
| 3 | # RUN: FileCheck < %t %s |
| 4 | |
| 5 | # Register operands |
| 6 | |
| 7 | # CHECK: error: invalid operand for instruction |
| 8 | # CHECK-NEXT: add 32, 32, 32 |
| 9 | add 32, 32, 32 |
| 10 | |
| 11 | # CHECK: error: invalid register name |
| 12 | # CHECK-NEXT: add %r32, %r32, %r32 |
| 13 | add %r32, %r32, %r32 |
| 14 | |
| 15 | # Signed 16-bit immediate operands |
| 16 | |
| 17 | # CHECK: error: invalid operand for instruction |
| 18 | # CHECK-NEXT: addi 1, 0, -32769 |
| 19 | addi 1, 0, -32769 |
| 20 | |
| 21 | # CHECK: error: invalid operand for instruction |
| 22 | # CHECK-NEXT: addi 1, 0, 32768 |
| 23 | addi 1, 0, 32768 |
| 24 | |
| 25 | # Unsigned 16-bit immediate operands |
| 26 | |
| 27 | # CHECK: error: invalid operand for instruction |
| 28 | # CHECK-NEXT: ori 1, 2, -1 |
| 29 | ori 1, 2, -1 |
| 30 | |
| 31 | # CHECK: error: invalid operand for instruction |
| 32 | # CHECK-NEXT: ori 1, 2, 65536 |
| 33 | ori 1, 2, 65536 |
| 34 | |
| Ulrich Weigand | 5a02a02 | 2013-06-26 13:49:53 +0000 | [diff] [blame^] | 35 | # Signed 16-bit immediate operands (extended range for addis) |
| 36 | |
| 37 | # CHECK: error: invalid operand for instruction |
| 38 | addis 1, 0, -65537 |
| 39 | |
| 40 | # CHECK: error: invalid operand for instruction |
| 41 | addis 1, 0, 65536 |
| 42 | |
| Ulrich Weigand | 640192d | 2013-05-03 19:49:39 +0000 | [diff] [blame] | 43 | # D-Form memory operands |
| 44 | |
| 45 | # CHECK: error: invalid register number |
| 46 | # CHECK-NEXT: lwz 1, 0(32) |
| 47 | lwz 1, 0(32) |
| 48 | |
| 49 | # CHECK: error: invalid register name |
| 50 | # CHECK-NEXT: lwz 1, 0(%r32) |
| 51 | lwz 1, 0(%r32) |
| 52 | |
| 53 | # CHECK: error: invalid operand for instruction |
| 54 | # CHECK-NEXT: lwz 1, -32769(2) |
| 55 | lwz 1, -32769(2) |
| 56 | |
| 57 | # CHECK: error: invalid operand for instruction |
| 58 | # CHECK-NEXT: lwz 1, 32768(2) |
| 59 | lwz 1, 32768(2) |
| 60 | |
| 61 | # CHECK: error: invalid register number |
| 62 | # CHECK-NEXT: ld 1, 0(32) |
| 63 | ld 1, 0(32) |
| 64 | |
| 65 | # CHECK: error: invalid register name |
| 66 | # CHECK-NEXT: ld 1, 0(%r32) |
| 67 | ld 1, 0(%r32) |
| 68 | |
| 69 | # CHECK: error: invalid operand for instruction |
| 70 | # CHECK-NEXT: ld 1, 1(2) |
| 71 | ld 1, 1(2) |
| 72 | |
| 73 | # CHECK: error: invalid operand for instruction |
| 74 | # CHECK-NEXT: ld 1, 2(2) |
| 75 | ld 1, 2(2) |
| 76 | |
| 77 | # CHECK: error: invalid operand for instruction |
| 78 | # CHECK-NEXT: ld 1, 3(2) |
| 79 | ld 1, 3(2) |
| 80 | |
| 81 | # CHECK: error: invalid operand for instruction |
| 82 | # CHECK-NEXT: ld 1, -32772(2) |
| 83 | ld 1, -32772(2) |
| 84 | |
| 85 | # CHECK: error: invalid operand for instruction |
| 86 | # CHECK-NEXT: ld 1, 32768(2) |
| 87 | ld 1, 32768(2) |
| 88 | |