blob: f16fb798286782699422630e28b3794cc6aa1e29 [file] [log] [blame]
Jia Liu9f610112012-02-17 08:55:11 +00001//===-- MipsSubtarget.cpp - Mips Subtarget Information --------------------===//
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +00002//
3// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +00007//
Akira Hatanakae2489122011-04-15 21:51:11 +00008//===----------------------------------------------------------------------===//
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +00009//
Evan Cheng0d639a22011-07-01 21:01:15 +000010// This file implements the Mips specific subclass of TargetSubtargetInfo.
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +000011//
Akira Hatanakae2489122011-04-15 21:51:11 +000012//===----------------------------------------------------------------------===//
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +000013
Reed Kotler1595f362013-04-09 19:46:01 +000014#define DEBUG_TYPE "mips-subtarget"
15
16#include "MipsMachineFunction.h"
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +000017#include "Mips.h"
Akira Hatanaka047473e2012-03-28 00:24:17 +000018#include "MipsRegisterInfo.h"
Chandler Carruth8a8cd2b2014-01-07 11:48:04 +000019#include "MipsSubtarget.h"
20#include "MipsTargetMachine.h"
Reed Kotler1595f362013-04-09 19:46:01 +000021#include "llvm/IR/Attributes.h"
22#include "llvm/IR/Function.h"
23#include "llvm/Support/CommandLine.h"
24#include "llvm/Support/Debug.h"
Evan Cheng2bb40352011-08-24 18:08:43 +000025#include "llvm/Support/TargetRegistry.h"
Reed Kotler1595f362013-04-09 19:46:01 +000026#include "llvm/Support/raw_ostream.h"
Evan Cheng54b68e32011-07-01 20:45:01 +000027
Evan Cheng54b68e32011-07-01 20:45:01 +000028#define GET_SUBTARGETINFO_TARGET_DESC
Evan Cheng4d1ca962011-07-08 01:53:10 +000029#define GET_SUBTARGETINFO_CTOR
Evan Chengc9c090d2011-07-01 22:36:09 +000030#include "MipsGenSubtargetInfo.inc"
Evan Cheng54b68e32011-07-01 20:45:01 +000031
Reed Kotler1595f362013-04-09 19:46:01 +000032
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +000033using namespace llvm;
34
Reed Kotler1595f362013-04-09 19:46:01 +000035// FIXME: Maybe this should be on by default when Mips16 is specified
36//
37static cl::opt<bool> Mixed16_32(
38 "mips-mixed-16-32",
39 cl::init(false),
40 cl::desc("Allow for a mixture of Mips16 "
41 "and Mips32 code in a single source file"),
42 cl::Hidden);
43
Reed Kotlerfe94cc32013-04-10 16:58:04 +000044static cl::opt<bool> Mips_Os16(
45 "mips-os16",
46 cl::init(false),
47 cl::desc("Compile all functions that don' use "
48 "floating point as Mips 16"),
49 cl::Hidden);
50
Reed Kotler783c7942013-05-10 22:25:39 +000051static cl::opt<bool>
52Mips16HardFloat("mips16-hard-float", cl::NotHidden,
53 cl::desc("MIPS: mips16 hard float enable."),
54 cl::init(false));
55
Reed Kotler91ae9822013-10-27 21:57:36 +000056static cl::opt<bool>
57Mips16ConstantIslands(
Reed Kotler0d409e22013-11-28 00:56:37 +000058 "mips16-constant-islands", cl::NotHidden,
59 cl::desc("MIPS: mips16 constant islands enable."),
60 cl::init(true));
Reed Kotler91ae9822013-10-27 21:57:36 +000061
Daniel Sanderse70897f2014-02-20 13:13:33 +000062/// Select the Mips CPU for the given triple and cpu name.
63/// FIXME: Merge with the copy in MipsMCTargetDesc.cpp
64static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
65 if (CPU.empty()) {
66 Triple TheTriple(TT);
67 if (TheTriple.getArch() == Triple::mips ||
68 TheTriple.getArch() == Triple::mipsel)
69 CPU = "mips32";
70 else
71 CPU = "mips64";
72 }
73 return CPU;
74}
75
David Blaikiea379b1812011-12-20 02:50:00 +000076void MipsSubtarget::anchor() { }
77
Evan Chengfe6e4052011-06-30 01:53:36 +000078MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
Akira Hatanakaad495022012-08-22 03:18:13 +000079 const std::string &FS, bool little,
Reed Kotler1595f362013-04-09 19:46:01 +000080 Reloc::Model _RM, MipsTargetMachine *_TM) :
Evan Cheng1a72add62011-07-07 07:07:08 +000081 MipsGenSubtargetInfo(TT, CPU, FS),
Jia Liuf54f60f2012-02-28 07:46:26 +000082 MipsArchVersion(Mips32), MipsABI(UnknownABI), IsLittle(little),
Akira Hatanaka1b185f42011-09-21 17:31:45 +000083 IsSingleFloat(false), IsFP64bit(false), IsGP64bit(false), HasVFPU(false),
Akira Hatanakac5dc0552012-12-07 03:04:05 +000084 IsLinux(true), HasSEInReg(false), HasCondMov(false), HasSwap(false),
85 HasBitCount(false), HasFPIdx(false),
Reed Kotler783c7942013-05-10 22:25:39 +000086 InMips16Mode(false), InMips16HardFloat(Mips16HardFloat),
87 InMicroMipsMode(false), HasDSP(false), HasDSPR2(false),
Jack Carter3a2c2d42013-08-13 20:54:07 +000088 AllowMixed16_32(Mixed16_32 | Mips_Os16), Os16(Mips_Os16), HasMSA(false),
Petar Jovanovic97250162014-02-05 17:19:30 +000089 RM(_RM), OverrideMode(NoOverride), TM(_TM), TargetTriple(TT)
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +000090{
Evan Chengfe6e4052011-06-30 01:53:36 +000091 std::string CPUName = CPU;
Daniel Sanderse70897f2014-02-20 13:13:33 +000092 CPUName = selectMipsCPU(TT, CPUName);
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +000093
94 // Parse features string.
Evan Cheng1a72add62011-07-07 07:07:08 +000095 ParseSubtargetFeatures(CPUName, FS);
Bruno Cardoso Lopes80ab8f92008-07-14 14:42:54 +000096
Simon Atanasyan1093afe22013-11-19 12:20:17 +000097 if (InMips16Mode && !TM->Options.UseSoftFloat) {
98 // Hard float for mips16 means essentially to compile as soft float
99 // but to use a runtime library for soft float that is written with
100 // native mips32 floating point instructions (those runtime routines
101 // run in mips32 hard float mode).
102 TM->Options.UseSoftFloat = true;
103 TM->Options.FloatABIType = FloatABI::Soft;
104 InMips16HardFloat = true;
105 }
106
Reed Kotler1595f362013-04-09 19:46:01 +0000107 PreviousInMips16Mode = InMips16Mode;
108
Evan Cheng54b68e32011-07-01 20:45:01 +0000109 // Initialize scheduling itinerary for the specified CPU.
110 InstrItins = getInstrItineraryForCPU(CPUName);
111
Daniel Sanders5a1449d2014-02-20 14:58:19 +0000112 // Assert exactly one ABI was chosen.
113 assert(MipsABI != UnknownABI);
114 assert((((getFeatureBits() & Mips::FeatureO32) != 0) +
115 ((getFeatureBits() & Mips::FeatureEABI) != 0) +
116 ((getFeatureBits() & Mips::FeatureN32) != 0) +
117 ((getFeatureBits() & Mips::FeatureN64) != 0)) == 1);
Akira Hatanaka6de4d122011-09-21 02:45:29 +0000118
119 // Check if Architecture and ABI are compatible.
120 assert(((!hasMips64() && (isABI_O32() || isABI_EABI())) ||
121 (hasMips64() && (isABI_N32() || isABI_N64()))) &&
122 "Invalid Arch & ABI pair.");
123
Daniel Sanders1b1e25b2013-09-27 10:08:31 +0000124 if (hasMSA() && !isFP64bit())
125 report_fatal_error("MSA requires a 64-bit FPU register file (FR=1 mode). "
126 "See -mattr=+fp64.",
127 false);
128
Bruno Cardoso Lopes80ab8f92008-07-14 14:42:54 +0000129 // Is the target system Linux ?
130 if (TT.find("linux") == std::string::npos)
131 IsLinux = false;
Akira Hatanakaad495022012-08-22 03:18:13 +0000132
133 // Set UseSmallSection.
134 UseSmallSection = !IsLinux && (RM == Reloc::Static);
Reed Kotler0eae85f2013-08-16 23:05:18 +0000135 // set some subtarget specific features
136 if (inMips16Mode())
137 HasBitCount=false;
Bruno Cardoso Lopes35e43c42007-06-06 07:42:06 +0000138}
Akira Hatanaka047473e2012-03-28 00:24:17 +0000139
140bool
141MipsSubtarget::enablePostRAScheduler(CodeGenOpt::Level OptLevel,
Akira Hatanaka5fd22482012-06-14 21:10:56 +0000142 TargetSubtargetInfo::AntiDepBreakMode &Mode,
143 RegClassVector &CriticalPathRCs) const {
Akira Hatanakacf434ee2012-05-15 03:14:52 +0000144 Mode = TargetSubtargetInfo::ANTIDEP_NONE;
Akira Hatanaka047473e2012-03-28 00:24:17 +0000145 CriticalPathRCs.clear();
146 CriticalPathRCs.push_back(hasMips64() ?
Akira Hatanaka13e6ccf2013-08-06 23:08:38 +0000147 &Mips::GPR64RegClass : &Mips::GPR32RegClass);
Akira Hatanaka2c670062012-03-28 00:52:23 +0000148 return OptLevel >= CodeGenOpt::Aggressive;
Akira Hatanaka047473e2012-03-28 00:24:17 +0000149}
Reed Kotler1595f362013-04-09 19:46:01 +0000150
151//FIXME: This logic for reseting the subtarget along with
152// the helper classes can probably be simplified but there are a lot of
153// cases so we will defer rewriting this to later.
154//
155void MipsSubtarget::resetSubtarget(MachineFunction *MF) {
156 bool ChangeToMips16 = false, ChangeToNoMips16 = false;
157 DEBUG(dbgs() << "resetSubtargetFeatures" << "\n");
158 AttributeSet FnAttrs = MF->getFunction()->getAttributes();
159 ChangeToMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
160 "mips16");
161 ChangeToNoMips16 = FnAttrs.hasAttribute(AttributeSet::FunctionIndex,
162 "nomips16");
163 assert (!(ChangeToMips16 & ChangeToNoMips16) &&
164 "mips16 and nomips16 specified on the same function");
165 if (ChangeToMips16) {
166 if (PreviousInMips16Mode)
167 return;
168 OverrideMode = Mips16Override;
169 PreviousInMips16Mode = true;
170 TM->setHelperClassesMips16();
171 return;
172 } else if (ChangeToNoMips16) {
173 if (!PreviousInMips16Mode)
174 return;
175 OverrideMode = NoMips16Override;
176 PreviousInMips16Mode = false;
177 TM->setHelperClassesMipsSE();
178 return;
179 } else {
180 if (OverrideMode == NoOverride)
181 return;
182 OverrideMode = NoOverride;
183 DEBUG(dbgs() << "back to default" << "\n");
184 if (inMips16Mode() && !PreviousInMips16Mode) {
185 TM->setHelperClassesMips16();
186 PreviousInMips16Mode = true;
187 } else if (!inMips16Mode() && PreviousInMips16Mode) {
188 TM->setHelperClassesMipsSE();
189 PreviousInMips16Mode = false;
190 }
191 return;
192 }
193}
194
Reed Kotlerc03807a2013-08-30 19:40:56 +0000195bool MipsSubtarget::mipsSEUsesSoftFloat() const {
196 return TM->Options.UseSoftFloat && !InMips16HardFloat;
197}
Reed Kotler91ae9822013-10-27 21:57:36 +0000198
199bool MipsSubtarget::useConstantIslands() {
200 DEBUG(dbgs() << "use constant islands " << Mips16ConstantIslands << "\n");
201 return Mips16ConstantIslands;
202}