Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 1 | //===- MachineSink.cpp - Sinking for machine instructions -----------------===// |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
Bill Wendling | 7ee730e | 2010-06-02 23:04:26 +0000 | [diff] [blame] | 10 | // This pass moves instructions into successor blocks when possible, so that |
Dan Gohman | 5d79a2c | 2009-08-05 01:19:01 +0000 | [diff] [blame] | 11 | // they aren't executed on paths where their results aren't needed. |
| 12 | // |
| 13 | // This pass is not intended to be a replacement or a complete alternative |
| 14 | // for an LLVM-IR-level sinking pass. It is only designed to sink simple |
| 15 | // constructs that are not exposed before lowering and instruction selection. |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 16 | // |
| 17 | //===----------------------------------------------------------------------===// |
| 18 | |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 19 | #include "llvm/ADT/SetVector.h" |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 20 | #include "llvm/ADT/SmallSet.h" |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 21 | #include "llvm/ADT/SmallVector.h" |
Matthias Braun | 352b89c | 2015-05-16 03:11:07 +0000 | [diff] [blame] | 22 | #include "llvm/ADT/SparseBitVector.h" |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 23 | #include "llvm/ADT/Statistic.h" |
Chandler Carruth | ed0881b | 2012-12-03 16:50:05 +0000 | [diff] [blame] | 24 | #include "llvm/Analysis/AliasAnalysis.h" |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 25 | #include "llvm/CodeGen/MachineBasicBlock.h" |
Bruno Cardoso Lopes | d04f759 | 2014-09-25 23:14:26 +0000 | [diff] [blame] | 26 | #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" |
Dehao Chen | f03f515 | 2016-10-20 18:06:52 +0000 | [diff] [blame] | 27 | #include "llvm/CodeGen/MachineBranchProbabilityInfo.h" |
Chandler Carruth | ed0881b | 2012-12-03 16:50:05 +0000 | [diff] [blame] | 28 | #include "llvm/CodeGen/MachineDominators.h" |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 29 | #include "llvm/CodeGen/MachineFunction.h" |
| 30 | #include "llvm/CodeGen/MachineFunctionPass.h" |
| 31 | #include "llvm/CodeGen/MachineInstr.h" |
Chandler Carruth | ed0881b | 2012-12-03 16:50:05 +0000 | [diff] [blame] | 32 | #include "llvm/CodeGen/MachineLoopInfo.h" |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 33 | #include "llvm/CodeGen/MachineOperand.h" |
Jingyue Wu | 2954280 | 2014-10-15 03:27:43 +0000 | [diff] [blame] | 34 | #include "llvm/CodeGen/MachinePostDominators.h" |
Chandler Carruth | ed0881b | 2012-12-03 16:50:05 +0000 | [diff] [blame] | 35 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
David Blaikie | 3f833ed | 2017-11-08 01:01:31 +0000 | [diff] [blame] | 36 | #include "llvm/CodeGen/TargetInstrInfo.h" |
David Blaikie | b3bde2e | 2017-11-17 01:07:10 +0000 | [diff] [blame] | 37 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 38 | #include "llvm/CodeGen/TargetSubtargetInfo.h" |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 39 | #include "llvm/IR/BasicBlock.h" |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 40 | #include "llvm/IR/LLVMContext.h" |
Paul Robinson | 8bd9d6a | 2017-12-09 00:17:01 +0000 | [diff] [blame] | 41 | #include "llvm/IR/DebugInfoMetadata.h" |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 42 | #include "llvm/Pass.h" |
| 43 | #include "llvm/Support/BranchProbability.h" |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 44 | #include "llvm/Support/CommandLine.h" |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 45 | #include "llvm/Support/Debug.h" |
Bill Wendling | 63aa000 | 2009-08-22 20:26:23 +0000 | [diff] [blame] | 46 | #include "llvm/Support/raw_ostream.h" |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 47 | #include <algorithm> |
| 48 | #include <cassert> |
| 49 | #include <cstdint> |
| 50 | #include <map> |
| 51 | #include <utility> |
| 52 | #include <vector> |
| 53 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 54 | using namespace llvm; |
| 55 | |
Chandler Carruth | 1b9dde0 | 2014-04-22 02:02:50 +0000 | [diff] [blame] | 56 | #define DEBUG_TYPE "machine-sink" |
| 57 | |
Andrew Trick | 9e76199 | 2012-02-08 21:22:43 +0000 | [diff] [blame] | 58 | static cl::opt<bool> |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 59 | SplitEdges("machine-sink-split", |
| 60 | cl::desc("Split critical edges during machine sinking"), |
Evan Cheng | f3e9a48 | 2010-09-20 22:52:00 +0000 | [diff] [blame] | 61 | cl::init(true), cl::Hidden); |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 62 | |
Bruno Cardoso Lopes | d04f759 | 2014-09-25 23:14:26 +0000 | [diff] [blame] | 63 | static cl::opt<bool> |
| 64 | UseBlockFreqInfo("machine-sink-bfi", |
| 65 | cl::desc("Use block frequency info to find successors to sink"), |
| 66 | cl::init(true), cl::Hidden); |
| 67 | |
Dehao Chen | f03f515 | 2016-10-20 18:06:52 +0000 | [diff] [blame] | 68 | static cl::opt<unsigned> SplitEdgeProbabilityThreshold( |
| 69 | "machine-sink-split-probability-threshold", |
| 70 | cl::desc( |
| 71 | "Percentage threshold for splitting single-instruction critical edge. " |
| 72 | "If the branch threshold is higher than this threshold, we allow " |
| 73 | "speculative execution of up to 1 instruction to avoid branching to " |
| 74 | "splitted critical edge"), |
| 75 | cl::init(40), cl::Hidden); |
| 76 | |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 77 | STATISTIC(NumSunk, "Number of machine instructions sunk"); |
| 78 | STATISTIC(NumSplit, "Number of critical edges split"); |
| 79 | STATISTIC(NumCoalesces, "Number of copies coalesced"); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 80 | STATISTIC(NumPostRACopySink, "Number of copies sunk after RA"); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 81 | |
| 82 | namespace { |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 83 | |
Nick Lewycky | 02d5f77 | 2009-10-25 06:33:48 +0000 | [diff] [blame] | 84 | class MachineSinking : public MachineFunctionPass { |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 85 | const TargetInstrInfo *TII; |
Dan Gohman | a317687 | 2009-09-25 22:53:29 +0000 | [diff] [blame] | 86 | const TargetRegisterInfo *TRI; |
Jingyue Wu | 2954280 | 2014-10-15 03:27:43 +0000 | [diff] [blame] | 87 | MachineRegisterInfo *MRI; // Machine register information |
| 88 | MachineDominatorTree *DT; // Machine dominator tree |
| 89 | MachinePostDominatorTree *PDT; // Machine post dominator tree |
Jakob Stoklund Olesen | cdc3df4 | 2010-04-15 23:41:02 +0000 | [diff] [blame] | 90 | MachineLoopInfo *LI; |
Bruno Cardoso Lopes | d04f759 | 2014-09-25 23:14:26 +0000 | [diff] [blame] | 91 | const MachineBlockFrequencyInfo *MBFI; |
Dehao Chen | f03f515 | 2016-10-20 18:06:52 +0000 | [diff] [blame] | 92 | const MachineBranchProbabilityInfo *MBPI; |
Dan Gohman | 87b02d5 | 2009-10-09 23:27:56 +0000 | [diff] [blame] | 93 | AliasAnalysis *AA; |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 94 | |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 95 | // Remember which edges have been considered for breaking. |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 96 | SmallSet<std::pair<MachineBasicBlock*, MachineBasicBlock*>, 8> |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 97 | CEBCandidates; |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 98 | // Remember which edges we are about to split. |
| 99 | // This is different from CEBCandidates since those edges |
| 100 | // will be split. |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 101 | SetVector<std::pair<MachineBasicBlock *, MachineBasicBlock *>> ToSplit; |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 102 | |
Matthias Braun | 352b89c | 2015-05-16 03:11:07 +0000 | [diff] [blame] | 103 | SparseBitVector<> RegsToClearKillFlags; |
| 104 | |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 105 | using AllSuccsCache = |
| 106 | std::map<MachineBasicBlock *, SmallVector<MachineBasicBlock *, 4>>; |
Arnaud A. de Grandmaison | d8673ed | 2015-06-15 09:09:06 +0000 | [diff] [blame] | 107 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 108 | public: |
| 109 | static char ID; // Pass identification |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 110 | |
Owen Anderson | 6c18d1a | 2010-10-19 17:21:58 +0000 | [diff] [blame] | 111 | MachineSinking() : MachineFunctionPass(ID) { |
| 112 | initializeMachineSinkingPass(*PassRegistry::getPassRegistry()); |
| 113 | } |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 114 | |
Craig Topper | 4584cd5 | 2014-03-07 09:26:03 +0000 | [diff] [blame] | 115 | bool runOnMachineFunction(MachineFunction &MF) override; |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 116 | |
Craig Topper | 4584cd5 | 2014-03-07 09:26:03 +0000 | [diff] [blame] | 117 | void getAnalysisUsage(AnalysisUsage &AU) const override { |
Dan Gohman | 0402315 | 2009-07-31 23:37:33 +0000 | [diff] [blame] | 118 | AU.setPreservesCFG(); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 119 | MachineFunctionPass::getAnalysisUsage(AU); |
Chandler Carruth | 7b560d4 | 2015-09-09 17:55:00 +0000 | [diff] [blame] | 120 | AU.addRequired<AAResultsWrapperPass>(); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 121 | AU.addRequired<MachineDominatorTree>(); |
Jingyue Wu | 2954280 | 2014-10-15 03:27:43 +0000 | [diff] [blame] | 122 | AU.addRequired<MachinePostDominatorTree>(); |
Jakob Stoklund Olesen | cdc3df4 | 2010-04-15 23:41:02 +0000 | [diff] [blame] | 123 | AU.addRequired<MachineLoopInfo>(); |
Dehao Chen | f03f515 | 2016-10-20 18:06:52 +0000 | [diff] [blame] | 124 | AU.addRequired<MachineBranchProbabilityInfo>(); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 125 | AU.addPreserved<MachineDominatorTree>(); |
Jingyue Wu | 2954280 | 2014-10-15 03:27:43 +0000 | [diff] [blame] | 126 | AU.addPreserved<MachinePostDominatorTree>(); |
Jakob Stoklund Olesen | cdc3df4 | 2010-04-15 23:41:02 +0000 | [diff] [blame] | 127 | AU.addPreserved<MachineLoopInfo>(); |
Bruno Cardoso Lopes | d04f759 | 2014-09-25 23:14:26 +0000 | [diff] [blame] | 128 | if (UseBlockFreqInfo) |
| 129 | AU.addRequired<MachineBlockFrequencyInfo>(); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 130 | } |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 131 | |
Craig Topper | 4584cd5 | 2014-03-07 09:26:03 +0000 | [diff] [blame] | 132 | void releaseMemory() override { |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 133 | CEBCandidates.clear(); |
| 134 | } |
| 135 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 136 | private: |
| 137 | bool ProcessBlock(MachineBasicBlock &MBB); |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 138 | bool isWorthBreakingCriticalEdge(MachineInstr &MI, |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 139 | MachineBasicBlock *From, |
| 140 | MachineBasicBlock *To); |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 141 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 142 | /// Postpone the splitting of the given critical |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 143 | /// edge (\p From, \p To). |
| 144 | /// |
| 145 | /// We do not split the edges on the fly. Indeed, this invalidates |
| 146 | /// the dominance information and thus triggers a lot of updates |
| 147 | /// of that information underneath. |
| 148 | /// Instead, we postpone all the splits after each iteration of |
| 149 | /// the main loop. That way, the information is at least valid |
| 150 | /// for the lifetime of an iteration. |
| 151 | /// |
| 152 | /// \return True if the edge is marked as toSplit, false otherwise. |
Patrik Hagglund | d06de4b | 2014-12-04 10:36:42 +0000 | [diff] [blame] | 153 | /// False can be returned if, for instance, this is not profitable. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 154 | bool PostponeSplitCriticalEdge(MachineInstr &MI, |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 155 | MachineBasicBlock *From, |
| 156 | MachineBasicBlock *To, |
| 157 | bool BreakPHIEdge); |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 158 | bool SinkInstruction(MachineInstr &MI, bool &SawStore, |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 159 | |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 160 | AllSuccsCache &AllSuccessors); |
Evan Cheng | 25b6068 | 2010-08-18 23:09:25 +0000 | [diff] [blame] | 161 | bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB, |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 162 | MachineBasicBlock *DefMBB, |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 163 | bool &BreakPHIEdge, bool &LocalUse) const; |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 164 | MachineBasicBlock *FindSuccToSinkTo(MachineInstr &MI, MachineBasicBlock *MBB, |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 165 | bool &BreakPHIEdge, AllSuccsCache &AllSuccessors); |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 166 | bool isProfitableToSinkTo(unsigned Reg, MachineInstr &MI, |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 167 | MachineBasicBlock *MBB, |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 168 | MachineBasicBlock *SuccToSinkTo, |
| 169 | AllSuccsCache &AllSuccessors); |
Devang Patel | b94c9a4 | 2011-12-08 21:48:01 +0000 | [diff] [blame] | 170 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 171 | bool PerformTrivialForwardCoalescing(MachineInstr &MI, |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 172 | MachineBasicBlock *MBB); |
Arnaud A. de Grandmaison | d8673ed | 2015-06-15 09:09:06 +0000 | [diff] [blame] | 173 | |
| 174 | SmallVector<MachineBasicBlock *, 4> & |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 175 | GetAllSortedSuccessors(MachineInstr &MI, MachineBasicBlock *MBB, |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 176 | AllSuccsCache &AllSuccessors) const; |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 177 | }; |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 178 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 179 | } // end anonymous namespace |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 180 | |
Dan Gohman | d78c400 | 2008-05-13 00:00:25 +0000 | [diff] [blame] | 181 | char MachineSinking::ID = 0; |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 182 | |
Andrew Trick | 1fa5bcb | 2012-02-08 21:23:13 +0000 | [diff] [blame] | 183 | char &llvm::MachineSinkingID = MachineSinking::ID; |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 184 | |
Matthias Braun | 1527baa | 2017-05-25 21:26:32 +0000 | [diff] [blame] | 185 | INITIALIZE_PASS_BEGIN(MachineSinking, DEBUG_TYPE, |
| 186 | "Machine code sinking", false, false) |
Dehao Chen | f03f515 | 2016-10-20 18:06:52 +0000 | [diff] [blame] | 187 | INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo) |
Owen Anderson | 8ac477f | 2010-10-12 19:48:12 +0000 | [diff] [blame] | 188 | INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) |
| 189 | INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) |
Chandler Carruth | 7b560d4 | 2015-09-09 17:55:00 +0000 | [diff] [blame] | 190 | INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) |
Matthias Braun | 1527baa | 2017-05-25 21:26:32 +0000 | [diff] [blame] | 191 | INITIALIZE_PASS_END(MachineSinking, DEBUG_TYPE, |
| 192 | "Machine code sinking", false, false) |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 193 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 194 | bool MachineSinking::PerformTrivialForwardCoalescing(MachineInstr &MI, |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 195 | MachineBasicBlock *MBB) { |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 196 | if (!MI.isCopy()) |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 197 | return false; |
| 198 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 199 | unsigned SrcReg = MI.getOperand(1).getReg(); |
| 200 | unsigned DstReg = MI.getOperand(0).getReg(); |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 201 | if (!TargetRegisterInfo::isVirtualRegister(SrcReg) || |
| 202 | !TargetRegisterInfo::isVirtualRegister(DstReg) || |
| 203 | !MRI->hasOneNonDBGUse(SrcReg)) |
| 204 | return false; |
| 205 | |
| 206 | const TargetRegisterClass *SRC = MRI->getRegClass(SrcReg); |
| 207 | const TargetRegisterClass *DRC = MRI->getRegClass(DstReg); |
| 208 | if (SRC != DRC) |
| 209 | return false; |
| 210 | |
| 211 | MachineInstr *DefMI = MRI->getVRegDef(SrcReg); |
| 212 | if (DefMI->isCopyLike()) |
| 213 | return false; |
| 214 | DEBUG(dbgs() << "Coalescing: " << *DefMI); |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 215 | DEBUG(dbgs() << "*** to: " << MI); |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 216 | MRI->replaceRegWith(DstReg, SrcReg); |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 217 | MI.eraseFromParent(); |
Patrik Hagglund | 57d315b | 2014-09-09 07:47:00 +0000 | [diff] [blame] | 218 | |
| 219 | // Conservatively, clear any kill flags, since it's possible that they are no |
| 220 | // longer correct. |
| 221 | MRI->clearKillFlags(SrcReg); |
| 222 | |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 223 | ++NumCoalesces; |
| 224 | return true; |
| 225 | } |
| 226 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 227 | /// AllUsesDominatedByBlock - Return true if all uses of the specified register |
Evan Cheng | 25b6068 | 2010-08-18 23:09:25 +0000 | [diff] [blame] | 228 | /// occur in blocks dominated by the specified block. If any use is in the |
| 229 | /// definition block, then return false since it is never legal to move def |
| 230 | /// after uses. |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 231 | bool |
| 232 | MachineSinking::AllUsesDominatedByBlock(unsigned Reg, |
| 233 | MachineBasicBlock *MBB, |
| 234 | MachineBasicBlock *DefMBB, |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 235 | bool &BreakPHIEdge, |
| 236 | bool &LocalUse) const { |
Dan Gohman | 3a4be0f | 2008-02-10 18:45:23 +0000 | [diff] [blame] | 237 | assert(TargetRegisterInfo::isVirtualRegister(Reg) && |
| 238 | "Only makes sense for vregs"); |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 239 | |
Devang Patel | 706574a | 2011-12-09 01:25:04 +0000 | [diff] [blame] | 240 | // Ignore debug uses because debug info doesn't affect the code. |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 241 | if (MRI->use_nodbg_empty(Reg)) |
| 242 | return true; |
| 243 | |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 244 | // BreakPHIEdge is true if all the uses are in the successor MBB being sunken |
| 245 | // into and they are all PHI nodes. In this case, machine-sink must break |
| 246 | // the critical edge first. e.g. |
| 247 | // |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 248 | // %bb.1: derived from LLVM BB %bb4.preheader |
| 249 | // Predecessors according to CFG: %bb.0 |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 250 | // ... |
Francis Visoiu Mistrih | a8a83d1 | 2017-12-07 10:40:31 +0000 | [diff] [blame] | 251 | // %reg16385 = DEC64_32r %reg16437, implicit-def dead %eflags |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 252 | // ... |
Francis Visoiu Mistrih | a8a83d1 | 2017-12-07 10:40:31 +0000 | [diff] [blame] | 253 | // JE_4 <%bb.37>, implicit %eflags |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 254 | // Successors according to CFG: %bb.37 %bb.2 |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 255 | // |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 256 | // %bb.2: derived from LLVM BB %bb.nph |
| 257 | // Predecessors according to CFG: %bb.0 %bb.1 |
Francis Visoiu Mistrih | a8a83d1 | 2017-12-07 10:40:31 +0000 | [diff] [blame] | 258 | // %reg16386 = PHI %reg16434, %bb.0, %reg16385, %bb.1 |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 259 | BreakPHIEdge = true; |
Owen Anderson | b36376e | 2014-03-17 19:36:09 +0000 | [diff] [blame] | 260 | for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) { |
| 261 | MachineInstr *UseInst = MO.getParent(); |
| 262 | unsigned OpNo = &MO - &UseInst->getOperand(0); |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 263 | MachineBasicBlock *UseBlock = UseInst->getParent(); |
| 264 | if (!(UseBlock == MBB && UseInst->isPHI() && |
Owen Anderson | b36376e | 2014-03-17 19:36:09 +0000 | [diff] [blame] | 265 | UseInst->getOperand(OpNo+1).getMBB() == DefMBB)) { |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 266 | BreakPHIEdge = false; |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 267 | break; |
| 268 | } |
| 269 | } |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 270 | if (BreakPHIEdge) |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 271 | return true; |
| 272 | |
Owen Anderson | b36376e | 2014-03-17 19:36:09 +0000 | [diff] [blame] | 273 | for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) { |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 274 | // Determine the block of the use. |
Owen Anderson | b36376e | 2014-03-17 19:36:09 +0000 | [diff] [blame] | 275 | MachineInstr *UseInst = MO.getParent(); |
| 276 | unsigned OpNo = &MO - &UseInst->getOperand(0); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 277 | MachineBasicBlock *UseBlock = UseInst->getParent(); |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 278 | if (UseInst->isPHI()) { |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 279 | // PHI nodes use the operand in the predecessor block, not the block with |
| 280 | // the PHI. |
Owen Anderson | b36376e | 2014-03-17 19:36:09 +0000 | [diff] [blame] | 281 | UseBlock = UseInst->getOperand(OpNo+1).getMBB(); |
Evan Cheng | 361b9be | 2010-08-19 18:33:29 +0000 | [diff] [blame] | 282 | } else if (UseBlock == DefMBB) { |
| 283 | LocalUse = true; |
| 284 | return false; |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 285 | } |
Bill Wendling | 7ee730e | 2010-06-02 23:04:26 +0000 | [diff] [blame] | 286 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 287 | // Check that it dominates. |
| 288 | if (!DT->dominates(MBB, UseBlock)) |
| 289 | return false; |
| 290 | } |
Bill Wendling | 7ee730e | 2010-06-02 23:04:26 +0000 | [diff] [blame] | 291 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 292 | return true; |
| 293 | } |
| 294 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 295 | bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { |
Matthias Braun | f1caa28 | 2017-12-15 22:22:58 +0000 | [diff] [blame] | 296 | if (skipFunction(MF.getFunction())) |
Paul Robinson | 7c99ec5 | 2014-03-31 17:43:35 +0000 | [diff] [blame] | 297 | return false; |
| 298 | |
David Greene | 4b7aa24 | 2010-01-05 01:26:00 +0000 | [diff] [blame] | 299 | DEBUG(dbgs() << "******** Machine Sinking ********\n"); |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 300 | |
Eric Christopher | eb9e87f | 2014-10-14 07:00:33 +0000 | [diff] [blame] | 301 | TII = MF.getSubtarget().getInstrInfo(); |
| 302 | TRI = MF.getSubtarget().getRegisterInfo(); |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 303 | MRI = &MF.getRegInfo(); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 304 | DT = &getAnalysis<MachineDominatorTree>(); |
Jingyue Wu | 2954280 | 2014-10-15 03:27:43 +0000 | [diff] [blame] | 305 | PDT = &getAnalysis<MachinePostDominatorTree>(); |
Jakob Stoklund Olesen | cdc3df4 | 2010-04-15 23:41:02 +0000 | [diff] [blame] | 306 | LI = &getAnalysis<MachineLoopInfo>(); |
Bruno Cardoso Lopes | d04f759 | 2014-09-25 23:14:26 +0000 | [diff] [blame] | 307 | MBFI = UseBlockFreqInfo ? &getAnalysis<MachineBlockFrequencyInfo>() : nullptr; |
Dehao Chen | f03f515 | 2016-10-20 18:06:52 +0000 | [diff] [blame] | 308 | MBPI = &getAnalysis<MachineBranchProbabilityInfo>(); |
Chandler Carruth | 7b560d4 | 2015-09-09 17:55:00 +0000 | [diff] [blame] | 309 | AA = &getAnalysis<AAResultsWrapperPass>().getAAResults(); |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 310 | |
| 311 | bool EverMadeChange = false; |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 312 | |
Eugene Zelenko | 1804a77 | 2016-08-25 00:45:04 +0000 | [diff] [blame] | 313 | while (true) { |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 314 | bool MadeChange = false; |
| 315 | |
| 316 | // Process all basic blocks. |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 317 | CEBCandidates.clear(); |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 318 | ToSplit.clear(); |
Arnaud A. de Grandmaison | d8673ed | 2015-06-15 09:09:06 +0000 | [diff] [blame] | 319 | for (auto &MBB: MF) |
| 320 | MadeChange |= ProcessBlock(MBB); |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 321 | |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 322 | // If we have anything we marked as toSplit, split it now. |
| 323 | for (auto &Pair : ToSplit) { |
Quentin Colombet | 23341a8 | 2016-04-21 21:01:13 +0000 | [diff] [blame] | 324 | auto NewSucc = Pair.first->SplitCriticalEdge(Pair.second, *this); |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 325 | if (NewSucc != nullptr) { |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 326 | DEBUG(dbgs() << " *** Splitting critical edge: " |
| 327 | << printMBBReference(*Pair.first) << " -- " |
| 328 | << printMBBReference(*NewSucc) << " -- " |
| 329 | << printMBBReference(*Pair.second) << '\n'); |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 330 | MadeChange = true; |
| 331 | ++NumSplit; |
| 332 | } else |
| 333 | DEBUG(dbgs() << " *** Not legal to break critical edge\n"); |
| 334 | } |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 335 | // If this iteration over the code changed anything, keep iterating. |
| 336 | if (!MadeChange) break; |
| 337 | EverMadeChange = true; |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 338 | } |
Matthias Braun | 352b89c | 2015-05-16 03:11:07 +0000 | [diff] [blame] | 339 | |
| 340 | // Now clear any kill flags for recorded registers. |
| 341 | for (auto I : RegsToClearKillFlags) |
| 342 | MRI->clearKillFlags(I); |
| 343 | RegsToClearKillFlags.clear(); |
| 344 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 345 | return EverMadeChange; |
| 346 | } |
| 347 | |
| 348 | bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) { |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 349 | // Can't sink anything out of a block that has less than two successors. |
Chris Lattner | 30c3de6 | 2009-04-10 16:38:36 +0000 | [diff] [blame] | 350 | if (MBB.succ_size() <= 1 || MBB.empty()) return false; |
| 351 | |
Dan Gohman | 918a90a | 2010-04-05 19:17:22 +0000 | [diff] [blame] | 352 | // Don't bother sinking code out of unreachable blocks. In addition to being |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 353 | // unprofitable, it can also lead to infinite looping, because in an |
| 354 | // unreachable loop there may be nowhere to stop. |
Dan Gohman | 918a90a | 2010-04-05 19:17:22 +0000 | [diff] [blame] | 355 | if (!DT->isReachableFromEntry(&MBB)) return false; |
| 356 | |
Chris Lattner | 30c3de6 | 2009-04-10 16:38:36 +0000 | [diff] [blame] | 357 | bool MadeChange = false; |
| 358 | |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 359 | // Cache all successors, sorted by frequency info and loop depth. |
| 360 | AllSuccsCache AllSuccessors; |
Arnaud A. de Grandmaison | d8673ed | 2015-06-15 09:09:06 +0000 | [diff] [blame] | 361 | |
Chris Lattner | 08af5a9 | 2008-01-12 00:17:41 +0000 | [diff] [blame] | 362 | // Walk the basic block bottom-up. Remember if we saw a store. |
Chris Lattner | 30c3de6 | 2009-04-10 16:38:36 +0000 | [diff] [blame] | 363 | MachineBasicBlock::iterator I = MBB.end(); |
| 364 | --I; |
| 365 | bool ProcessedBegin, SawStore = false; |
| 366 | do { |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 367 | MachineInstr &MI = *I; // The instruction to sink. |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 368 | |
Chris Lattner | 30c3de6 | 2009-04-10 16:38:36 +0000 | [diff] [blame] | 369 | // Predecrement I (if it's not begin) so that it isn't invalidated by |
| 370 | // sinking. |
| 371 | ProcessedBegin = I == MBB.begin(); |
| 372 | if (!ProcessedBegin) |
| 373 | --I; |
Dale Johannesen | 2061c84 | 2010-03-05 00:02:59 +0000 | [diff] [blame] | 374 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 375 | if (MI.isDebugValue()) |
Dale Johannesen | 2061c84 | 2010-03-05 00:02:59 +0000 | [diff] [blame] | 376 | continue; |
| 377 | |
Evan Cheng | fe917ef | 2011-04-11 18:47:20 +0000 | [diff] [blame] | 378 | bool Joined = PerformTrivialForwardCoalescing(MI, &MBB); |
| 379 | if (Joined) { |
| 380 | MadeChange = true; |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 381 | continue; |
Evan Cheng | fe917ef | 2011-04-11 18:47:20 +0000 | [diff] [blame] | 382 | } |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 383 | |
Richard Trieu | 7a08381 | 2016-02-18 22:09:30 +0000 | [diff] [blame] | 384 | if (SinkInstruction(MI, SawStore, AllSuccessors)) { |
| 385 | ++NumSunk; |
| 386 | MadeChange = true; |
| 387 | } |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 388 | |
Chris Lattner | 30c3de6 | 2009-04-10 16:38:36 +0000 | [diff] [blame] | 389 | // If we just processed the first instruction in the block, we're done. |
| 390 | } while (!ProcessedBegin); |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 391 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 392 | return MadeChange; |
| 393 | } |
| 394 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 395 | bool MachineSinking::isWorthBreakingCriticalEdge(MachineInstr &MI, |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 396 | MachineBasicBlock *From, |
| 397 | MachineBasicBlock *To) { |
| 398 | // FIXME: Need much better heuristics. |
| 399 | |
| 400 | // If the pass has already considered breaking this edge (during this pass |
| 401 | // through the function), then let's go ahead and break it. This means |
| 402 | // sinking multiple "cheap" instructions into the same block. |
David Blaikie | 70573dc | 2014-11-19 07:49:26 +0000 | [diff] [blame] | 403 | if (!CEBCandidates.insert(std::make_pair(From, To)).second) |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 404 | return true; |
| 405 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 406 | if (!MI.isCopy() && !TII->isAsCheapAsAMove(MI)) |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 407 | return true; |
| 408 | |
Dehao Chen | f03f515 | 2016-10-20 18:06:52 +0000 | [diff] [blame] | 409 | if (From->isSuccessor(To) && MBPI->getEdgeProbability(From, To) <= |
| 410 | BranchProbability(SplitEdgeProbabilityThreshold, 100)) |
| 411 | return true; |
| 412 | |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 413 | // MI is cheap, we probably don't want to break the critical edge for it. |
| 414 | // However, if this would allow some definitions of its source operands |
| 415 | // to be sunk then it's probably worth it. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 416 | for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { |
| 417 | const MachineOperand &MO = MI.getOperand(i); |
Will Dietz | 5cb7f4e | 2013-10-14 16:57:17 +0000 | [diff] [blame] | 418 | if (!MO.isReg() || !MO.isUse()) |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 419 | continue; |
Will Dietz | 5cb7f4e | 2013-10-14 16:57:17 +0000 | [diff] [blame] | 420 | unsigned Reg = MO.getReg(); |
| 421 | if (Reg == 0) |
| 422 | continue; |
| 423 | |
| 424 | // We don't move live definitions of physical registers, |
| 425 | // so sinking their uses won't enable any opportunities. |
| 426 | if (TargetRegisterInfo::isPhysicalRegister(Reg)) |
| 427 | continue; |
| 428 | |
| 429 | // If this instruction is the only user of a virtual register, |
| 430 | // check if breaking the edge will enable sinking |
| 431 | // both this instruction and the defining instruction. |
| 432 | if (MRI->hasOneNonDBGUse(Reg)) { |
| 433 | // If the definition resides in same MBB, |
| 434 | // claim it's likely we can sink these together. |
| 435 | // If definition resides elsewhere, we aren't |
| 436 | // blocking it from being sunk so don't break the edge. |
| 437 | MachineInstr *DefMI = MRI->getVRegDef(Reg); |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 438 | if (DefMI->getParent() == MI.getParent()) |
Will Dietz | 5cb7f4e | 2013-10-14 16:57:17 +0000 | [diff] [blame] | 439 | return true; |
| 440 | } |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | return false; |
| 444 | } |
| 445 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 446 | bool MachineSinking::PostponeSplitCriticalEdge(MachineInstr &MI, |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 447 | MachineBasicBlock *FromBB, |
| 448 | MachineBasicBlock *ToBB, |
| 449 | bool BreakPHIEdge) { |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 450 | if (!isWorthBreakingCriticalEdge(MI, FromBB, ToBB)) |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 451 | return false; |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 452 | |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 453 | // Avoid breaking back edge. From == To means backedge for single BB loop. |
Evan Cheng | f3e9a48 | 2010-09-20 22:52:00 +0000 | [diff] [blame] | 454 | if (!SplitEdges || FromBB == ToBB) |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 455 | return false; |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 456 | |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 457 | // Check for backedges of more "complex" loops. |
| 458 | if (LI->getLoopFor(FromBB) == LI->getLoopFor(ToBB) && |
| 459 | LI->isLoopHeader(ToBB)) |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 460 | return false; |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 461 | |
| 462 | // It's not always legal to break critical edges and sink the computation |
| 463 | // to the edge. |
| 464 | // |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 465 | // %bb.1: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 466 | // v1024 |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 467 | // Beq %bb.3 |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 468 | // <fallthrough> |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 469 | // %bb.2: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 470 | // ... no uses of v1024 |
| 471 | // <fallthrough> |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 472 | // %bb.3: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 473 | // ... |
| 474 | // = v1024 |
| 475 | // |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 476 | // If %bb.1 -> %bb.3 edge is broken and computation of v1024 is inserted: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 477 | // |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 478 | // %bb.1: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 479 | // ... |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 480 | // Bne %bb.2 |
| 481 | // %bb.4: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 482 | // v1024 = |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 483 | // B %bb.3 |
| 484 | // %bb.2: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 485 | // ... no uses of v1024 |
| 486 | // <fallthrough> |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 487 | // %bb.3: |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 488 | // ... |
| 489 | // = v1024 |
| 490 | // |
Francis Visoiu Mistrih | 25528d6 | 2017-12-04 17:18:51 +0000 | [diff] [blame] | 491 | // This is incorrect since v1024 is not computed along the %bb.1->%bb.2->%bb.3 |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 492 | // flow. We need to ensure the new basic block where the computation is |
| 493 | // sunk to dominates all the uses. |
| 494 | // It's only legal to break critical edge and sink the computation to the |
| 495 | // new block if all the predecessors of "To", except for "From", are |
| 496 | // not dominated by "From". Given SSA property, this means these |
| 497 | // predecessors are dominated by "To". |
| 498 | // |
| 499 | // There is no need to do this check if all the uses are PHI nodes. PHI |
| 500 | // sources are only defined on the specific predecessor edges. |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 501 | if (!BreakPHIEdge) { |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 502 | for (MachineBasicBlock::pred_iterator PI = ToBB->pred_begin(), |
| 503 | E = ToBB->pred_end(); PI != E; ++PI) { |
| 504 | if (*PI == FromBB) |
| 505 | continue; |
| 506 | if (!DT->dominates(ToBB, *PI)) |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 507 | return false; |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 508 | } |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 509 | } |
| 510 | |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 511 | ToSplit.insert(std::make_pair(FromBB, ToBB)); |
| 512 | |
| 513 | return true; |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 514 | } |
| 515 | |
Andrew Trick | 9e76199 | 2012-02-08 21:22:43 +0000 | [diff] [blame] | 516 | /// collectDebgValues - Scan instructions following MI and collect any |
Devang Patel | 9de7a7d | 2011-09-07 00:07:58 +0000 | [diff] [blame] | 517 | /// matching DBG_VALUEs. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 518 | static void collectDebugValues(MachineInstr &MI, |
Craig Topper | b94011f | 2013-07-14 04:42:23 +0000 | [diff] [blame] | 519 | SmallVectorImpl<MachineInstr *> &DbgValues) { |
Devang Patel | 9de7a7d | 2011-09-07 00:07:58 +0000 | [diff] [blame] | 520 | DbgValues.clear(); |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 521 | if (!MI.getOperand(0).isReg()) |
Devang Patel | 9de7a7d | 2011-09-07 00:07:58 +0000 | [diff] [blame] | 522 | return; |
| 523 | |
| 524 | MachineBasicBlock::iterator DI = MI; ++DI; |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 525 | for (MachineBasicBlock::iterator DE = MI.getParent()->end(); |
Devang Patel | 9de7a7d | 2011-09-07 00:07:58 +0000 | [diff] [blame] | 526 | DI != DE; ++DI) { |
| 527 | if (!DI->isDebugValue()) |
| 528 | return; |
| 529 | if (DI->getOperand(0).isReg() && |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 530 | DI->getOperand(0).getReg() == MI.getOperand(0).getReg()) |
| 531 | DbgValues.push_back(&*DI); |
Devang Patel | 9de7a7d | 2011-09-07 00:07:58 +0000 | [diff] [blame] | 532 | } |
| 533 | } |
| 534 | |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 535 | /// isProfitableToSinkTo - Return true if it is profitable to sink MI. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 536 | bool MachineSinking::isProfitableToSinkTo(unsigned Reg, MachineInstr &MI, |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 537 | MachineBasicBlock *MBB, |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 538 | MachineBasicBlock *SuccToSinkTo, |
| 539 | AllSuccsCache &AllSuccessors) { |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 540 | assert (SuccToSinkTo && "Invalid SinkTo Candidate BB"); |
| 541 | |
| 542 | if (MBB == SuccToSinkTo) |
| 543 | return false; |
| 544 | |
| 545 | // It is profitable if SuccToSinkTo does not post dominate current block. |
Jingyue Wu | 2954280 | 2014-10-15 03:27:43 +0000 | [diff] [blame] | 546 | if (!PDT->dominates(SuccToSinkTo, MBB)) |
| 547 | return true; |
| 548 | |
| 549 | // It is profitable to sink an instruction from a deeper loop to a shallower |
| 550 | // loop, even if the latter post-dominates the former (PR21115). |
| 551 | if (LI->getLoopDepth(MBB) > LI->getLoopDepth(SuccToSinkTo)) |
| 552 | return true; |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 553 | |
| 554 | // Check if only use in post dominated block is PHI instruction. |
| 555 | bool NonPHIUse = false; |
Owen Anderson | b36376e | 2014-03-17 19:36:09 +0000 | [diff] [blame] | 556 | for (MachineInstr &UseInst : MRI->use_nodbg_instructions(Reg)) { |
| 557 | MachineBasicBlock *UseBlock = UseInst.getParent(); |
| 558 | if (UseBlock == SuccToSinkTo && !UseInst.isPHI()) |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 559 | NonPHIUse = true; |
| 560 | } |
| 561 | if (!NonPHIUse) |
| 562 | return true; |
| 563 | |
| 564 | // If SuccToSinkTo post dominates then also it may be profitable if MI |
| 565 | // can further profitably sinked into another block in next round. |
| 566 | bool BreakPHIEdge = false; |
Patrik Hagglund | d06de4b | 2014-12-04 10:36:42 +0000 | [diff] [blame] | 567 | // FIXME - If finding successor is compile time expensive then cache results. |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 568 | if (MachineBasicBlock *MBB2 = |
| 569 | FindSuccToSinkTo(MI, SuccToSinkTo, BreakPHIEdge, AllSuccessors)) |
| 570 | return isProfitableToSinkTo(Reg, MI, SuccToSinkTo, MBB2, AllSuccessors); |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 571 | |
| 572 | // If SuccToSinkTo is final destination and it is a post dominator of current |
| 573 | // block then it is not profitable to sink MI into SuccToSinkTo block. |
| 574 | return false; |
| 575 | } |
| 576 | |
Arnaud A. de Grandmaison | d8673ed | 2015-06-15 09:09:06 +0000 | [diff] [blame] | 577 | /// Get the sorted sequence of successors for this MachineBasicBlock, possibly |
| 578 | /// computing it if it was not already cached. |
| 579 | SmallVector<MachineBasicBlock *, 4> & |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 580 | MachineSinking::GetAllSortedSuccessors(MachineInstr &MI, MachineBasicBlock *MBB, |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 581 | AllSuccsCache &AllSuccessors) const { |
Arnaud A. de Grandmaison | d8673ed | 2015-06-15 09:09:06 +0000 | [diff] [blame] | 582 | // Do we have the sorted successors in cache ? |
| 583 | auto Succs = AllSuccessors.find(MBB); |
| 584 | if (Succs != AllSuccessors.end()) |
| 585 | return Succs->second; |
| 586 | |
| 587 | SmallVector<MachineBasicBlock *, 4> AllSuccs(MBB->succ_begin(), |
| 588 | MBB->succ_end()); |
| 589 | |
| 590 | // Handle cases where sinking can happen but where the sink point isn't a |
| 591 | // successor. For example: |
| 592 | // |
| 593 | // x = computation |
| 594 | // if () {} else {} |
| 595 | // use x |
| 596 | // |
| 597 | const std::vector<MachineDomTreeNode *> &Children = |
| 598 | DT->getNode(MBB)->getChildren(); |
| 599 | for (const auto &DTChild : Children) |
| 600 | // DomTree children of MBB that have MBB as immediate dominator are added. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 601 | if (DTChild->getIDom()->getBlock() == MI.getParent() && |
Arnaud A. de Grandmaison | d8673ed | 2015-06-15 09:09:06 +0000 | [diff] [blame] | 602 | // Skip MBBs already added to the AllSuccs vector above. |
| 603 | !MBB->isSuccessor(DTChild->getBlock())) |
| 604 | AllSuccs.push_back(DTChild->getBlock()); |
| 605 | |
| 606 | // Sort Successors according to their loop depth or block frequency info. |
| 607 | std::stable_sort( |
| 608 | AllSuccs.begin(), AllSuccs.end(), |
| 609 | [this](const MachineBasicBlock *L, const MachineBasicBlock *R) { |
| 610 | uint64_t LHSFreq = MBFI ? MBFI->getBlockFreq(L).getFrequency() : 0; |
| 611 | uint64_t RHSFreq = MBFI ? MBFI->getBlockFreq(R).getFrequency() : 0; |
| 612 | bool HasBlockFreq = LHSFreq != 0 && RHSFreq != 0; |
| 613 | return HasBlockFreq ? LHSFreq < RHSFreq |
| 614 | : LI->getLoopDepth(L) < LI->getLoopDepth(R); |
| 615 | }); |
| 616 | |
| 617 | auto it = AllSuccessors.insert(std::make_pair(MBB, AllSuccs)); |
| 618 | |
| 619 | return it.first->second; |
| 620 | } |
| 621 | |
Devang Patel | b94c9a4 | 2011-12-08 21:48:01 +0000 | [diff] [blame] | 622 | /// FindSuccToSinkTo - Find a successor to sink this instruction to. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 623 | MachineBasicBlock * |
| 624 | MachineSinking::FindSuccToSinkTo(MachineInstr &MI, MachineBasicBlock *MBB, |
| 625 | bool &BreakPHIEdge, |
| 626 | AllSuccsCache &AllSuccessors) { |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 627 | assert (MBB && "Invalid MachineBasicBlock!"); |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 628 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 629 | // Loop over all the operands of the specified instruction. If there is |
| 630 | // anything we can't handle, bail out. |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 631 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 632 | // SuccToSinkTo - This is the successor to sink this instruction to, once we |
| 633 | // decide. |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 634 | MachineBasicBlock *SuccToSinkTo = nullptr; |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 635 | for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { |
| 636 | const MachineOperand &MO = MI.getOperand(i); |
Dan Gohman | 0d1e9a8 | 2008-10-03 15:45:36 +0000 | [diff] [blame] | 637 | if (!MO.isReg()) continue; // Ignore non-register operands. |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 638 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 639 | unsigned Reg = MO.getReg(); |
| 640 | if (Reg == 0) continue; |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 641 | |
Dan Gohman | 3a4be0f | 2008-02-10 18:45:23 +0000 | [diff] [blame] | 642 | if (TargetRegisterInfo::isPhysicalRegister(Reg)) { |
Dan Gohman | a317687 | 2009-09-25 22:53:29 +0000 | [diff] [blame] | 643 | if (MO.isUse()) { |
| 644 | // If the physreg has no defs anywhere, it's just an ambient register |
Dan Gohman | 2f5bdcb | 2009-09-26 02:34:00 +0000 | [diff] [blame] | 645 | // and we can freely move its uses. Alternatively, if it's allocatable, |
| 646 | // it could get allocated to something with a def during allocation. |
Matthias Braun | de8c1b3 | 2016-10-28 18:05:09 +0000 | [diff] [blame] | 647 | if (!MRI->isConstantPhysReg(Reg)) |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 648 | return nullptr; |
Bill Wendling | e41e40f | 2010-06-25 20:48:10 +0000 | [diff] [blame] | 649 | } else if (!MO.isDead()) { |
| 650 | // A def that isn't dead. We can't move it. |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 651 | return nullptr; |
Dan Gohman | a317687 | 2009-09-25 22:53:29 +0000 | [diff] [blame] | 652 | } |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 653 | } else { |
| 654 | // Virtual register uses are always safe to sink. |
| 655 | if (MO.isUse()) continue; |
Evan Cheng | 47a65a1 | 2009-02-07 01:21:47 +0000 | [diff] [blame] | 656 | |
| 657 | // If it's not safe to move defs of the register class, then abort. |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 658 | if (!TII->isSafeToMoveRegClassDefs(MRI->getRegClass(Reg))) |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 659 | return nullptr; |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 660 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 661 | // Virtual register defs can only be sunk if all their uses are in blocks |
| 662 | // dominated by one of the successors. |
| 663 | if (SuccToSinkTo) { |
| 664 | // If a previous operand picked a block to sink to, then this operand |
| 665 | // must be sinkable to the same block. |
Evan Cheng | 361b9be | 2010-08-19 18:33:29 +0000 | [diff] [blame] | 666 | bool LocalUse = false; |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 667 | if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo, MBB, |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 668 | BreakPHIEdge, LocalUse)) |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 669 | return nullptr; |
Bill Wendling | 7ee730e | 2010-06-02 23:04:26 +0000 | [diff] [blame] | 670 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 671 | continue; |
| 672 | } |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 673 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 674 | // Otherwise, we should look at all the successors and decide which one |
Bruno Cardoso Lopes | d04f759 | 2014-09-25 23:14:26 +0000 | [diff] [blame] | 675 | // we should sink to. If we have reliable block frequency information |
| 676 | // (frequency != 0) available, give successors with smaller frequencies |
| 677 | // higher priority, otherwise prioritize smaller loop depths. |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 678 | for (MachineBasicBlock *SuccBlock : |
| 679 | GetAllSortedSuccessors(MI, MBB, AllSuccessors)) { |
Evan Cheng | 361b9be | 2010-08-19 18:33:29 +0000 | [diff] [blame] | 680 | bool LocalUse = false; |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 681 | if (AllUsesDominatedByBlock(Reg, SuccBlock, MBB, |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 682 | BreakPHIEdge, LocalUse)) { |
Devang Patel | 1a3c169 | 2011-12-08 21:33:23 +0000 | [diff] [blame] | 683 | SuccToSinkTo = SuccBlock; |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 684 | break; |
| 685 | } |
Evan Cheng | 25b6068 | 2010-08-18 23:09:25 +0000 | [diff] [blame] | 686 | if (LocalUse) |
| 687 | // Def is used locally, it's never safe to move this def. |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 688 | return nullptr; |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 689 | } |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 690 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 691 | // If we couldn't find a block to sink to, ignore this instruction. |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 692 | if (!SuccToSinkTo) |
| 693 | return nullptr; |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 694 | if (!isProfitableToSinkTo(Reg, MI, MBB, SuccToSinkTo, AllSuccessors)) |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 695 | return nullptr; |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 696 | } |
| 697 | } |
Devang Patel | 202cf2f | 2011-12-08 23:52:00 +0000 | [diff] [blame] | 698 | |
| 699 | // It is not possible to sink an instruction into its own block. This can |
| 700 | // happen with loops. |
Devang Patel | c268688 | 2011-12-14 23:20:38 +0000 | [diff] [blame] | 701 | if (MBB == SuccToSinkTo) |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 702 | return nullptr; |
Devang Patel | 202cf2f | 2011-12-08 23:52:00 +0000 | [diff] [blame] | 703 | |
| 704 | // It's not safe to sink instructions to EH landing pad. Control flow into |
| 705 | // landing pad is implicitly defined. |
Reid Kleckner | 0e28823 | 2015-08-27 23:27:47 +0000 | [diff] [blame] | 706 | if (SuccToSinkTo && SuccToSinkTo->isEHPad()) |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 707 | return nullptr; |
Devang Patel | 202cf2f | 2011-12-08 23:52:00 +0000 | [diff] [blame] | 708 | |
Devang Patel | b94c9a4 | 2011-12-08 21:48:01 +0000 | [diff] [blame] | 709 | return SuccToSinkTo; |
| 710 | } |
| 711 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 712 | /// Return true if MI is likely to be usable as a memory operation by the |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 713 | /// implicit null check optimization. |
| 714 | /// |
| 715 | /// This is a "best effort" heuristic, and should not be relied upon for |
| 716 | /// correctness. This returning true does not guarantee that the implicit null |
| 717 | /// check optimization is legal over MI, and this returning false does not |
| 718 | /// guarantee MI cannot possibly be used to do a null check. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 719 | static bool SinkingPreventsImplicitNullCheck(MachineInstr &MI, |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 720 | const TargetInstrInfo *TII, |
| 721 | const TargetRegisterInfo *TRI) { |
Eugene Zelenko | 900b633 | 2017-08-29 22:32:07 +0000 | [diff] [blame] | 722 | using MachineBranchPredicate = TargetInstrInfo::MachineBranchPredicate; |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 723 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 724 | auto *MBB = MI.getParent(); |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 725 | if (MBB->pred_size() != 1) |
| 726 | return false; |
| 727 | |
| 728 | auto *PredMBB = *MBB->pred_begin(); |
| 729 | auto *PredBB = PredMBB->getBasicBlock(); |
| 730 | |
| 731 | // Frontends that don't use implicit null checks have no reason to emit |
| 732 | // branches with make.implicit metadata, and this function should always |
| 733 | // return false for them. |
| 734 | if (!PredBB || |
| 735 | !PredBB->getTerminator()->getMetadata(LLVMContext::MD_make_implicit)) |
| 736 | return false; |
| 737 | |
Chad Rosier | c27a18f | 2016-03-09 16:00:35 +0000 | [diff] [blame] | 738 | unsigned BaseReg; |
| 739 | int64_t Offset; |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 740 | if (!TII->getMemOpBaseRegImmOfs(MI, BaseReg, Offset, TRI)) |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 741 | return false; |
| 742 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 743 | if (!(MI.mayLoad() && !MI.isPredicable())) |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 744 | return false; |
| 745 | |
| 746 | MachineBranchPredicate MBP; |
Jacques Pienaar | 71c30a1 | 2016-07-15 14:41:04 +0000 | [diff] [blame] | 747 | if (TII->analyzeBranchPredicate(*PredMBB, MBP, false)) |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 748 | return false; |
| 749 | |
| 750 | return MBP.LHS.isReg() && MBP.RHS.isImm() && MBP.RHS.getImm() == 0 && |
| 751 | (MBP.Predicate == MachineBranchPredicate::PRED_NE || |
| 752 | MBP.Predicate == MachineBranchPredicate::PRED_EQ) && |
| 753 | MBP.LHS.getReg() == BaseReg; |
| 754 | } |
| 755 | |
Devang Patel | b94c9a4 | 2011-12-08 21:48:01 +0000 | [diff] [blame] | 756 | /// SinkInstruction - Determine whether it is safe to sink the specified machine |
| 757 | /// instruction out of its current block into a successor. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 758 | bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore, |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 759 | AllSuccsCache &AllSuccessors) { |
Fiona Glaser | 44a2f7a | 2016-03-29 22:44:57 +0000 | [diff] [blame] | 760 | // Don't sink instructions that the target prefers not to sink. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 761 | if (!TII->shouldSink(MI)) |
Devang Patel | b94c9a4 | 2011-12-08 21:48:01 +0000 | [diff] [blame] | 762 | return false; |
| 763 | |
| 764 | // Check if it's safe to move the instruction. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 765 | if (!MI.isSafeToMove(AA, SawStore)) |
Devang Patel | b94c9a4 | 2011-12-08 21:48:01 +0000 | [diff] [blame] | 766 | return false; |
| 767 | |
Owen Anderson | d95b08a | 2015-10-09 18:06:13 +0000 | [diff] [blame] | 768 | // Convergent operations may not be made control-dependent on additional |
| 769 | // values. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 770 | if (MI.isConvergent()) |
Owen Anderson | 55313d2 | 2015-06-01 17:26:30 +0000 | [diff] [blame] | 771 | return false; |
| 772 | |
Sanjoy Das | 16901a3 | 2016-01-20 00:06:14 +0000 | [diff] [blame] | 773 | // Don't break implicit null checks. This is a performance heuristic, and not |
| 774 | // required for correctness. |
| 775 | if (SinkingPreventsImplicitNullCheck(MI, TII, TRI)) |
| 776 | return false; |
| 777 | |
Devang Patel | b94c9a4 | 2011-12-08 21:48:01 +0000 | [diff] [blame] | 778 | // FIXME: This should include support for sinking instructions within the |
| 779 | // block they are currently in to shorten the live ranges. We often get |
| 780 | // instructions sunk into the top of a large block, but it would be better to |
| 781 | // also sink them down before their first use in the block. This xform has to |
| 782 | // be careful not to *increase* register pressure though, e.g. sinking |
| 783 | // "x = y + z" down if it kills y and z would increase the live ranges of y |
| 784 | // and z and only shrink the live range of x. |
| 785 | |
| 786 | bool BreakPHIEdge = false; |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 787 | MachineBasicBlock *ParentBlock = MI.getParent(); |
Arnaud A. de Grandmaison | c8a694f | 2015-06-16 08:57:21 +0000 | [diff] [blame] | 788 | MachineBasicBlock *SuccToSinkTo = |
| 789 | FindSuccToSinkTo(MI, ParentBlock, BreakPHIEdge, AllSuccessors); |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 790 | |
Chris Lattner | 6ec7827 | 2008-01-05 01:39:17 +0000 | [diff] [blame] | 791 | // If there are no outputs, it must have side-effects. |
Craig Topper | c0196b1 | 2014-04-14 00:51:57 +0000 | [diff] [blame] | 792 | if (!SuccToSinkTo) |
Chris Lattner | 6ec7827 | 2008-01-05 01:39:17 +0000 | [diff] [blame] | 793 | return false; |
Evan Cheng | 2510436 | 2009-02-15 08:36:12 +0000 | [diff] [blame] | 794 | |
Daniel Dunbar | ef5a438 | 2010-06-23 00:48:25 +0000 | [diff] [blame] | 795 | // If the instruction to move defines a dead physical register which is live |
| 796 | // when leaving the basic block, don't move it because it could turn into a |
| 797 | // "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>) |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 798 | for (unsigned I = 0, E = MI.getNumOperands(); I != E; ++I) { |
| 799 | const MachineOperand &MO = MI.getOperand(I); |
Bill Wendling | e41e40f | 2010-06-25 20:48:10 +0000 | [diff] [blame] | 800 | if (!MO.isReg()) continue; |
| 801 | unsigned Reg = MO.getReg(); |
| 802 | if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; |
| 803 | if (SuccToSinkTo->isLiveIn(Reg)) |
Bill Wendling | f82aea6 | 2010-06-03 07:54:20 +0000 | [diff] [blame] | 804 | return false; |
Bill Wendling | e41e40f | 2010-06-25 20:48:10 +0000 | [diff] [blame] | 805 | } |
Bill Wendling | f82aea6 | 2010-06-03 07:54:20 +0000 | [diff] [blame] | 806 | |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 807 | DEBUG(dbgs() << "Sink instr " << MI << "\tinto block " << *SuccToSinkTo); |
Bill Wendling | 7ee730e | 2010-06-02 23:04:26 +0000 | [diff] [blame] | 808 | |
Will Dietz | 5cb7f4e | 2013-10-14 16:57:17 +0000 | [diff] [blame] | 809 | // If the block has multiple predecessors, this is a critical edge. |
| 810 | // Decide if we can sink along it or need to break the edge. |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 811 | if (SuccToSinkTo->pred_size() > 1) { |
Jakob Stoklund Olesen | 20b71e2 | 2010-04-13 19:06:14 +0000 | [diff] [blame] | 812 | // We cannot sink a load across a critical edge - there may be stores in |
| 813 | // other code paths. |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 814 | bool TryBreak = false; |
Jakob Stoklund Olesen | 20b71e2 | 2010-04-13 19:06:14 +0000 | [diff] [blame] | 815 | bool store = true; |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 816 | if (!MI.isSafeToMove(AA, store)) { |
Evan Cheng | e5af930 | 2010-08-19 23:33:02 +0000 | [diff] [blame] | 817 | DEBUG(dbgs() << " *** NOTE: Won't sink load along critical edge.\n"); |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 818 | TryBreak = true; |
Jakob Stoklund Olesen | 20b71e2 | 2010-04-13 19:06:14 +0000 | [diff] [blame] | 819 | } |
| 820 | |
| 821 | // We don't want to sink across a critical edge if we don't dominate the |
| 822 | // successor. We could be introducing calculations to new code paths. |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 823 | if (!TryBreak && !DT->dominates(ParentBlock, SuccToSinkTo)) { |
Evan Cheng | e5af930 | 2010-08-19 23:33:02 +0000 | [diff] [blame] | 824 | DEBUG(dbgs() << " *** NOTE: Critical edge found\n"); |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 825 | TryBreak = true; |
Jakob Stoklund Olesen | 20b71e2 | 2010-04-13 19:06:14 +0000 | [diff] [blame] | 826 | } |
| 827 | |
Jakob Stoklund Olesen | cdc3df4 | 2010-04-15 23:41:02 +0000 | [diff] [blame] | 828 | // Don't sink instructions into a loop. |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 829 | if (!TryBreak && LI->isLoopHeader(SuccToSinkTo)) { |
Evan Cheng | e5af930 | 2010-08-19 23:33:02 +0000 | [diff] [blame] | 830 | DEBUG(dbgs() << " *** NOTE: Loop header found\n"); |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 831 | TryBreak = true; |
Jakob Stoklund Olesen | cdc3df4 | 2010-04-15 23:41:02 +0000 | [diff] [blame] | 832 | } |
| 833 | |
Jakob Stoklund Olesen | 20b71e2 | 2010-04-13 19:06:14 +0000 | [diff] [blame] | 834 | // Otherwise we are OK with sinking along a critical edge. |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 835 | if (!TryBreak) |
| 836 | DEBUG(dbgs() << "Sinking along critical edge.\n"); |
| 837 | else { |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 838 | // Mark this edge as to be split. |
| 839 | // If the edge can actually be split, the next iteration of the main loop |
| 840 | // will sink MI in the newly created block. |
| 841 | bool Status = |
| 842 | PostponeSplitCriticalEdge(MI, ParentBlock, SuccToSinkTo, BreakPHIEdge); |
| 843 | if (!Status) |
Evan Cheng | e53ab6d | 2010-09-17 22:28:18 +0000 | [diff] [blame] | 844 | DEBUG(dbgs() << " *** PUNTING: Not legal or profitable to " |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 845 | "break critical edge\n"); |
| 846 | // The instruction will not be sunk this time. |
| 847 | return false; |
Evan Cheng | ae9939c | 2010-08-19 17:33:11 +0000 | [diff] [blame] | 848 | } |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 849 | } |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 850 | |
Evan Cheng | 2031b76 | 2010-09-20 19:12:55 +0000 | [diff] [blame] | 851 | if (BreakPHIEdge) { |
| 852 | // BreakPHIEdge is true if all the uses are in the successor MBB being |
| 853 | // sunken into and they are all PHI nodes. In this case, machine-sink must |
| 854 | // break the critical edge first. |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 855 | bool Status = PostponeSplitCriticalEdge(MI, ParentBlock, |
| 856 | SuccToSinkTo, BreakPHIEdge); |
| 857 | if (!Status) |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 858 | DEBUG(dbgs() << " *** PUNTING: Not legal or profitable to " |
| 859 | "break critical edge\n"); |
Quentin Colombet | 5cded89 | 2014-08-11 23:52:01 +0000 | [diff] [blame] | 860 | // The instruction will not be sunk this time. |
| 861 | return false; |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 862 | } |
| 863 | |
Bill Wendling | 7ee730e | 2010-06-02 23:04:26 +0000 | [diff] [blame] | 864 | // Determine where to insert into. Skip phi nodes. |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 865 | MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin(); |
Evan Cheng | b339f3d | 2010-09-18 06:42:17 +0000 | [diff] [blame] | 866 | while (InsertPos != SuccToSinkTo->end() && InsertPos->isPHI()) |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 867 | ++InsertPos; |
Jim Grosbach | 01edd68 | 2010-06-03 23:49:57 +0000 | [diff] [blame] | 868 | |
Devang Patel | 9de7a7d | 2011-09-07 00:07:58 +0000 | [diff] [blame] | 869 | // collect matching debug values. |
| 870 | SmallVector<MachineInstr *, 2> DbgValuesToSink; |
| 871 | collectDebugValues(MI, DbgValuesToSink); |
| 872 | |
Paul Robinson | 8bd9d6a | 2017-12-09 00:17:01 +0000 | [diff] [blame] | 873 | // Merge or erase debug location to ensure consistent stepping in profilers |
| 874 | // and debuggers. |
| 875 | if (!SuccToSinkTo->empty() && InsertPos != SuccToSinkTo->end()) |
| 876 | MI.setDebugLoc(DILocation::getMergedLocation(MI.getDebugLoc(), |
| 877 | InsertPos->getDebugLoc())); |
| 878 | else |
| 879 | MI.setDebugLoc(DebugLoc()); |
| 880 | |
| 881 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 882 | // Move the instruction. |
| 883 | SuccToSinkTo->splice(InsertPos, ParentBlock, MI, |
| 884 | ++MachineBasicBlock::iterator(MI)); |
Dan Gohman | c90f51c | 2010-05-13 20:34:42 +0000 | [diff] [blame] | 885 | |
Paul Robinson | 8bd9d6a | 2017-12-09 00:17:01 +0000 | [diff] [blame] | 886 | // Move previously adjacent debug value instructions to the insert position. |
Craig Topper | e1c1d36 | 2013-07-03 05:11:49 +0000 | [diff] [blame] | 887 | for (SmallVectorImpl<MachineInstr *>::iterator DBI = DbgValuesToSink.begin(), |
Devang Patel | 9de7a7d | 2011-09-07 00:07:58 +0000 | [diff] [blame] | 888 | DBE = DbgValuesToSink.end(); DBI != DBE; ++DBI) { |
| 889 | MachineInstr *DbgMI = *DBI; |
| 890 | SuccToSinkTo->splice(InsertPos, ParentBlock, DbgMI, |
| 891 | ++MachineBasicBlock::iterator(DbgMI)); |
| 892 | } |
| 893 | |
Juergen Ributzka | 4bea494 | 2014-09-04 02:07:36 +0000 | [diff] [blame] | 894 | // Conservatively, clear any kill flags, since it's possible that they are no |
| 895 | // longer correct. |
Pete Cooper | 85b1c48 | 2015-05-08 17:54:32 +0000 | [diff] [blame] | 896 | // Note that we have to clear the kill flags for any register this instruction |
| 897 | // uses as we may sink over another instruction which currently kills the |
| 898 | // used registers. |
Duncan P. N. Exon Smith | cb38ffa | 2016-07-01 00:11:48 +0000 | [diff] [blame] | 899 | for (MachineOperand &MO : MI.operands()) { |
Pete Cooper | 85b1c48 | 2015-05-08 17:54:32 +0000 | [diff] [blame] | 900 | if (MO.isReg() && MO.isUse()) |
Matthias Braun | 352b89c | 2015-05-16 03:11:07 +0000 | [diff] [blame] | 901 | RegsToClearKillFlags.set(MO.getReg()); // Remember to clear kill flags. |
Pete Cooper | 85b1c48 | 2015-05-08 17:54:32 +0000 | [diff] [blame] | 902 | } |
Dan Gohman | c90f51c | 2010-05-13 20:34:42 +0000 | [diff] [blame] | 903 | |
Chris Lattner | f3edc09 | 2008-01-04 07:36:53 +0000 | [diff] [blame] | 904 | return true; |
| 905 | } |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 906 | |
| 907 | //===----------------------------------------------------------------------===// |
| 908 | // This pass is not intended to be a replacement or a complete alternative |
| 909 | // for the pre-ra machine sink pass. It is only designed to sink COPY |
| 910 | // instructions which should be handled after RA. |
| 911 | // |
| 912 | // This pass sinks COPY instructions into a successor block, if the COPY is not |
| 913 | // used in the current block and the COPY is live-in to a single successor |
| 914 | // (i.e., doesn't require the COPY to be duplicated). This avoids executing the |
| 915 | // copy on paths where their results aren't needed. This also exposes |
| 916 | // additional opportunites for dead copy elimination and shrink wrapping. |
| 917 | // |
| 918 | // These copies were either not handled by or are inserted after the MachineSink |
| 919 | // pass. As an example of the former case, the MachineSink pass cannot sink |
| 920 | // COPY instructions with allocatable source registers; for AArch64 these type |
| 921 | // of copy instructions are frequently used to move function parameters (PhyReg) |
| 922 | // into virtual registers in the entry block. |
| 923 | // |
| 924 | // For the machine IR below, this pass will sink %w19 in the entry into its |
| 925 | // successor (%bb.1) because %w19 is only live-in in %bb.1. |
| 926 | // %bb.0: |
| 927 | // %wzr = SUBSWri %w1, 1 |
| 928 | // %w19 = COPY %w0 |
| 929 | // Bcc 11, %bb.2 |
| 930 | // %bb.1: |
| 931 | // Live Ins: %w19 |
| 932 | // BL @fun |
| 933 | // %w0 = ADDWrr %w0, %w19 |
| 934 | // RET %w0 |
| 935 | // %bb.2: |
| 936 | // %w0 = COPY %wzr |
| 937 | // RET %w0 |
| 938 | // As we sink %w19 (CSR in AArch64) into %bb.1, the shrink-wrapping pass will be |
| 939 | // able to see %bb.0 as a candidate. |
| 940 | //===----------------------------------------------------------------------===// |
| 941 | namespace { |
| 942 | |
| 943 | class PostRAMachineSinking : public MachineFunctionPass { |
| 944 | public: |
| 945 | bool runOnMachineFunction(MachineFunction &MF) override; |
| 946 | |
| 947 | static char ID; |
| 948 | PostRAMachineSinking() : MachineFunctionPass(ID) {} |
| 949 | StringRef getPassName() const override { return "PostRA Machine Sink"; } |
| 950 | |
Jun Bum Lim | f90fe70 | 2018-03-28 19:56:26 +0000 | [diff] [blame] | 951 | void getAnalysisUsage(AnalysisUsage &AU) const override { |
| 952 | AU.setPreservesCFG(); |
| 953 | MachineFunctionPass::getAnalysisUsage(AU); |
| 954 | } |
| 955 | |
Jun Bum Lim | 7ab1b32 | 2018-04-03 18:17:34 +0000 | [diff] [blame] | 956 | MachineFunctionProperties getRequiredProperties() const override { |
| 957 | return MachineFunctionProperties().set( |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 958 | MachineFunctionProperties::Property::NoVRegs); |
Jun Bum Lim | 7ab1b32 | 2018-04-03 18:17:34 +0000 | [diff] [blame] | 959 | } |
| 960 | |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 961 | private: |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 962 | /// Track which register units have been modified and used. |
| 963 | LiveRegUnits ModifiedRegUnits, UsedRegUnits; |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 964 | |
| 965 | /// Sink Copy instructions unused in the same block close to their uses in |
| 966 | /// successors. |
| 967 | bool tryToSinkCopy(MachineBasicBlock &BB, MachineFunction &MF, |
| 968 | const TargetRegisterInfo *TRI, const TargetInstrInfo *TII); |
| 969 | }; |
| 970 | } // namespace |
| 971 | |
| 972 | char PostRAMachineSinking::ID = 0; |
| 973 | char &llvm::PostRAMachineSinkingID = PostRAMachineSinking::ID; |
| 974 | |
| 975 | INITIALIZE_PASS(PostRAMachineSinking, "postra-machine-sink", |
| 976 | "PostRA Machine Sink", false, false) |
| 977 | |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 978 | static bool aliasWithRegsInLiveIn(MachineBasicBlock &MBB, unsigned Reg, |
| 979 | const TargetRegisterInfo *TRI) { |
| 980 | LiveRegUnits LiveInRegUnits(*TRI); |
| 981 | LiveInRegUnits.addLiveIns(MBB); |
| 982 | return !LiveInRegUnits.available(Reg); |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 983 | } |
| 984 | |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 985 | static MachineBasicBlock * |
| 986 | getSingleLiveInSuccBB(MachineBasicBlock &CurBB, |
Jun Bum Lim | 9e3e14b | 2018-04-27 19:59:20 +0000 | [diff] [blame] | 987 | const SmallPtrSetImpl<MachineBasicBlock *> &SinkableBBs, |
| 988 | unsigned Reg, const TargetRegisterInfo *TRI) { |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 989 | // Try to find a single sinkable successor in which Reg is live-in. |
| 990 | MachineBasicBlock *BB = nullptr; |
| 991 | for (auto *SI : SinkableBBs) { |
Jun Bum Lim | 9e3e14b | 2018-04-27 19:59:20 +0000 | [diff] [blame] | 992 | if (aliasWithRegsInLiveIn(*SI, Reg, TRI)) { |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 993 | // If BB is set here, Reg is live-in to at least two sinkable successors, |
| 994 | // so quit. |
| 995 | if (BB) |
| 996 | return nullptr; |
| 997 | BB = SI; |
| 998 | } |
| 999 | } |
| 1000 | // Reg is not live-in to any sinkable successors. |
| 1001 | if (!BB) |
| 1002 | return nullptr; |
| 1003 | |
| 1004 | // Check if any register aliased with Reg is live-in in other successors. |
| 1005 | for (auto *SI : CurBB.successors()) { |
Jun Bum Lim | 9e3e14b | 2018-04-27 19:59:20 +0000 | [diff] [blame] | 1006 | if (!SinkableBBs.count(SI) && aliasWithRegsInLiveIn(*SI, Reg, TRI)) |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1007 | return nullptr; |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1008 | } |
| 1009 | return BB; |
| 1010 | } |
| 1011 | |
Jun Bum Lim | 9e3e14b | 2018-04-27 19:59:20 +0000 | [diff] [blame] | 1012 | static MachineBasicBlock * |
| 1013 | getSingleLiveInSuccBB(MachineBasicBlock &CurBB, |
| 1014 | const SmallPtrSetImpl<MachineBasicBlock *> &SinkableBBs, |
| 1015 | ArrayRef<unsigned> DefedRegsInCopy, |
| 1016 | const TargetRegisterInfo *TRI) { |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1017 | MachineBasicBlock *SingleBB = nullptr; |
| 1018 | for (auto DefReg : DefedRegsInCopy) { |
| 1019 | MachineBasicBlock *BB = |
| 1020 | getSingleLiveInSuccBB(CurBB, SinkableBBs, DefReg, TRI); |
| 1021 | if (!BB || (SingleBB && SingleBB != BB)) |
| 1022 | return nullptr; |
| 1023 | SingleBB = BB; |
| 1024 | } |
| 1025 | return SingleBB; |
| 1026 | } |
| 1027 | |
| 1028 | static void clearKillFlags(MachineInstr *MI, MachineBasicBlock &CurBB, |
| 1029 | SmallVectorImpl<unsigned> &UsedOpsInCopy, |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1030 | LiveRegUnits &UsedRegUnits, |
| 1031 | const TargetRegisterInfo *TRI) { |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1032 | for (auto U : UsedOpsInCopy) { |
| 1033 | MachineOperand &MO = MI->getOperand(U); |
| 1034 | unsigned SrcReg = MO.getReg(); |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1035 | if (!UsedRegUnits.available(SrcReg)) { |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1036 | MachineBasicBlock::iterator NI = std::next(MI->getIterator()); |
| 1037 | for (MachineInstr &UI : make_range(NI, CurBB.end())) { |
| 1038 | if (UI.killsRegister(SrcReg, TRI)) { |
| 1039 | UI.clearRegisterKills(SrcReg, TRI); |
| 1040 | MO.setIsKill(true); |
| 1041 | break; |
| 1042 | } |
| 1043 | } |
| 1044 | } |
| 1045 | } |
| 1046 | } |
| 1047 | |
| 1048 | static void updateLiveIn(MachineInstr *MI, MachineBasicBlock *SuccBB, |
| 1049 | SmallVectorImpl<unsigned> &UsedOpsInCopy, |
| 1050 | SmallVectorImpl<unsigned> &DefedRegsInCopy) { |
| 1051 | for (auto DefReg : DefedRegsInCopy) |
| 1052 | SuccBB->removeLiveIn(DefReg); |
| 1053 | for (auto U : UsedOpsInCopy) { |
| 1054 | unsigned Reg = MI->getOperand(U).getReg(); |
| 1055 | if (!SuccBB->isLiveIn(Reg)) |
| 1056 | SuccBB->addLiveIn(Reg); |
| 1057 | } |
| 1058 | } |
| 1059 | |
| 1060 | static bool hasRegisterDependency(MachineInstr *MI, |
| 1061 | SmallVectorImpl<unsigned> &UsedOpsInCopy, |
| 1062 | SmallVectorImpl<unsigned> &DefedRegsInCopy, |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1063 | LiveRegUnits &ModifiedRegUnits, |
| 1064 | LiveRegUnits &UsedRegUnits) { |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1065 | bool HasRegDependency = false; |
| 1066 | for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { |
| 1067 | MachineOperand &MO = MI->getOperand(i); |
| 1068 | if (!MO.isReg()) |
| 1069 | continue; |
| 1070 | unsigned Reg = MO.getReg(); |
| 1071 | if (!Reg) |
| 1072 | continue; |
| 1073 | if (MO.isDef()) { |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1074 | if (!ModifiedRegUnits.available(Reg) || !UsedRegUnits.available(Reg)) { |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1075 | HasRegDependency = true; |
| 1076 | break; |
| 1077 | } |
| 1078 | DefedRegsInCopy.push_back(Reg); |
| 1079 | |
| 1080 | // FIXME: instead of isUse(), readsReg() would be a better fix here, |
| 1081 | // For example, we can ignore modifications in reg with undef. However, |
| 1082 | // it's not perfectly clear if skipping the internal read is safe in all |
| 1083 | // other targets. |
| 1084 | } else if (MO.isUse()) { |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1085 | if (!ModifiedRegUnits.available(Reg)) { |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1086 | HasRegDependency = true; |
| 1087 | break; |
| 1088 | } |
| 1089 | UsedOpsInCopy.push_back(i); |
| 1090 | } |
| 1091 | } |
| 1092 | return HasRegDependency; |
| 1093 | } |
| 1094 | |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1095 | bool PostRAMachineSinking::tryToSinkCopy(MachineBasicBlock &CurBB, |
| 1096 | MachineFunction &MF, |
| 1097 | const TargetRegisterInfo *TRI, |
| 1098 | const TargetInstrInfo *TII) { |
Jun Bum Lim | 9e3e14b | 2018-04-27 19:59:20 +0000 | [diff] [blame] | 1099 | SmallPtrSet<MachineBasicBlock *, 2> SinkableBBs; |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1100 | // FIXME: For now, we sink only to a successor which has a single predecessor |
| 1101 | // so that we can directly sink COPY instructions to the successor without |
| 1102 | // adding any new block or branch instruction. |
| 1103 | for (MachineBasicBlock *SI : CurBB.successors()) |
| 1104 | if (!SI->livein_empty() && SI->pred_size() == 1) |
Jun Bum Lim | 9e3e14b | 2018-04-27 19:59:20 +0000 | [diff] [blame] | 1105 | SinkableBBs.insert(SI); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1106 | |
| 1107 | if (SinkableBBs.empty()) |
| 1108 | return false; |
| 1109 | |
| 1110 | bool Changed = false; |
| 1111 | |
| 1112 | // Track which registers have been modified and used between the end of the |
| 1113 | // block and the current instruction. |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1114 | ModifiedRegUnits.clear(); |
| 1115 | UsedRegUnits.clear(); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1116 | |
| 1117 | for (auto I = CurBB.rbegin(), E = CurBB.rend(); I != E;) { |
| 1118 | MachineInstr *MI = &*I; |
| 1119 | ++I; |
| 1120 | |
| 1121 | // Do not move any instruction across function call. |
| 1122 | if (MI->isCall()) |
| 1123 | return false; |
| 1124 | |
| 1125 | if (!MI->isCopy() || !MI->getOperand(0).isRenamable()) { |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1126 | LiveRegUnits::accumulateUsedDefed(*MI, ModifiedRegUnits, UsedRegUnits, |
| 1127 | TRI); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1128 | continue; |
| 1129 | } |
| 1130 | |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1131 | // Track the operand index for use in Copy. |
| 1132 | SmallVector<unsigned, 2> UsedOpsInCopy; |
| 1133 | // Track the register number defed in Copy. |
| 1134 | SmallVector<unsigned, 2> DefedRegsInCopy; |
| 1135 | |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1136 | // Don't sink the COPY if it would violate a register dependency. |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1137 | if (hasRegisterDependency(MI, UsedOpsInCopy, DefedRegsInCopy, |
| 1138 | ModifiedRegUnits, UsedRegUnits)) { |
| 1139 | LiveRegUnits::accumulateUsedDefed(*MI, ModifiedRegUnits, UsedRegUnits, |
| 1140 | TRI); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1141 | continue; |
| 1142 | } |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1143 | assert((!UsedOpsInCopy.empty() && !DefedRegsInCopy.empty()) && |
| 1144 | "Unexpect SrcReg or DefReg"); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1145 | MachineBasicBlock *SuccBB = |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1146 | getSingleLiveInSuccBB(CurBB, SinkableBBs, DefedRegsInCopy, TRI); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1147 | // Don't sink if we cannot find a single sinkable successor in which Reg |
| 1148 | // is live-in. |
| 1149 | if (!SuccBB) { |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1150 | LiveRegUnits::accumulateUsedDefed(*MI, ModifiedRegUnits, UsedRegUnits, |
| 1151 | TRI); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1152 | continue; |
| 1153 | } |
| 1154 | assert((SuccBB->pred_size() == 1 && *SuccBB->pred_begin() == &CurBB) && |
| 1155 | "Unexpected predecessor"); |
| 1156 | |
| 1157 | // Clear the kill flag if SrcReg is killed between MI and the end of the |
| 1158 | // block. |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1159 | clearKillFlags(MI, CurBB, UsedOpsInCopy, UsedRegUnits, TRI); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1160 | MachineBasicBlock::iterator InsertPos = SuccBB->getFirstNonPHI(); |
| 1161 | SuccBB->splice(InsertPos, &CurBB, MI); |
Jun Bum Lim | 06073bf | 2018-04-13 14:23:09 +0000 | [diff] [blame] | 1162 | updateLiveIn(MI, SuccBB, UsedOpsInCopy, DefedRegsInCopy); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1163 | |
| 1164 | Changed = true; |
| 1165 | ++NumPostRACopySink; |
| 1166 | } |
| 1167 | return Changed; |
| 1168 | } |
| 1169 | |
| 1170 | bool PostRAMachineSinking::runOnMachineFunction(MachineFunction &MF) { |
| 1171 | bool Changed = false; |
| 1172 | const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo(); |
| 1173 | const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo(); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1174 | |
Jun Bum Lim | 47aece1 | 2018-04-27 18:44:37 +0000 | [diff] [blame] | 1175 | ModifiedRegUnits.init(*TRI); |
| 1176 | UsedRegUnits.init(*TRI); |
Jun Bum Lim | 2ecb7ba | 2018-03-22 20:06:47 +0000 | [diff] [blame] | 1177 | for (auto &BB : MF) |
| 1178 | Changed |= tryToSinkCopy(BB, MF, TRI, TII); |
| 1179 | |
| 1180 | return Changed; |
| 1181 | } |