Hsiangkai Wang | 2532ac8 | 2018-08-17 15:22:04 +0000 | [diff] [blame] | 1 | //===- llvm/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp -------------===// |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 2 | // |
Chandler Carruth | 2946cd7 | 2019-01-19 08:50:56 +0000 | [diff] [blame] | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
Yonghong Song | 61b189e | 2018-12-18 23:10:17 +0000 | [diff] [blame] | 9 | #include "llvm/CodeGen/DbgEntityHistoryCalculator.h" |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 10 | #include "llvm/ADT/BitVector.h" |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 11 | #include "llvm/ADT/STLExtras.h" |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 12 | #include "llvm/ADT/SmallSet.h" |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 13 | #include "llvm/ADT/SmallVector.h" |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 14 | #include "llvm/CodeGen/MachineBasicBlock.h" |
| 15 | #include "llvm/CodeGen/MachineFunction.h" |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 16 | #include "llvm/CodeGen/MachineInstr.h" |
| 17 | #include "llvm/CodeGen/MachineOperand.h" |
David Blaikie | b3bde2e | 2017-11-17 01:07:10 +0000 | [diff] [blame] | 18 | #include "llvm/CodeGen/TargetLowering.h" |
| 19 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 20 | #include "llvm/CodeGen/TargetSubtargetInfo.h" |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 21 | #include "llvm/IR/DebugInfoMetadata.h" |
| 22 | #include "llvm/IR/DebugLoc.h" |
| 23 | #include "llvm/MC/MCRegisterInfo.h" |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 24 | #include "llvm/Support/Debug.h" |
Benjamin Kramer | 16132e6 | 2015-03-23 18:07:13 +0000 | [diff] [blame] | 25 | #include "llvm/Support/raw_ostream.h" |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 26 | #include <cassert> |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 27 | #include <map> |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 28 | #include <utility> |
| 29 | |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 30 | using namespace llvm; |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 31 | |
| 32 | #define DEBUG_TYPE "dwarfdebug" |
| 33 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 34 | namespace { |
| 35 | using EntryIndex = DbgValueHistoryMap::EntryIndex; |
| 36 | } |
| 37 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 38 | // If @MI is a DBG_VALUE with debug value described by a |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 39 | // defined register, returns the number of this register. |
| 40 | // In the other case, returns 0. |
| 41 | static unsigned isDescribedByReg(const MachineInstr &MI) { |
| 42 | assert(MI.isDebugValue()); |
Adrian Prantl | 87b7eb9 | 2014-10-01 18:55:02 +0000 | [diff] [blame] | 43 | assert(MI.getNumOperands() == 4); |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 44 | // If location of variable is described using a register (directly or |
Dominic Chen | 6ba1965 | 2016-08-11 17:52:40 +0000 | [diff] [blame] | 45 | // indirectly), this register is always a first operand. |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 46 | return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0; |
| 47 | } |
| 48 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 49 | bool DbgValueHistoryMap::startDbgValue(InlinedEntity Var, |
| 50 | const MachineInstr &MI, |
| 51 | EntryIndex &NewIndex) { |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 52 | // Instruction range should start with a DBG_VALUE instruction for the |
| 53 | // variable. |
Adrian Prantl | 87b7eb9 | 2014-10-01 18:55:02 +0000 | [diff] [blame] | 54 | assert(MI.isDebugValue() && "not a DBG_VALUE"); |
David Stenberg | 6feef56 | 2019-04-10 09:07:43 +0000 | [diff] [blame] | 55 | auto &Entries = VarEntries[Var]; |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 56 | if (!Entries.empty() && Entries.back().isDbgValue() && |
| 57 | !Entries.back().isClosed() && |
| 58 | Entries.back().getInstr()->isIdenticalTo(MI)) { |
Nicola Zaghen | d34e60c | 2018-05-14 12:53:11 +0000 | [diff] [blame] | 59 | LLVM_DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n" |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 60 | << "\t" << Entries.back().getInstr() << "\t" << MI |
David Stenberg | 3739979 | 2019-04-10 09:07:32 +0000 | [diff] [blame] | 61 | << "\n"); |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 62 | return false; |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 63 | } |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 64 | Entries.emplace_back(&MI, Entry::DbgValue); |
| 65 | NewIndex = Entries.size() - 1; |
| 66 | return true; |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 67 | } |
| 68 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 69 | EntryIndex DbgValueHistoryMap::startClobber(InlinedEntity Var, |
| 70 | const MachineInstr &MI) { |
David Stenberg | 6feef56 | 2019-04-10 09:07:43 +0000 | [diff] [blame] | 71 | auto &Entries = VarEntries[Var]; |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 72 | Entries.emplace_back(&MI, Entry::Clobber); |
| 73 | return Entries.size() - 1; |
David Stenberg | 3739979 | 2019-04-10 09:07:32 +0000 | [diff] [blame] | 74 | } |
| 75 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 76 | void DbgValueHistoryMap::Entry::endEntry(EntryIndex Index) { |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 77 | // For now, instruction ranges are not allowed to cross basic block |
| 78 | // boundaries. |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 79 | assert(isDbgValue() && "Setting end index for non-debug value"); |
| 80 | assert(!isClosed() && "End index has already been set"); |
| 81 | EndIndex = Index; |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 84 | unsigned DbgValueHistoryMap::getRegisterForVar(InlinedEntity Var) const { |
David Stenberg | 6feef56 | 2019-04-10 09:07:43 +0000 | [diff] [blame] | 85 | const auto &I = VarEntries.find(Var); |
| 86 | if (I == VarEntries.end()) |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 87 | return 0; |
David Stenberg | 6feef56 | 2019-04-10 09:07:43 +0000 | [diff] [blame] | 88 | const auto &Entries = I->second; |
| 89 | if (Entries.empty() || Entries.back().isClosed()) |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 90 | return 0; |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 91 | if (Entries.back().isClobber()) |
| 92 | return 0; |
| 93 | return isDescribedByReg(*Entries.back().getInstr()); |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 94 | } |
| 95 | |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 96 | void DbgLabelInstrMap::addInstr(InlinedEntity Label, const MachineInstr &MI) { |
Hsiangkai Wang | 2532ac8 | 2018-08-17 15:22:04 +0000 | [diff] [blame] | 97 | assert(MI.isDebugLabel() && "not a DBG_LABEL"); |
| 98 | LabelInstr[Label] = &MI; |
| 99 | } |
| 100 | |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 101 | namespace { |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 102 | |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 103 | // Maps physreg numbers to the variables they describe. |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 104 | using InlinedEntity = DbgValueHistoryMap::InlinedEntity; |
| 105 | using RegDescribedVarsMap = std::map<unsigned, SmallVector<InlinedEntity, 1>>; |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 106 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 107 | // Keeps track of the debug value entries that are currently live for each |
| 108 | // inlined entity. As the history map entries are stored in a SmallVector, they |
| 109 | // may be moved at insertion of new entries, so store indices rather than |
| 110 | // pointers. |
| 111 | using DbgValueEntriesMap = std::map<InlinedEntity, SmallSet<EntryIndex, 1>>; |
| 112 | |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 113 | } // end anonymous namespace |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 114 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 115 | // Claim that @Var is not described by @RegNo anymore. |
Duncan P. N. Exon Smith | 62e0f45 | 2015-04-15 22:29:27 +0000 | [diff] [blame] | 116 | static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 117 | InlinedEntity Var) { |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 118 | const auto &I = RegVars.find(RegNo); |
| 119 | assert(RegNo != 0U && I != RegVars.end()); |
| 120 | auto &VarSet = I->second; |
Eugene Zelenko | 6e07bfd | 2017-08-17 21:26:39 +0000 | [diff] [blame] | 121 | const auto &VarPos = llvm::find(VarSet, Var); |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 122 | assert(VarPos != VarSet.end()); |
| 123 | VarSet.erase(VarPos); |
| 124 | // Don't keep empty sets in a map to keep it as small as possible. |
| 125 | if (VarSet.empty()) |
| 126 | RegVars.erase(I); |
| 127 | } |
| 128 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 129 | // Claim that @Var is now described by @RegNo. |
Duncan P. N. Exon Smith | 62e0f45 | 2015-04-15 22:29:27 +0000 | [diff] [blame] | 130 | static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo, |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 131 | InlinedEntity Var) { |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 132 | assert(RegNo != 0U); |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 133 | auto &VarSet = RegVars[RegNo]; |
David Majnemer | 0d955d0 | 2016-08-11 22:21:41 +0000 | [diff] [blame] | 134 | assert(!is_contained(VarSet, Var)); |
Alexey Samsonov | bb2990d | 2014-05-27 23:09:50 +0000 | [diff] [blame] | 135 | VarSet.push_back(Var); |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 136 | } |
| 137 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 138 | static void clobberRegEntries(InlinedEntity Var, unsigned RegNo, |
| 139 | const MachineInstr &ClobberingInstr, |
| 140 | DbgValueEntriesMap &LiveEntries, |
| 141 | DbgValueHistoryMap &HistMap) { |
| 142 | EntryIndex ClobberIndex = HistMap.startClobber(Var, ClobberingInstr); |
| 143 | |
| 144 | // TODO: Close all preceding live entries that are clobbered by this |
| 145 | // instruction. |
| 146 | EntryIndex ValueIndex = ClobberIndex - 1; |
| 147 | auto &ValueEntry = HistMap.getEntry(Var, ValueIndex); |
| 148 | ValueEntry.endEntry(ClobberIndex); |
| 149 | LiveEntries[Var].erase(ValueIndex); |
| 150 | } |
| 151 | |
| 152 | /// Add a new debug value for \p Var. Closes all overlapping debug values. |
| 153 | static void handleNewDebugValue(InlinedEntity Var, const MachineInstr &DV, |
| 154 | RegDescribedVarsMap &RegVars, |
| 155 | DbgValueEntriesMap &LiveEntries, |
| 156 | DbgValueHistoryMap &HistMap) { |
| 157 | // TODO: We should track all registers which this variable is currently |
| 158 | // described by. |
| 159 | |
| 160 | if (unsigned PrevReg = HistMap.getRegisterForVar(Var)) |
| 161 | dropRegDescribedVar(RegVars, PrevReg, Var); |
| 162 | |
| 163 | EntryIndex NewIndex; |
| 164 | if (HistMap.startDbgValue(Var, DV, NewIndex)) { |
| 165 | // If we have created a new debug value entry, close all preceding |
| 166 | // live entries that overlap. |
| 167 | SmallVector<EntryIndex, 4> IndicesToErase; |
| 168 | const DIExpression *DIExpr = DV.getDebugExpression(); |
| 169 | for (auto Index : LiveEntries[Var]) { |
| 170 | auto &Entry = HistMap.getEntry(Var, Index); |
| 171 | assert(Entry.isDbgValue() && "Not a DBG_VALUE in LiveEntries"); |
| 172 | const MachineInstr &DV = *Entry.getInstr(); |
| 173 | if (DIExpr->fragmentsOverlap(DV.getDebugExpression())) { |
| 174 | IndicesToErase.push_back(Index); |
| 175 | Entry.endEntry(NewIndex); |
| 176 | } |
| 177 | } |
| 178 | // Drop all entries that have ended, and mark the new entry as live. |
| 179 | for (auto Index : IndicesToErase) |
| 180 | LiveEntries[Var].erase(Index); |
| 181 | LiveEntries[Var].insert(NewIndex); |
| 182 | } |
| 183 | |
| 184 | if (unsigned NewReg = isDescribedByReg(DV)) |
| 185 | addRegDescribedVar(RegVars, NewReg, Var); |
| 186 | } |
| 187 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 188 | // Terminate the location range for variables described by register at |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 189 | // @I by inserting @ClobberingInstr to their history. |
| 190 | static void clobberRegisterUses(RegDescribedVarsMap &RegVars, |
| 191 | RegDescribedVarsMap::iterator I, |
| 192 | DbgValueHistoryMap &HistMap, |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 193 | DbgValueEntriesMap &LiveEntries, |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 194 | const MachineInstr &ClobberingInstr) { |
| 195 | // Iterate over all variables described by this register and add this |
| 196 | // instruction to their history, clobbering it. |
| 197 | for (const auto &Var : I->second) |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 198 | clobberRegEntries(Var, I->first, ClobberingInstr, LiveEntries, HistMap); |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 199 | RegVars.erase(I); |
| 200 | } |
| 201 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 202 | // Terminate the location range for variables described by register |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 203 | // @RegNo by inserting @ClobberingInstr to their history. |
| 204 | static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo, |
| 205 | DbgValueHistoryMap &HistMap, |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 206 | DbgValueEntriesMap &LiveEntries, |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 207 | const MachineInstr &ClobberingInstr) { |
| 208 | const auto &I = RegVars.find(RegNo); |
| 209 | if (I == RegVars.end()) |
| 210 | return; |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 211 | clobberRegisterUses(RegVars, I, HistMap, LiveEntries, ClobberingInstr); |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 212 | } |
| 213 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 214 | // Returns the first instruction in @MBB which corresponds to |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 215 | // the function epilogue, or nullptr if @MBB doesn't contain an epilogue. |
| 216 | static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) { |
| 217 | auto LastMI = MBB.getLastNonDebugInstr(); |
| 218 | if (LastMI == MBB.end() || !LastMI->isReturn()) |
| 219 | return nullptr; |
| 220 | // Assume that epilogue starts with instruction having the same debug location |
| 221 | // as the return instruction. |
| 222 | DebugLoc LastLoc = LastMI->getDebugLoc(); |
| 223 | auto Res = LastMI; |
Duncan P. N. Exon Smith | 1872096 | 2016-09-11 18:51:28 +0000 | [diff] [blame] | 224 | for (MachineBasicBlock::const_reverse_iterator I = LastMI.getReverse(), |
| 225 | E = MBB.rend(); |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 226 | I != E; ++I) { |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 227 | if (I->getDebugLoc() != LastLoc) |
Duncan P. N. Exon Smith | 5bff511 | 2016-07-08 19:31:47 +0000 | [diff] [blame] | 228 | return &*Res; |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 229 | Res = &*I; |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 230 | } |
| 231 | // If all instructions have the same debug location, assume whole MBB is |
| 232 | // an epilogue. |
Duncan P. N. Exon Smith | 5bff511 | 2016-07-08 19:31:47 +0000 | [diff] [blame] | 233 | return &*MBB.begin(); |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 234 | } |
| 235 | |
Adrian Prantl | 5f8f34e4 | 2018-05-01 15:54:18 +0000 | [diff] [blame] | 236 | // Collect registers that are modified in the function body (their |
Adrian Prantl | 364d131 | 2014-08-06 18:41:24 +0000 | [diff] [blame] | 237 | // contents is changed outside of the prologue and epilogue). |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 238 | static void collectChangingRegs(const MachineFunction *MF, |
| 239 | const TargetRegisterInfo *TRI, |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 240 | BitVector &Regs) { |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 241 | for (const auto &MBB : *MF) { |
| 242 | auto FirstEpilogueInst = getFirstEpilogueInst(MBB); |
Adrian Prantl | e2d6375 | 2014-08-06 18:41:19 +0000 | [diff] [blame] | 243 | |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 244 | for (const auto &MI : MBB) { |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 245 | // Avoid looking at prologue or epilogue instructions. |
Adrian Prantl | e2d6375 | 2014-08-06 18:41:19 +0000 | [diff] [blame] | 246 | if (&MI == FirstEpilogueInst) |
| 247 | break; |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 248 | if (MI.getFlag(MachineInstr::FrameSetup)) |
| 249 | continue; |
| 250 | |
| 251 | // Look for register defs and register masks. Register masks are |
| 252 | // typically on calls and they clobber everything not in the mask. |
| 253 | for (const MachineOperand &MO : MI.operands()) { |
Dominic Chen | 6ba1965 | 2016-08-11 17:52:40 +0000 | [diff] [blame] | 254 | // Skip virtual registers since they are handled by the parent. |
| 255 | if (MO.isReg() && MO.isDef() && MO.getReg() && |
| 256 | !TRI->isVirtualRegister(MO.getReg())) { |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 257 | for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); |
| 258 | ++AI) |
| 259 | Regs.set(*AI); |
| 260 | } else if (MO.isRegMask()) { |
| 261 | Regs.setBitsNotInMask(MO.getRegMask()); |
| 262 | } |
| 263 | } |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 264 | } |
| 265 | } |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 266 | } |
| 267 | |
Hsiangkai Wang | 2532ac8 | 2018-08-17 15:22:04 +0000 | [diff] [blame] | 268 | void llvm::calculateDbgEntityHistory(const MachineFunction *MF, |
| 269 | const TargetRegisterInfo *TRI, |
| 270 | DbgValueHistoryMap &DbgValues, |
| 271 | DbgLabelInstrMap &DbgLabels) { |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 272 | BitVector ChangingRegs(TRI->getNumRegs()); |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 273 | collectChangingRegs(MF, TRI, ChangingRegs); |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 274 | |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 275 | const TargetLowering *TLI = MF->getSubtarget().getTargetLowering(); |
| 276 | unsigned SP = TLI->getStackPointerRegisterToSaveRestore(); |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 277 | RegDescribedVarsMap RegVars; |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 278 | DbgValueEntriesMap LiveEntries; |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 279 | for (const auto &MBB : *MF) { |
| 280 | for (const auto &MI : MBB) { |
Shiva Chen | 801bf7e | 2018-05-09 02:42:00 +0000 | [diff] [blame] | 281 | if (!MI.isDebugInstr()) { |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 282 | // Not a DBG_VALUE instruction. It may clobber registers which describe |
| 283 | // some variables. |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 284 | for (const MachineOperand &MO : MI.operands()) { |
| 285 | if (MO.isReg() && MO.isDef() && MO.getReg()) { |
Adrian Prantl | d9cd4d5 | 2017-06-01 21:14:58 +0000 | [diff] [blame] | 286 | // Ignore call instructions that claim to clobber SP. The AArch64 |
| 287 | // backend does this for aggregate function arguments. |
| 288 | if (MI.isCall() && MO.getReg() == SP) |
| 289 | continue; |
Dominic Chen | 6ba1965 | 2016-08-11 17:52:40 +0000 | [diff] [blame] | 290 | // If this is a virtual register, only clobber it since it doesn't |
| 291 | // have aliases. |
| 292 | if (TRI->isVirtualRegister(MO.getReg())) |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 293 | clobberRegisterUses(RegVars, MO.getReg(), DbgValues, LiveEntries, |
| 294 | MI); |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 295 | // If this is a register def operand, it may end a debug value |
| 296 | // range. |
Dominic Chen | 6ba1965 | 2016-08-11 17:52:40 +0000 | [diff] [blame] | 297 | else { |
| 298 | for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); |
| 299 | ++AI) |
| 300 | if (ChangingRegs.test(*AI)) |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 301 | clobberRegisterUses(RegVars, *AI, DbgValues, LiveEntries, MI); |
Dominic Chen | 6ba1965 | 2016-08-11 17:52:40 +0000 | [diff] [blame] | 302 | } |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 303 | } else if (MO.isRegMask()) { |
| 304 | // If this is a register mask operand, clobber all debug values in |
| 305 | // non-CSRs. |
Francis Visoiu Mistrih | b52e036 | 2017-05-17 01:07:53 +0000 | [diff] [blame] | 306 | for (unsigned I : ChangingRegs.set_bits()) { |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 307 | // Don't consider SP to be clobbered by register masks. |
| 308 | if (unsigned(I) != SP && TRI->isPhysicalRegister(I) && |
| 309 | MO.clobbersPhysReg(I)) { |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 310 | clobberRegisterUses(RegVars, I, DbgValues, LiveEntries, MI); |
Reid Kleckner | f6f04f8 | 2016-03-25 17:54:46 +0000 | [diff] [blame] | 311 | } |
| 312 | } |
| 313 | } |
| 314 | } |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 315 | continue; |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 316 | } |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 317 | |
Hsiangkai Wang | 2532ac8 | 2018-08-17 15:22:04 +0000 | [diff] [blame] | 318 | if (MI.isDebugValue()) { |
| 319 | assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!"); |
| 320 | // Use the base variable (without any DW_OP_piece expressions) |
| 321 | // as index into History. The full variables including the |
| 322 | // piece expressions are attached to the MI. |
| 323 | const DILocalVariable *RawVar = MI.getDebugVariable(); |
| 324 | assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) && |
| 325 | "Expected inlined-at fields to agree"); |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 326 | InlinedEntity Var(RawVar, MI.getDebugLoc()->getInlinedAt()); |
Shiva Chen | 801bf7e | 2018-05-09 02:42:00 +0000 | [diff] [blame] | 327 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 328 | handleNewDebugValue(Var, MI, RegVars, LiveEntries, DbgValues); |
Hsiangkai Wang | 2532ac8 | 2018-08-17 15:22:04 +0000 | [diff] [blame] | 329 | } else if (MI.isDebugLabel()) { |
| 330 | assert(MI.getNumOperands() == 1 && "Invalid DBG_LABEL instruction!"); |
| 331 | const DILabel *RawLabel = MI.getDebugLabel(); |
| 332 | assert(RawLabel->isValidLocationForIntrinsic(MI.getDebugLoc()) && |
| 333 | "Expected inlined-at fields to agree"); |
| 334 | // When collecting debug information for labels, there is no MCSymbol |
| 335 | // generated for it. So, we keep MachineInstr in DbgLabels in order |
| 336 | // to query MCSymbol afterward. |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 337 | InlinedEntity L(RawLabel, MI.getDebugLoc()->getInlinedAt()); |
Hsiangkai Wang | 2532ac8 | 2018-08-17 15:22:04 +0000 | [diff] [blame] | 338 | DbgLabels.addInstr(L, MI); |
| 339 | } |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 340 | } |
Alexey Samsonov | dfcaf9c | 2014-05-20 18:34:54 +0000 | [diff] [blame] | 341 | |
| 342 | // Make sure locations for register-described variables are valid only |
| 343 | // until the end of the basic block (unless it's the last basic block, in |
| 344 | // which case let their liveness run off to the end of the function). |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 345 | if (!MBB.empty() && &MBB != &MF->back()) { |
| 346 | for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) { |
| 347 | auto CurElem = I++; // CurElem can be erased below. |
Dominic Chen | 6ba1965 | 2016-08-11 17:52:40 +0000 | [diff] [blame] | 348 | if (TRI->isVirtualRegister(CurElem->first) || |
| 349 | ChangingRegs.test(CurElem->first)) |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 350 | clobberRegisterUses(RegVars, CurElem, DbgValues, LiveEntries, |
| 351 | MBB.back()); |
Benjamin Kramer | 6bf8af5 | 2014-10-06 15:31:04 +0000 | [diff] [blame] | 352 | } |
Alexey Samsonov | 8000e27 | 2014-06-09 21:53:47 +0000 | [diff] [blame] | 353 | } |
Alexey Samsonov | 414b6fb | 2014-04-30 21:34:11 +0000 | [diff] [blame] | 354 | } |
| 355 | } |
Vedant Kumar | 7224c08 | 2018-06-01 22:33:15 +0000 | [diff] [blame] | 356 | |
| 357 | #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) |
| 358 | LLVM_DUMP_METHOD void DbgValueHistoryMap::dump() const { |
| 359 | dbgs() << "DbgValueHistoryMap:\n"; |
| 360 | for (const auto &VarRangePair : *this) { |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 361 | const InlinedEntity &Var = VarRangePair.first; |
David Stenberg | 6feef56 | 2019-04-10 09:07:43 +0000 | [diff] [blame] | 362 | const Entries &Entries = VarRangePair.second; |
Vedant Kumar | 7224c08 | 2018-06-01 22:33:15 +0000 | [diff] [blame] | 363 | |
Hsiangkai Wang | 760c1ab | 2018-09-06 02:22:06 +0000 | [diff] [blame] | 364 | const DILocalVariable *LocalVar = cast<DILocalVariable>(Var.first); |
Vedant Kumar | 7224c08 | 2018-06-01 22:33:15 +0000 | [diff] [blame] | 365 | const DILocation *Location = Var.second; |
| 366 | |
| 367 | dbgs() << " - " << LocalVar->getName() << " at "; |
| 368 | |
| 369 | if (Location) |
| 370 | dbgs() << Location->getFilename() << ":" << Location->getLine() << ":" |
| 371 | << Location->getColumn(); |
| 372 | else |
| 373 | dbgs() << "<unknown location>"; |
| 374 | |
| 375 | dbgs() << " --\n"; |
| 376 | |
David Stenberg | 5ffec6d | 2019-04-10 11:28:20 +0000 | [diff] [blame^] | 377 | for (const auto &E : enumerate(Entries)) { |
| 378 | const auto &Entry = E.value(); |
| 379 | dbgs() << " Entry[" << E.index() << "]: "; |
| 380 | if (Entry.isDbgValue()) |
| 381 | dbgs() << "Debug value\n"; |
| 382 | else |
| 383 | dbgs() << "Clobber\n"; |
| 384 | dbgs() << " Instr: " << *Entry.getInstr(); |
| 385 | if (Entry.isDbgValue()) { |
| 386 | if (Entry.getEndIndex() == NoEntry) |
| 387 | dbgs() << " - Valid until end of function\n"; |
| 388 | else |
| 389 | dbgs() << " - Closed by Entry[" << Entry.getEndIndex() << "]\n"; |
| 390 | } |
Vedant Kumar | 7224c08 | 2018-06-01 22:33:15 +0000 | [diff] [blame] | 391 | dbgs() << "\n"; |
| 392 | } |
| 393 | } |
| 394 | } |
| 395 | #endif |