blob: d0ff192b077e2cdbfc597a6d6f5406e51c84c9d2 [file] [log] [blame]
Tom Stellard043795e2013-06-20 21:55:30 +00001; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s
Tom Stellard70f13db2013-10-10 17:11:46 +00002; RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI-CHECK %s
Tom Stellard75aadc22012-12-11 21:25:42 +00003
Matt Arsenault44138782013-10-11 21:03:41 +00004;EG-CHECK-LABEL: @test1:
5;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
6
7;SI-CHECK-LABEL: @test1:
8;SI-CHECK: V_ADD_I32_e32 [[REG:VGPR[0-9]+]], {{VGPR[0-9]+, VGPR[0-9]+}}
9;SI-CHECK-NOT: [[REG]]
10;SI-CHECK: BUFFER_STORE_DWORD [[REG]],
11define void @test1(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
12 %b_ptr = getelementptr i32 addrspace(1)* %in, i32 1
13 %a = load i32 addrspace(1)* %in
14 %b = load i32 addrspace(1)* %b_ptr
15 %result = add i32 %a, %b
16 store i32 %result, i32 addrspace(1)* %out
17 ret void
18}
19
Matt Arsenaultc15b8572013-10-11 21:03:39 +000020;EG-CHECK-LABEL: @test2:
Tom Stellard1e803092013-07-23 01:48:18 +000021;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
22;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Tom Stellard75aadc22012-12-11 21:25:42 +000023
Matt Arsenaultc15b8572013-10-11 21:03:39 +000024;SI-CHECK-LABEL: @test2:
Tom Stellard043795e2013-06-20 21:55:30 +000025;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
26;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
27
28define void @test2(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
29 %b_ptr = getelementptr <2 x i32> addrspace(1)* %in, i32 1
Matt Arsenaultc15b8572013-10-11 21:03:39 +000030 %a = load <2 x i32> addrspace(1)* %in
31 %b = load <2 x i32> addrspace(1)* %b_ptr
Tom Stellard043795e2013-06-20 21:55:30 +000032 %result = add <2 x i32> %a, %b
33 store <2 x i32> %result, <2 x i32> addrspace(1)* %out
34 ret void
35}
36
Matt Arsenaultc15b8572013-10-11 21:03:39 +000037;EG-CHECK-LABEL: @test4:
Tom Stellard1e803092013-07-23 01:48:18 +000038;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
39;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
40;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
41;EG-CHECK: ADD_INT {{[* ]*}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
Tom Stellard043795e2013-06-20 21:55:30 +000042
Matt Arsenaultc15b8572013-10-11 21:03:39 +000043;SI-CHECK-LABEL: @test4:
Tom Stellard043795e2013-06-20 21:55:30 +000044;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
45;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
46;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
47;SI-CHECK: V_ADD_I32_e32 VGPR{{[0-9]+, VGPR[0-9]+, VGPR[0-9]+}}
48
49define void @test4(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
Tom Stellard75aadc22012-12-11 21:25:42 +000050 %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1
Matt Arsenaultc15b8572013-10-11 21:03:39 +000051 %a = load <4 x i32> addrspace(1)* %in
52 %b = load <4 x i32> addrspace(1)* %b_ptr
Tom Stellard75aadc22012-12-11 21:25:42 +000053 %result = add <4 x i32> %a, %b
54 store <4 x i32> %result, <4 x i32> addrspace(1)* %out
55 ret void
56}