| Tim Northover | 3b0846e | 2014-05-24 12:50:23 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=arm64 -aarch64-neon-syntax=apple < %s | FileCheck %s |
| 2 | |
| 3 | define i64 @test_vaddlv_s32(<2 x i32> %a1) nounwind readnone { |
| 4 | ; CHECK: test_vaddlv_s32 |
| 5 | ; CHECK: saddlp.1d v[[REGNUM:[0-9]+]], v[[INREG:[0-9]+]] |
| 6 | ; CHECK-NEXT: fmov x[[OUTREG:[0-9]+]], d[[REGNUM]] |
| 7 | ; CHECK-NEXT: ret |
| 8 | entry: |
| 9 | %vaddlv.i = tail call i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32> %a1) nounwind |
| 10 | ret i64 %vaddlv.i |
| 11 | } |
| 12 | |
| 13 | define i64 @test_vaddlv_u32(<2 x i32> %a1) nounwind readnone { |
| 14 | ; CHECK: test_vaddlv_u32 |
| 15 | ; CHECK: uaddlp.1d v[[REGNUM:[0-9]+]], v[[INREG:[0-9]+]] |
| 16 | ; CHECK-NEXT: fmov x[[OUTREG:[0-9]+]], d[[REGNUM]] |
| 17 | ; CHECK-NEXT: ret |
| 18 | entry: |
| 19 | %vaddlv.i = tail call i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32> %a1) nounwind |
| 20 | ret i64 %vaddlv.i |
| 21 | } |
| 22 | |
| 23 | declare i64 @llvm.aarch64.neon.uaddlv.i64.v2i32(<2 x i32>) nounwind readnone |
| 24 | |
| 25 | declare i64 @llvm.aarch64.neon.saddlv.i64.v2i32(<2 x i32>) nounwind readnone |
| 26 | |