Tim Northover | a7c18ee | 2018-07-19 12:44:51 +0000 | [diff] [blame] | 1 | ; RUN: llc -mtriple=thumbv7em-none-macho %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-HARD %s |
| 2 | ; RUN: llc -mtriple=thumbv7m-none-macho %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-SOFT %s |
| 3 | ; RUN: llc -mtriple=thumbv7em-linux-gnueabi %s -o - -mcpu=cortex-m4 | FileCheck --check-prefix=CHECK-SOFT %s |
| 4 | |
| 5 | define float @test_default_cc(float %a, float %b) { |
| 6 | ; CHECK-HARD-LABEL: test_default_cc: |
| 7 | ; CHECK-HARD-NOT: vmov |
| 8 | ; CHECK-HARD: vadd.f32 s0, s0, s1 |
| 9 | ; CHECK-HARD-NOT: vmov |
| 10 | |
| 11 | ; CHECK-SOFT-LABEL: test_default_cc: |
| 12 | ; CHECK-SOFT-DAG: vmov [[A:s[0-9]+]], r0 |
| 13 | ; CHECK-SOFT-DAG: vmov [[B:s[0-9]+]], r1 |
| 14 | ; CHECK-SOFT: vadd.f32 [[RES:s[0-9]+]], [[A]], [[B]] |
Dmitri Gribenko | 751c5fb | 2019-02-25 13:12:33 +0000 | [diff] [blame^] | 15 | ; CHECK-SOFT: vmov r0, [[RES]] |
Tim Northover | a7c18ee | 2018-07-19 12:44:51 +0000 | [diff] [blame] | 16 | |
| 17 | %res = fadd float %a, %b |
| 18 | ret float %res |
| 19 | } |
| 20 | |
| 21 | |
| 22 | define arm_aapcs_vfpcc float @test_libcall(float %in) { |
| 23 | ; CHECK-HARD-LABEL: test_libcall: |
| 24 | ; CHECK-HARD-NOT: vmov |
| 25 | ; CHECK-HARD: b.w _sinf |
| 26 | |
| 27 | ; CHECK-SOFT-LABEL: test_libcall: |
| 28 | ; CHECK-SOFT: vmov r0, s0 |
| 29 | ; CHECK-SOFT: bl {{_?}}sinf |
| 30 | ; CHECK-SOFT: vmov s0, r0 |
| 31 | |
| 32 | %res = call float @llvm.sin.f32(float %in) |
| 33 | ret float %res |
| 34 | } |
| 35 | |
| 36 | |
| 37 | declare float @llvm.sin.f32(float) |