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Matt Arsenaultc5951852017-06-19 23:47:21 +00001; RUN: llc -mtriple=amdgcn-amd-amdhsa -mattr=-promote-alloca -amdgpu-sroa=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
Matt Arsenault2b1f9aa2017-05-17 21:56:25 +00002
3; Test that non-entry function frame indices are expanded properly to
4; give an index relative to the scratch wave offset register
5
6; Materialize into a mov. Make sure there isn't an unnecessary copy.
7; GCN-LABEL: {{^}}func_mov_fi_i32:
8; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
Matthias Braun7a482e22017-06-20 18:43:14 +00009; GCN: s_sub_u32 s6, s5, s4
10; GCN-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6
11; GCN-NEXT: v_add_i32_e64 v0, s[6:7], 4, [[SCALED]]
Matt Arsenault2b1f9aa2017-05-17 21:56:25 +000012; GCN-NOT: v_mov
13; GCN: ds_write_b32 v0, v0
14define void @func_mov_fi_i32() #0 {
15 %alloca = alloca i32
16 store volatile i32* %alloca, i32* addrspace(3)* undef
17 ret void
18}
19
20; Materialize into an add of a constant offset from the FI.
21; FIXME: Should be able to merge adds
22
23; GCN-LABEL: {{^}}func_add_constant_to_fi_i32:
24; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
Matthias Braun7a482e22017-06-20 18:43:14 +000025; GCN: s_sub_u32 s6, s5, s4
26; GCN-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6
27; GCN-NEXT: v_add_i32_e64 v0, s[6:7], 4, [[SCALED]]
Matt Arsenault2b1f9aa2017-05-17 21:56:25 +000028; GCN-NEXT: v_add_i32_e32 v0, vcc, 4, v0
29; GCN-NOT: v_mov
30; GCN: ds_write_b32 v0, v0
31define void @func_add_constant_to_fi_i32() #0 {
32 %alloca = alloca [2 x i32], align 4
33 %gep0 = getelementptr inbounds [2 x i32], [2 x i32]* %alloca, i32 0, i32 1
34 store volatile i32* %gep0, i32* addrspace(3)* undef
35 ret void
36}
37
38; A user the materialized frame index can't be meaningfully folded
39; into.
40
41; GCN-LABEL: {{^}}func_other_fi_user_i32:
Matthias Braun7a482e22017-06-20 18:43:14 +000042; GCN: s_sub_u32 s6, s5, s4
43; GCN-NEXT: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6
44; GCN-NEXT: v_add_i32_e64 v0, s[6:7], 4, [[SCALED]]
Matt Arsenault2b1f9aa2017-05-17 21:56:25 +000045; GCN-NEXT: v_mul_lo_i32 v0, v0, 9
46; GCN-NOT: v_mov
47; GCN: ds_write_b32 v0, v0
48define void @func_other_fi_user_i32() #0 {
49 %alloca = alloca [2 x i32], align 4
50 %ptrtoint = ptrtoint [2 x i32]* %alloca to i32
51 %mul = mul i32 %ptrtoint, 9
52 store volatile i32 %mul, i32 addrspace(3)* undef
53 ret void
54}
55
56; GCN-LABEL: {{^}}func_store_private_arg_i32_ptr:
57; GCN: v_mov_b32_e32 v1, 15{{$}}
58; GCN: buffer_store_dword v1, v0, s[0:3], s4 offen{{$}}
59define void @func_store_private_arg_i32_ptr(i32* %ptr) #0 {
60 store volatile i32 15, i32* %ptr
61 ret void
62}
63
64; GCN-LABEL: {{^}}func_load_private_arg_i32_ptr:
65; GCN: s_waitcnt
66; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], s4 offen{{$}}
67define void @func_load_private_arg_i32_ptr(i32* %ptr) #0 {
68 %val = load volatile i32, i32* %ptr
69 ret void
70}
71
72; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr:
73; GCN: s_waitcnt
Matthias Braun7a482e22017-06-20 18:43:14 +000074; GCN-NEXT: s_sub_u32 s6, s5, s4
75; GCN-NEXT: v_lshr_b32_e64 v0, s6, 6
Matt Arsenault2b1f9aa2017-05-17 21:56:25 +000076; GCN-NEXT: v_add_i32_e32 v0, vcc, 4, v0
77; GCN-NOT: v_mov
78; GCN: ds_write_b32 v0, v0
79define void @void_func_byval_struct_i8_i32_ptr({ i8, i32 }* byval %arg0) #0 {
80 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 0
81 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 1
82 %load1 = load i32, i32* %gep1
83 store volatile i32* %gep1, i32* addrspace(3)* undef
84 ret void
85}
86
87; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_value:
88; GCN: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
89; GCN-NEXT: buffer_load_ubyte v0, off, s[0:3], s5
90; GCN_NEXT: buffer_load_dword v1, off, s[0:3], s5 offset:4
91define void @void_func_byval_struct_i8_i32_ptr_value({ i8, i32 }* byval %arg0) #0 {
92 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 0
93 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 1
94 %load0 = load i8, i8* %gep0
95 %load1 = load i32, i32* %gep1
96 store volatile i8 %load0, i8 addrspace(3)* undef
97 store volatile i32 %load1, i32 addrspace(3)* undef
98 ret void
99}
100
101; GCN-LABEL: {{^}}void_func_byval_struct_i8_i32_ptr_nonentry_block:
Matthias Braun7a482e22017-06-20 18:43:14 +0000102; GCN: s_sub_u32 s6, s5, s4
103; GCN: v_lshr_b32_e64 v1, s6, 6
Matt Arsenault2b1f9aa2017-05-17 21:56:25 +0000104; GCN: s_and_saveexec_b64
105
106; GCN: v_add_i32_e32 v0, vcc, 4, v1
107; GCN: buffer_load_dword v1, v1, s[0:3], s4 offen offset:4
108; GCN: ds_write_b32
109define void @void_func_byval_struct_i8_i32_ptr_nonentry_block({ i8, i32 }* byval %arg0, i32 %arg2) #0 {
110 %cmp = icmp eq i32 %arg2, 0
111 br i1 %cmp, label %bb, label %ret
112
113bb:
114 %gep0 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 0
115 %gep1 = getelementptr inbounds { i8, i32 }, { i8, i32 }* %arg0, i32 0, i32 1
116 %load1 = load volatile i32, i32* %gep1
117 store volatile i32* %gep1, i32* addrspace(3)* undef
118 br label %ret
119
120ret:
121 ret void
122}
123
Matt Arsenaultc5951852017-06-19 23:47:21 +0000124; Added offset can't be used with VOP3 add
125; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32:
Matthias Braun7a482e22017-06-20 18:43:14 +0000126; GCN: s_sub_u32 s6, s5, s4
127; GCN-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], s6, 6
128; GCN-DAG: s_movk_i32 s6, 0x204
129; GCN: v_add_i32_e64 v0, s[6:7], s6, [[SCALED]]
Matt Arsenaultc5951852017-06-19 23:47:21 +0000130; GCN: v_mul_lo_i32 v0, v0, 9
131; GCN: ds_write_b32 v0, v0
132define void @func_other_fi_user_non_inline_imm_offset_i32() #0 {
133 %alloca0 = alloca [128 x i32], align 4
134 %alloca1 = alloca [8 x i32], align 4
135 %gep0 = getelementptr inbounds [128 x i32], [128 x i32]* %alloca0, i32 0, i32 65
136 %gep1 = getelementptr inbounds [8 x i32], [8 x i32]* %alloca1, i32 0, i32 0
137 store volatile i32 7, i32* %gep0
138 %ptrtoint = ptrtoint i32* %gep1 to i32
139 %mul = mul i32 %ptrtoint, 9
140 store volatile i32 %mul, i32 addrspace(3)* undef
141 ret void
142}
143; GCN-LABEL: {{^}}func_other_fi_user_non_inline_imm_offset_i32_vcc_live:
144; GCN: s_sub_u32 [[DIFF:s[0-9]+]], s5, s4
145; GCN-DAG: v_lshr_b32_e64 [[SCALED:v[0-9]+]], [[DIFF]], 6
146; GCN-DAG: s_movk_i32 [[OFFSET:s[0-9]+]], 0x204
147; GCN: v_add_i32_e64 v0, s{{\[[0-9]+:[0-9]+\]}}, [[OFFSET]], [[SCALED]]
148; GCN: v_mul_lo_i32 v0, v0, 9
149; GCN: ds_write_b32 v0, v0
150define void @func_other_fi_user_non_inline_imm_offset_i32_vcc_live() #0 {
151 %alloca0 = alloca [128 x i32], align 4
152 %alloca1 = alloca [8 x i32], align 4
153 %vcc = call i64 asm sideeffect "; def $0", "={VCC}"()
154 %gep0 = getelementptr inbounds [128 x i32], [128 x i32]* %alloca0, i32 0, i32 65
155 %gep1 = getelementptr inbounds [8 x i32], [8 x i32]* %alloca1, i32 0, i32 0
156 store volatile i32 7, i32* %gep0
157 call void asm sideeffect "; use $0", "{VCC}"(i64 %vcc)
158 %ptrtoint = ptrtoint i32* %gep1 to i32
159 %mul = mul i32 %ptrtoint, 9
160 store volatile i32 %mul, i32 addrspace(3)* undef
161 ret void
162}
163
Matt Arsenault2b1f9aa2017-05-17 21:56:25 +0000164attributes #0 = { nounwind }