blob: 18895a423e50e95293054ccec1a74121824ae4f4 [file] [log] [blame]
Tom Stellard7d411612013-02-05 17:09:13 +00001; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
2
3; These tests make sure the compiler is optimizing branches using predicates
4; when it is legal to do so.
5
6; CHECK: @simple_if
7; CHECK: PRED_SET{{[EGN][ET]*}}_INT Pred,
8; CHECK: LSHL T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel
9define void @simple_if(i32 addrspace(1)* %out, i32 %in) {
10entry:
11 %0 = icmp sgt i32 %in, 0
12 br i1 %0, label %IF, label %ENDIF
13
14IF:
15 %1 = shl i32 %in, 1
16 br label %ENDIF
17
18ENDIF:
19 %2 = phi i32 [ %in, %entry ], [ %1, %IF ]
20 store i32 %2, i32 addrspace(1)* %out
21 ret void
22}
23
24; CHECK: @simple_if_else
25; CHECK: PRED_SET{{[EGN][ET]*}}_INT Pred,
26; CHECK: LSH{{[LR] T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel
27; CHECK: LSH{{[LR] T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel
28define void @simple_if_else(i32 addrspace(1)* %out, i32 %in) {
29entry:
30 %0 = icmp sgt i32 %in, 0
31 br i1 %0, label %IF, label %ELSE
32
33IF:
34 %1 = shl i32 %in, 1
35 br label %ENDIF
36
37ELSE:
38 %2 = lshr i32 %in, 1
39 br label %ENDIF
40
41ENDIF:
42 %3 = phi i32 [ %1, %IF ], [ %2, %ELSE ]
43 store i32 %3, i32 addrspace(1)* %out
44 ret void
45}
46
47; CHECK: @nested_if
48; CHECK: IF_PREDICATE_SET
49; CHECK: PRED_SET{{[EGN][ET]*}}_INT Pred,
50; CHECK: LSHL T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel
51; CHECK: ENDIF
52define void @nested_if(i32 addrspace(1)* %out, i32 %in) {
53entry:
54 %0 = icmp sgt i32 %in, 0
55 br i1 %0, label %IF0, label %ENDIF
56
57IF0:
58 %1 = add i32 %in, 10
59 %2 = icmp sgt i32 %1, 0
60 br i1 %2, label %IF1, label %ENDIF
61
62IF1:
63 %3 = shl i32 %1, 1
64 br label %ENDIF
65
66ENDIF:
67 %4 = phi i32 [%in, %entry], [%1, %IF0], [%3, %IF1]
68 store i32 %4, i32 addrspace(1)* %out
69 ret void
70}
71
72; CHECK: @nested_if_else
73; CHECK: IF_PREDICATE_SET
74; CHECK: PRED_SET{{[EGN][ET]*}}_INT Pred,
75; CHECK: LSH{{[LR] T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel
76; CHECK: LSH{{[LR] T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel
77; CHECK: ENDIF
78define void @nested_if_else(i32 addrspace(1)* %out, i32 %in) {
79entry:
80 %0 = icmp sgt i32 %in, 0
81 br i1 %0, label %IF0, label %ENDIF
82
83IF0:
84 %1 = add i32 %in, 10
85 %2 = icmp sgt i32 %1, 0
86 br i1 %2, label %IF1, label %ELSE1
87
88IF1:
89 %3 = shl i32 %1, 1
90 br label %ENDIF
91
92ELSE1:
93 %4 = lshr i32 %in, 1
94 br label %ENDIF
95
96ENDIF:
97 %5 = phi i32 [%in, %entry], [%3, %IF1], [%4, %ELSE1]
98 store i32 %5, i32 addrspace(1)* %out
99 ret void
100}