Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / AMDGPU / basic-branch.ll
blob: 057742fcfd42600557a9488388e61c2b2c9dd56f [file] [log] [blame]
Matt Arsenault90083d32018-06-07 09:54:49 +0000[diff] [blame]1; RUN: llc -O0 -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
2; RUN: llc -O0 -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -amdgpu-spill-sgpr-to-smem=0 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
3; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
4; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
Matt Arsenault24309582014-03-01 21:45:41 +0000[diff] [blame]5
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]6; GCN-LABEL: {{^}}test_branch:
7; GCNNOOPT: v_writelane_b32
8; GCNNOOPT: v_writelane_b32
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]9; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
10
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]11; GCNNOOPT: v_readlane_b32
12; GCNNOOPT: v_readlane_b32
13; GCN: buffer_store_dword
Kyle Butt7fbec9b2017-02-15 19:49:14 +0000[diff] [blame]14; GCNNOOPT: s_endpgm
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]15
Matt Arsenaultad55ee52016-12-06 01:02:51 +0000[diff] [blame]16; GCN: {{^}}[[END]]:
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]17; GCN: s_endpgm
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]18define amdgpu_kernel void @test_branch(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i32 %val) #0 {
Matt Arsenault24309582014-03-01 21:45:41 +0000[diff] [blame]19 %cmp = icmp ne i32 %val, 0
20 br i1 %cmp, label %store, label %end
21
22store:
23 store i32 222, i32 addrspace(1)* %out
24 ret void
25
26end:
27 ret void
28}
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]29
30; GCN-LABEL: {{^}}test_brcc_i1:
Matt Arsenault90083d32018-06-07 09:54:49 +0000[diff] [blame]31; GCN: s_load_dword [[VAL:s[0-9]+]]
Matt Arsenault8c4a3522018-06-26 19:10:00 +0000[diff] [blame]32; GCNNOOPT: s_mov_b32 [[ONE:s[0-9]+]], 1{{$}}
33; GCNNOOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], [[ONE]]
Matt Arsenault90083d32018-06-07 09:54:49 +0000[diff] [blame]34; GCNOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], 1
35; GCN: s_cmp_eq_u32
36; GCN: s_cbranch_scc1 [[END:BB[0-9]+_[0-9]+]]
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]37
38; GCN: buffer_store_dword
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]39
Matt Arsenaultad55ee52016-12-06 01:02:51 +0000[diff] [blame]40; GCN: {{^}}[[END]]:
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]41; GCN: s_endpgm
Matt Arsenault3dbeefa2017-03-21 21:39:51 +0000[diff] [blame]42define amdgpu_kernel void @test_brcc_i1(i32 addrspace(1)* noalias %out, i32 addrspace(1)* noalias %in, i1 %val) #0 {
Matt Arsenaultd89c99c2016-05-25 17:58:27 +0000[diff] [blame]43 %cmp0 = icmp ne i1 %val, 0
44 br i1 %cmp0, label %store, label %end
45
46store:
47 store i32 222, i32 addrspace(1)* %out
48 ret void
49
50end:
51 ret void
52}
53
54attributes #0 = { nounwind }