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Krzysztof Parzyszek046090d2018-03-12 14:01:28 +00001; RUN: llc -march=hexagon -enable-pipeliner=true -stats -o /dev/null < %s \
2; RUN: 2>&1 | FileCheck %s --check-prefix=STATS
Krzysztof Parzyszekea2324f2018-03-12 15:20:36 +00003; REQUIRES: asserts
Krzysztof Parzyszek046090d2018-03-12 14:01:28 +00004
5; Test that we do not schedule chained references too far apart,
6; which enables the loop to be pipelined. In this test, the loop should
7; not be pipelined when the chained references are constrained correctly.
8
9; STATS-NOT: 1 pipeliner - Number of loops software pipelined
10
11; Function Attrs: nounwind
12define void @f0() #0 {
13b0:
14 br label %b2
15
16b1: ; preds = %b6
17 br label %b7
18
19b2: ; preds = %b6, %b0
20 br label %b3
21
22b3: ; preds = %b5, %b2
23 br i1 undef, label %b4, label %b5
24
25b4: ; preds = %b3
26 br label %b5
27
28b5: ; preds = %b4, %b3
29 br i1 undef, label %b3, label %b6
30
31b6: ; preds = %b5
32 br i1 undef, label %b1, label %b2
33
34b7: ; preds = %b7, %b1
35 %v0 = phi i32 [ 0, %b1 ], [ %v4, %b7 ]
36 %v1 = load i16, i16* undef, align 8, !tbaa !0
37 %v2 = icmp sgt i16 %v1, undef
38 %v3 = select i1 %v2, i16 4, i16 undef
39 store i16 %v3, i16* undef, align 2, !tbaa !0
40 store i16 -32768, i16* undef, align 2, !tbaa !0
41 %v4 = add i32 %v0, 1
42 %v5 = icmp eq i32 %v4, 5
43 br i1 %v5, label %b8, label %b7
44
45b8: ; preds = %b7
46 br i1 undef, label %b9, label %b10
47
48b9: ; preds = %b8
49 br label %b10
50
51b10: ; preds = %b9, %b8
52 br i1 undef, label %b11, label %b12
53
54b11: ; preds = %b10
55 unreachable
56
57b12: ; preds = %b10
58 ret void
59}
60
61attributes #0 = { nounwind "target-cpu"="hexagonv55" }
62
63!0 = !{!1, !1, i64 0}
64!1 = !{!"short", !2}
65!2 = !{!"omnipotent char", !3}
66!3 = !{!"Simple C/C++ TBAA"}