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gerrit-public.fairphone.software / toolchain / llvm-project / 81fe1fbf4abd00b24e078a80cb15a2d2c1343f11 / . / llvm / test / CodeGen / PowerPC / testComparesineuc.ll
blob: 4e7f5c05cf6de5ce66b117928717e6b93f4e032b [file] [log] [blame]
Stefan Pintiliecb4f0c52018-07-04 18:54:25 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]8@glob = common local_unnamed_addr global i8 0, align 1
9
10define signext i32 @test_ineuc(i8 zeroext %a, i8 zeroext %b) {
11; CHECK-LABEL: test_ineuc:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]12; CHECK: # %bb.0: # %entry
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]13; CHECK-NEXT: xor r3, r3, r4
14; CHECK-NEXT: cntlzw r3, r3
15; CHECK-NEXT: srwi r3, r3, 5
16; CHECK-NEXT: xori r3, r3, 1
17; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]18; CHECK-BE-LABEL: test_ineuc:
19; CHECK-BE: # %bb.0: # %entry
20; CHECK-BE-NEXT: xor r3, r3, r4
21; CHECK-BE-NEXT: cntlzw r3, r3
22; CHECK-BE-NEXT: srwi r3, r3, 5
23; CHECK-BE-NEXT: xori r3, r3, 1
24; CHECK-BE-NEXT: blr
25;
26; CHECK-LE-LABEL: test_ineuc:
27; CHECK-LE: # %bb.0: # %entry
28; CHECK-LE-NEXT: xor r3, r3, r4
29; CHECK-LE-NEXT: cntlzw r3, r3
30; CHECK-LE-NEXT: srwi r3, r3, 5
31; CHECK-LE-NEXT: xori r3, r3, 1
32; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]33entry:
34 %cmp = icmp ne i8 %a, %b
35 %conv2 = zext i1 %cmp to i32
36 ret i32 %conv2
37}
38
39define signext i32 @test_ineuc_sext(i8 zeroext %a, i8 zeroext %b) {
40; CHECK-LABEL: test_ineuc_sext:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]41; CHECK: # %bb.0: # %entry
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]42; CHECK-NEXT: xor r3, r3, r4
43; CHECK-NEXT: cntlzw r3, r3
44; CHECK-NEXT: srwi r3, r3, 5
45; CHECK-NEXT: xori r3, r3, 1
46; CHECK-NEXT: neg r3, r3
47; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]48; CHECK-BE-LABEL: test_ineuc_sext:
49; CHECK-BE: # %bb.0: # %entry
50; CHECK-BE-NEXT: xor r3, r3, r4
51; CHECK-BE-NEXT: cntlzw r3, r3
52; CHECK-BE-NEXT: srwi r3, r3, 5
53; CHECK-BE-NEXT: xori r3, r3, 1
54; CHECK-BE-NEXT: neg r3, r3
55; CHECK-BE-NEXT: blr
56;
57; CHECK-LE-LABEL: test_ineuc_sext:
58; CHECK-LE: # %bb.0: # %entry
59; CHECK-LE-NEXT: xor r3, r3, r4
60; CHECK-LE-NEXT: cntlzw r3, r3
61; CHECK-LE-NEXT: srwi r3, r3, 5
62; CHECK-LE-NEXT: xori r3, r3, 1
63; CHECK-LE-NEXT: neg r3, r3
64; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]65entry:
66 %cmp = icmp ne i8 %a, %b
67 %sub = sext i1 %cmp to i32
68 ret i32 %sub
69}
70
71define signext i32 @test_ineuc_z(i8 zeroext %a) {
72; CHECK-LABEL: test_ineuc_z:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]73; CHECK: # %bb.0: # %entry
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]74; CHECK-NEXT: cntlzw r3, r3
75; CHECK-NEXT: srwi r3, r3, 5
76; CHECK-NEXT: xori r3, r3, 1
77; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]78; CHECK-BE-LABEL: test_ineuc_z:
79; CHECK-BE: # %bb.0: # %entry
80; CHECK-BE-NEXT: cntlzw r3, r3
81; CHECK-BE-NEXT: srwi r3, r3, 5
82; CHECK-BE-NEXT: xori r3, r3, 1
83; CHECK-BE-NEXT: blr
84;
85; CHECK-LE-LABEL: test_ineuc_z:
86; CHECK-LE: # %bb.0: # %entry
87; CHECK-LE-NEXT: cntlzw r3, r3
88; CHECK-LE-NEXT: srwi r3, r3, 5
89; CHECK-LE-NEXT: xori r3, r3, 1
90; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]91entry:
92 %cmp = icmp ne i8 %a, 0
93 %conv1 = zext i1 %cmp to i32
94 ret i32 %conv1
95}
96
97define signext i32 @test_ineuc_sext_z(i8 zeroext %a) {
98; CHECK-LABEL: test_ineuc_sext_z:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]99; CHECK: # %bb.0: # %entry
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]100; CHECK-NEXT: cntlzw r3, r3
101; CHECK-NEXT: srwi r3, r3, 5
102; CHECK-NEXT: xori r3, r3, 1
103; CHECK-NEXT: neg r3, r3
104; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]105; CHECK-BE-LABEL: test_ineuc_sext_z:
106; CHECK-BE: # %bb.0: # %entry
107; CHECK-BE-NEXT: cntlzw r3, r3
108; CHECK-BE-NEXT: srwi r3, r3, 5
109; CHECK-BE-NEXT: xori r3, r3, 1
110; CHECK-BE-NEXT: neg r3, r3
111; CHECK-BE-NEXT: blr
112;
113; CHECK-LE-LABEL: test_ineuc_sext_z:
114; CHECK-LE: # %bb.0: # %entry
115; CHECK-LE-NEXT: cntlzw r3, r3
116; CHECK-LE-NEXT: srwi r3, r3, 5
117; CHECK-LE-NEXT: xori r3, r3, 1
118; CHECK-LE-NEXT: neg r3, r3
119; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]120entry:
121 %cmp = icmp ne i8 %a, 0
122 %sub = sext i1 %cmp to i32
123 ret i32 %sub
124}
125
126define void @test_ineuc_store(i8 zeroext %a, i8 zeroext %b) {
127; CHECK-LABEL: test_ineuc_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]128; CHECK: # %bb.0: # %entry
Stefan Pintiliecb4f0c52018-07-04 18:54:25 +0000[diff] [blame]129; CHECK-NEXT: xor r3, r3, r4
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]130; CHECK-NEXT: addis r5, r2, glob@toc@ha
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]131; CHECK-NEXT: cntlzw r3, r3
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]132; CHECK-NEXT: srwi r3, r3, 5
133; CHECK-NEXT: xori r3, r3, 1
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]134; CHECK-NEXT: stb r3, glob@toc@l(r5)
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]135; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]136; CHECK-BE-LABEL: test_ineuc_store:
137; CHECK-BE: # %bb.0: # %entry
138; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
139; CHECK-BE-NEXT: xor r3, r3, r4
140; CHECK-BE-NEXT: cntlzw r3, r3
141; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
142; CHECK-BE-NEXT: srwi r3, r3, 5
143; CHECK-BE-NEXT: xori r3, r3, 1
144; CHECK-BE-NEXT: stb r3, 0(r4)
145; CHECK-BE-NEXT: blr
146;
147; CHECK-LE-LABEL: test_ineuc_store:
148; CHECK-LE: # %bb.0: # %entry
149; CHECK-LE-NEXT: xor r3, r3, r4
150; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
151; CHECK-LE-NEXT: cntlzw r3, r3
152; CHECK-LE-NEXT: srwi r3, r3, 5
153; CHECK-LE-NEXT: xori r3, r3, 1
154; CHECK-LE-NEXT: stb r3, glob@toc@l(r5)
155; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]156entry:
157 %cmp = icmp ne i8 %a, %b
158 %conv3 = zext i1 %cmp to i8
159 store i8 %conv3, i8* @glob, align 1
160 ret void
161}
162
163define void @test_ineuc_sext_store(i8 zeroext %a, i8 zeroext %b) {
164; CHECK-LABEL: test_ineuc_sext_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]165; CHECK: # %bb.0: # %entry
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]166; CHECK-NEXT: xor r3, r3, r4
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]167; CHECK-NEXT: addis r5, r2, glob@toc@ha
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]168; CHECK-NEXT: cntlzw r3, r3
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]169; CHECK-NEXT: srwi r3, r3, 5
170; CHECK-NEXT: xori r3, r3, 1
171; CHECK-NEXT: neg r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]172; CHECK-NEXT: stb r3, glob@toc@l(r5)
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]173; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]174; CHECK-BE-LABEL: test_ineuc_sext_store:
175; CHECK-BE: # %bb.0: # %entry
176; CHECK-BE-NEXT: xor r3, r3, r4
177; CHECK-BE-NEXT: addis r5, r2, .LC0@toc@ha
178; CHECK-BE-NEXT: cntlzw r3, r3
179; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r5)
180; CHECK-BE-NEXT: srwi r3, r3, 5
181; CHECK-BE-NEXT: xori r3, r3, 1
182; CHECK-BE-NEXT: neg r3, r3
183; CHECK-BE-NEXT: stb r3, 0(r4)
184; CHECK-BE-NEXT: blr
185;
186; CHECK-LE-LABEL: test_ineuc_sext_store:
187; CHECK-LE: # %bb.0: # %entry
188; CHECK-LE-NEXT: xor r3, r3, r4
189; CHECK-LE-NEXT: addis r5, r2, glob@toc@ha
190; CHECK-LE-NEXT: cntlzw r3, r3
191; CHECK-LE-NEXT: srwi r3, r3, 5
192; CHECK-LE-NEXT: xori r3, r3, 1
193; CHECK-LE-NEXT: neg r3, r3
194; CHECK-LE-NEXT: stb r3, glob@toc@l(r5)
195; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]196entry:
197 %cmp = icmp ne i8 %a, %b
198 %conv3 = sext i1 %cmp to i8
199 store i8 %conv3, i8* @glob, align 1
200 ret void
201}
202
203define void @test_ineuc_z_store(i8 zeroext %a) {
204; CHECK-LABEL: test_ineuc_z_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]205; CHECK: # %bb.0: # %entry
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]206; CHECK-NEXT: cntlzw r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]207; CHECK-NEXT: addis r4, r2, glob@toc@ha
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]208; CHECK-NEXT: srwi r3, r3, 5
209; CHECK-NEXT: xori r3, r3, 1
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]210; CHECK-NEXT: stb r3, glob@toc@l(r4)
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]211; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]212; CHECK-BE-LABEL: test_ineuc_z_store:
213; CHECK-BE: # %bb.0: # %entry
214; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
215; CHECK-BE-NEXT: cntlzw r3, r3
216; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
217; CHECK-BE-NEXT: srwi r3, r3, 5
218; CHECK-BE-NEXT: xori r3, r3, 1
219; CHECK-BE-NEXT: stb r3, 0(r4)
220; CHECK-BE-NEXT: blr
221;
222; CHECK-LE-LABEL: test_ineuc_z_store:
223; CHECK-LE: # %bb.0: # %entry
224; CHECK-LE-NEXT: cntlzw r3, r3
225; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
226; CHECK-LE-NEXT: srwi r3, r3, 5
227; CHECK-LE-NEXT: xori r3, r3, 1
228; CHECK-LE-NEXT: stb r3, glob@toc@l(r4)
229; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]230entry:
231 %cmp = icmp ne i8 %a, 0
232 %conv2 = zext i1 %cmp to i8
233 store i8 %conv2, i8* @glob, align 1
234 ret void
235}
236
237define void @test_ineuc_sext_z_store(i8 zeroext %a) {
238; CHECK-LABEL: test_ineuc_sext_z_store:
Francis Visoiu Mistrih25528d62017-12-04 17:18:51 +0000[diff] [blame]239; CHECK: # %bb.0: # %entry
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]240; CHECK-NEXT: cntlzw r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]241; CHECK-NEXT: addis r4, r2, glob@toc@ha
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]242; CHECK-NEXT: srwi r3, r3, 5
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]243; CHECK-NEXT: xori r3, r3, 1
244; CHECK-NEXT: neg r3, r3
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]245; CHECK-NEXT: stb r3, glob@toc@l(r4)
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]246; CHECK-NEXT: blr
Stefan Pintilie46f840f2018-12-04 20:14:57 +0000[diff] [blame]247; CHECK-BE-LABEL: test_ineuc_sext_z_store:
248; CHECK-BE: # %bb.0: # %entry
249; CHECK-BE-NEXT: addis r4, r2, .LC0@toc@ha
250; CHECK-BE-NEXT: cntlzw r3, r3
251; CHECK-BE-NEXT: srwi r3, r3, 5
252; CHECK-BE-NEXT: ld r4, .LC0@toc@l(r4)
253; CHECK-BE-NEXT: xori r3, r3, 1
254; CHECK-BE-NEXT: neg r3, r3
255; CHECK-BE-NEXT: stb r3, 0(r4)
256; CHECK-BE-NEXT: blr
257;
258; CHECK-LE-LABEL: test_ineuc_sext_z_store:
259; CHECK-LE: # %bb.0: # %entry
260; CHECK-LE-NEXT: cntlzw r3, r3
261; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha
262; CHECK-LE-NEXT: srwi r3, r3, 5
263; CHECK-LE-NEXT: xori r3, r3, 1
264; CHECK-LE-NEXT: neg r3, r3
265; CHECK-LE-NEXT: stb r3, glob@toc@l(r4)
266; CHECK-LE-NEXT: blr
Nemanja Ivanovicbb67f842017-06-07 12:23:41 +0000[diff] [blame]267entry:
268 %cmp = icmp ne i8 %a, 0
269 %conv2 = sext i1 %cmp to i8
270 store i8 %conv2, i8* @glob, align 1
271 ret void
272}