Vincent Lejeune | ab3baf8 | 2013-09-12 23:44:44 +0000 | [diff] [blame] | 1 | ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s |
| 2 | |
Tom Stellard | 79243d9 | 2014-10-01 17:15:17 +0000 | [diff] [blame] | 3 | ; CHECK: {{^}}main: |
Vincent Lejeune | ab3baf8 | 2013-09-12 23:44:44 +0000 | [diff] [blame] | 4 | ; CHECK-NOT: MOV |
Nicolai Haehnle | df3a20c | 2016-04-06 19:40:20 +0000 | [diff] [blame] | 5 | define amdgpu_ps void @main(<4 x float> inreg %reg0) { |
Vincent Lejeune | ab3baf8 | 2013-09-12 23:44:44 +0000 | [diff] [blame] | 6 | entry: |
Vincent Lejeune | f143af3 | 2013-11-11 22:10:24 +0000 | [diff] [blame] | 7 | %0 = extractelement <4 x float> %reg0, i32 0 |
Vincent Lejeune | ab3baf8 | 2013-09-12 23:44:44 +0000 | [diff] [blame] | 8 | %1 = call float @fabs(float %0) |
| 9 | %2 = fptoui float %1 to i32 |
| 10 | %3 = bitcast i32 %2 to float |
| 11 | %4 = insertelement <4 x float> undef, float %3, i32 0 |
Matt Arsenault | 82e5e1e | 2016-07-15 21:27:08 +0000 | [diff] [blame^] | 12 | call void @llvm.r600.store.swizzle(<4 x float> %4, i32 0, i32 0) |
Vincent Lejeune | ab3baf8 | 2013-09-12 23:44:44 +0000 | [diff] [blame] | 13 | ret void |
| 14 | } |
| 15 | |
Vincent Lejeune | ab3baf8 | 2013-09-12 23:44:44 +0000 | [diff] [blame] | 16 | declare float @fabs(float ) readnone |
Matt Arsenault | 82e5e1e | 2016-07-15 21:27:08 +0000 | [diff] [blame^] | 17 | declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) |