blob: 7cf380520d428ddf2a1bc4567aab984bbab94366 [file] [log] [blame]
Marek Olsak37cd4d02015-02-03 21:53:27 +00001; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG %s
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +00002
Marek Olsak37cd4d02015-02-03 21:53:27 +00003;EG: {{^}}main:
4;EG: EXPORT T{{[0-9]+}}.XYXX
5;EG: EXPORT T{{[0-9]+}}.ZXXX
6;EG: EXPORT T{{[0-9]+}}.XXWX
7;EG: EXPORT T{{[0-9]+}}.XXXW
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +00008
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +00009define amdgpu_vs void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1) {
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000010main_body:
Vincent Lejeunef143af32013-11-11 22:10:24 +000011 %0 = extractelement <4 x float> %reg1, i32 0
12 %1 = extractelement <4 x float> %reg1, i32 1
13 %2 = extractelement <4 x float> %reg1, i32 2
14 %3 = extractelement <4 x float> %reg1, i32 3
David Blaikiea79ac142015-02-27 21:17:42 +000015 %4 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000016 %5 = extractelement <4 x float> %4, i32 1
David Blaikiea79ac142015-02-27 21:17:42 +000017 %6 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000018 %7 = extractelement <4 x float> %6, i32 2
David Blaikiea79ac142015-02-27 21:17:42 +000019 %8 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000020 %9 = extractelement <4 x float> %8, i32 0
21 %10 = fmul float 0.000000e+00, %9
David Blaikiea79ac142015-02-27 21:17:42 +000022 %11 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000023 %12 = extractelement <4 x float> %11, i32 0
24 %13 = fmul float %5, %12
David Blaikiea79ac142015-02-27 21:17:42 +000025 %14 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000026 %15 = extractelement <4 x float> %14, i32 0
27 %16 = fmul float 0.000000e+00, %15
David Blaikiea79ac142015-02-27 21:17:42 +000028 %17 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000029 %18 = extractelement <4 x float> %17, i32 0
30 %19 = fmul float 0.000000e+00, %18
David Blaikiea79ac142015-02-27 21:17:42 +000031 %20 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000032 %21 = extractelement <4 x float> %20, i32 0
33 %22 = fmul float %7, %21
David Blaikiea79ac142015-02-27 21:17:42 +000034 %23 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000035 %24 = extractelement <4 x float> %23, i32 0
36 %25 = fmul float 0.000000e+00, %24
David Blaikiea79ac142015-02-27 21:17:42 +000037 %26 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000038 %27 = extractelement <4 x float> %26, i32 0
39 %28 = fmul float 0.000000e+00, %27
David Blaikiea79ac142015-02-27 21:17:42 +000040 %29 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000041 %30 = extractelement <4 x float> %29, i32 0
42 %31 = fmul float 0.000000e+00, %30
David Blaikiea79ac142015-02-27 21:17:42 +000043 %32 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000044 %33 = extractelement <4 x float> %32, i32 0
45 %34 = fmul float 0.000000e+00, %33
David Blaikiea79ac142015-02-27 21:17:42 +000046 %35 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000047 %36 = extractelement <4 x float> %35, i32 0
48 %37 = fmul float 0.000000e+00, %36
David Blaikiea79ac142015-02-27 21:17:42 +000049 %38 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000050 %39 = extractelement <4 x float> %38, i32 0
51 %40 = fmul float 1.000000e+00, %39
David Blaikiea79ac142015-02-27 21:17:42 +000052 %41 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000053 %42 = extractelement <4 x float> %41, i32 0
54 %43 = fmul float 0.000000e+00, %42
David Blaikiea79ac142015-02-27 21:17:42 +000055 %44 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000056 %45 = extractelement <4 x float> %44, i32 0
57 %46 = fmul float 0.000000e+00, %45
David Blaikiea79ac142015-02-27 21:17:42 +000058 %47 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000059 %48 = extractelement <4 x float> %47, i32 0
60 %49 = fmul float 0.000000e+00, %48
David Blaikiea79ac142015-02-27 21:17:42 +000061 %50 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000062 %51 = extractelement <4 x float> %50, i32 0
63 %52 = fmul float 0.000000e+00, %51
David Blaikiea79ac142015-02-27 21:17:42 +000064 %53 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000065 %54 = extractelement <4 x float> %53, i32 0
66 %55 = fmul float 1.000000e+00, %54
67 %56 = insertelement <4 x float> undef, float %0, i32 0
68 %57 = insertelement <4 x float> %56, float %1, i32 1
69 %58 = insertelement <4 x float> %57, float %2, i32 2
70 %59 = insertelement <4 x float> %58, float %3, i32 3
Matt Arsenault82e5e1e2016-07-15 21:27:08 +000071 call void @llvm.r600.store.swizzle(<4 x float> %59, i32 60, i32 1)
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000072 %60 = insertelement <4 x float> undef, float %10, i32 0
73 %61 = insertelement <4 x float> %60, float %13, i32 1
74 %62 = insertelement <4 x float> %61, float %16, i32 2
75 %63 = insertelement <4 x float> %62, float %19, i32 3
Matt Arsenault82e5e1e2016-07-15 21:27:08 +000076 call void @llvm.r600.store.swizzle(<4 x float> %63, i32 0, i32 2)
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000077 %64 = insertelement <4 x float> undef, float %22, i32 0
78 %65 = insertelement <4 x float> %64, float %25, i32 1
79 %66 = insertelement <4 x float> %65, float %28, i32 2
80 %67 = insertelement <4 x float> %66, float %31, i32 3
Matt Arsenault82e5e1e2016-07-15 21:27:08 +000081 call void @llvm.r600.store.swizzle(<4 x float> %67, i32 1, i32 2)
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000082 %68 = insertelement <4 x float> undef, float %34, i32 0
83 %69 = insertelement <4 x float> %68, float %37, i32 1
84 %70 = insertelement <4 x float> %69, float %40, i32 2
85 %71 = insertelement <4 x float> %70, float %43, i32 3
Matt Arsenault82e5e1e2016-07-15 21:27:08 +000086 call void @llvm.r600.store.swizzle(<4 x float> %71, i32 2, i32 2)
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000087 %72 = insertelement <4 x float> undef, float %46, i32 0
88 %73 = insertelement <4 x float> %72, float %49, i32 1
89 %74 = insertelement <4 x float> %73, float %52, i32 2
90 %75 = insertelement <4 x float> %74, float %55, i32 3
Matt Arsenault82e5e1e2016-07-15 21:27:08 +000091 call void @llvm.r600.store.swizzle(<4 x float> %75, i32 3, i32 2)
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +000092 ret void
93}
94
Marek Olsak37cd4d02015-02-03 21:53:27 +000095; EG: {{^}}main2:
96; EG: T{{[0-9]+}}.XY__
97; EG: T{{[0-9]+}}.ZXY0
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +000098
Nicolai Haehnledf3a20c2016-04-06 19:40:20 +000099define amdgpu_vs void @main2(<4 x float> inreg %reg0, <4 x float> inreg %reg1) {
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +0000100main_body:
Vincent Lejeunef143af32013-11-11 22:10:24 +0000101 %0 = extractelement <4 x float> %reg1, i32 0
102 %1 = extractelement <4 x float> %reg1, i32 1
103 %2 = fadd float %0, 2.5
104 %3 = fmul float %1, 3.5
David Blaikief72d05b2015-03-13 18:20:45 +0000105 %4 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +0000106 %5 = extractelement <4 x float> %4, i32 0
107 %6 = call float @llvm.cos.f32(float %5)
David Blaikiea79ac142015-02-27 21:17:42 +0000108 %7 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +0000109 %8 = extractelement <4 x float> %7, i32 0
David Blaikiea79ac142015-02-27 21:17:42 +0000110 %9 = load <4 x float>, <4 x float> addrspace(8)* null
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +0000111 %10 = extractelement <4 x float> %9, i32 1
Vincent Lejeunef143af32013-11-11 22:10:24 +0000112 %11 = insertelement <4 x float> undef, float %2, i32 0
113 %12 = insertelement <4 x float> %11, float %3, i32 1
Matt Arsenault82e5e1e2016-07-15 21:27:08 +0000114 call void @llvm.r600.store.swizzle(<4 x float> %12, i32 60, i32 1)
Vincent Lejeunefa58a5f2013-10-13 17:56:10 +0000115 %13 = insertelement <4 x float> undef, float %6, i32 0
116 %14 = insertelement <4 x float> %13, float %8, i32 1
117 %15 = insertelement <4 x float> %14, float %10, i32 2
118 %16 = insertelement <4 x float> %15, float 0.000000e+00, i32 3
Matt Arsenault82e5e1e2016-07-15 21:27:08 +0000119 call void @llvm.r600.store.swizzle(<4 x float> %16, i32 0, i32 2)
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +0000120 ret void
121}
122
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +0000123; Function Attrs: nounwind readonly
Vincent Lejeunef143af32013-11-11 22:10:24 +0000124declare float @llvm.cos.f32(float) #1
Vincent Lejeuneb8aac8d2013-07-09 15:03:25 +0000125
Matt Arsenault82e5e1e2016-07-15 21:27:08 +0000126declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
Vincent Lejeunea4d8d2e2013-07-09 15:03:19 +0000127
Vincent Lejeunef143af32013-11-11 22:10:24 +0000128attributes #1 = { nounwind readonly }