Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 1 | //===-- AMDGPUInstrInfo.cpp - Base class for AMD GPU InstrInfo ------------===// |
| 2 | // |
Chandler Carruth | 2946cd7 | 2019-01-19 08:50:56 +0000 | [diff] [blame] | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | /// \file |
Tom Stellard | c5a154d | 2018-06-28 23:47:12 +0000 | [diff] [blame] | 10 | /// \brief Implementation of the TargetInstrInfo class that is common to all |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 11 | /// AMD GPUs. |
| 12 | // |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
| 15 | #include "AMDGPUInstrInfo.h" |
| 16 | #include "AMDGPURegisterInfo.h" |
| 17 | #include "AMDGPUTargetMachine.h" |
Tom Stellard | 44b30b4 | 2018-05-22 02:03:23 +0000 | [diff] [blame] | 18 | #include "MCTargetDesc/AMDGPUMCTargetDesc.h" |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 19 | #include "llvm/CodeGen/MachineFrameInfo.h" |
| 20 | #include "llvm/CodeGen/MachineInstrBuilder.h" |
| 21 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
| 22 | |
Chandler Carruth | d174b72 | 2014-04-22 02:03:14 +0000 | [diff] [blame] | 23 | using namespace llvm; |
| 24 | |
Juergen Ributzka | d12ccbd | 2013-11-19 00:57:56 +0000 | [diff] [blame] | 25 | // Pin the vtable to this file. |
Tom Stellard | c5a154d | 2018-06-28 23:47:12 +0000 | [diff] [blame] | 26 | //void AMDGPUInstrInfo::anchor() {} |
Juergen Ributzka | d12ccbd | 2013-11-19 00:57:56 +0000 | [diff] [blame] | 27 | |
Tom Stellard | 5bfbae5 | 2018-07-11 20:59:01 +0000 | [diff] [blame] | 28 | AMDGPUInstrInfo::AMDGPUInstrInfo(const GCNSubtarget &ST) { } |
Tom Stellard | 75aadc2 | 2012-12-11 21:25:42 +0000 | [diff] [blame] | 29 | |
Matt Arsenault | bcf7bec | 2018-02-09 16:57:48 +0000 | [diff] [blame] | 30 | |
| 31 | // TODO: Should largely merge with AMDGPUTTIImpl::isSourceOfDivergence. |
| 32 | bool AMDGPUInstrInfo::isUniformMMO(const MachineMemOperand *MMO) { |
| 33 | const Value *Ptr = MMO->getValue(); |
| 34 | // UndefValue means this is a load of a kernel input. These are uniform. |
| 35 | // Sometimes LDS instructions have constant pointers. |
| 36 | // If Ptr is null, then that means this mem operand contains a |
| 37 | // PseudoSourceValue like GOT. |
| 38 | if (!Ptr || isa<UndefValue>(Ptr) || |
| 39 | isa<Constant>(Ptr) || isa<GlobalValue>(Ptr)) |
| 40 | return true; |
| 41 | |
Matt Arsenault | 923712b | 2018-02-09 16:57:57 +0000 | [diff] [blame] | 42 | if (MMO->getAddrSpace() == AMDGPUAS::CONSTANT_ADDRESS_32BIT) |
| 43 | return true; |
| 44 | |
Matt Arsenault | bcf7bec | 2018-02-09 16:57:48 +0000 | [diff] [blame] | 45 | if (const Argument *Arg = dyn_cast<Argument>(Ptr)) |
| 46 | return AMDGPU::isArgPassedInSGPR(Arg); |
| 47 | |
| 48 | const Instruction *I = dyn_cast<Instruction>(Ptr); |
| 49 | return I && I->getMetadata("amdgpu.uniform"); |
| 50 | } |