blob: 8ea317fdd45339b086005747da3245bb80eed321 [file] [log] [blame]
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +00001//===-- SparcMCInstLower.cpp - Convert Sparc MachineInstr to MCInst -------===//
2//
Chandler Carruth2946cd72019-01-19 08:50:56 +00003// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +00006//
7//===----------------------------------------------------------------------===//
8//
9// This file contains code to lower Sparc MachineInstrs to their corresponding
10// MCInst records.
11//
12//===----------------------------------------------------------------------===//
13
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000014#include "MCTargetDesc/SparcMCExpr.h"
Chandler Carruth6bda14b2017-06-06 11:49:48 +000015#include "Sparc.h"
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000016#include "llvm/CodeGen/AsmPrinter.h"
17#include "llvm/CodeGen/MachineFunction.h"
18#include "llvm/CodeGen/MachineInstr.h"
19#include "llvm/CodeGen/MachineOperand.h"
Rafael Espindola894843c2014-01-07 21:19:40 +000020#include "llvm/IR/Mangler.h"
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000021#include "llvm/MC/MCAsmInfo.h"
Chandler Carruth8a8cd2b2014-01-07 11:48:04 +000022#include "llvm/MC/MCContext.h"
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000023#include "llvm/MC/MCExpr.h"
24#include "llvm/MC/MCInst.h"
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000025
26using namespace llvm;
27
28
29static MCOperand LowerSymbolOperand(const MachineInstr *MI,
30 const MachineOperand &MO,
31 AsmPrinter &AP) {
32
Venkatraman Govindarajudfe09b12014-02-07 02:36:06 +000033 SparcMCExpr::VariantKind Kind =
34 (SparcMCExpr::VariantKind)MO.getTargetFlags();
Craig Topper062a2ba2014-04-25 05:30:21 +000035 const MCSymbol *Symbol = nullptr;
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000036
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000037 switch(MO.getType()) {
38 default: llvm_unreachable("Unknown type in LowerSymbolOperand");
39 case MachineOperand::MO_MachineBasicBlock:
40 Symbol = MO.getMBB()->getSymbol();
41 break;
42
43 case MachineOperand::MO_GlobalAddress:
44 Symbol = AP.getSymbol(MO.getGlobal());
45 break;
46
47 case MachineOperand::MO_BlockAddress:
48 Symbol = AP.GetBlockAddressSymbol(MO.getBlockAddress());
49 break;
50
51 case MachineOperand::MO_ExternalSymbol:
52 Symbol = AP.GetExternalSymbolSymbol(MO.getSymbolName());
53 break;
54
55 case MachineOperand::MO_ConstantPoolIndex:
56 Symbol = AP.GetCPISymbol(MO.getIndex());
57 break;
58 }
59
Jim Grosbach13760bd2015-05-30 01:25:56 +000060 const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::create(Symbol,
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000061 AP.OutContext);
Jim Grosbach13760bd2015-05-30 01:25:56 +000062 const SparcMCExpr *expr = SparcMCExpr::create(Kind, MCSym,
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000063 AP.OutContext);
Jim Grosbache9119e42015-05-13 18:37:00 +000064 return MCOperand::createExpr(expr);
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000065}
66
67static MCOperand LowerOperand(const MachineInstr *MI,
68 const MachineOperand &MO,
69 AsmPrinter &AP) {
70 switch(MO.getType()) {
71 default: llvm_unreachable("unknown operand type"); break;
72 case MachineOperand::MO_Register:
73 if (MO.isImplicit())
74 break;
Jim Grosbache9119e42015-05-13 18:37:00 +000075 return MCOperand::createReg(MO.getReg());
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000076
77 case MachineOperand::MO_Immediate:
Jim Grosbache9119e42015-05-13 18:37:00 +000078 return MCOperand::createImm(MO.getImm());
Venkatraman Govindarajubf683fd2013-12-26 01:49:59 +000079
80 case MachineOperand::MO_MachineBasicBlock:
81 case MachineOperand::MO_GlobalAddress:
82 case MachineOperand::MO_BlockAddress:
83 case MachineOperand::MO_ExternalSymbol:
84 case MachineOperand::MO_ConstantPoolIndex:
85 return LowerSymbolOperand(MI, MO, AP);
86
87 case MachineOperand::MO_RegisterMask: break;
88
89 }
90 return MCOperand();
91}
92
93void llvm::LowerSparcMachineInstrToMCInst(const MachineInstr *MI,
94 MCInst &OutMI,
95 AsmPrinter &AP)
96{
97
98 OutMI.setOpcode(MI->getOpcode());
99
100 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
101 const MachineOperand &MO = MI->getOperand(i);
102 MCOperand MCOp = LowerOperand(MI, MO, AP);
103
104 if (MCOp.isValid())
105 OutMI.addOperand(MCOp);
106 }
107}