Jia Liu | f54f60f | 2012-02-28 07:46:26 +0000 | [diff] [blame] | 1 | //===-- MipsInstrFPU.td - Mips FPU Instruction Information -*- tablegen -*-===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 9 | // |
Eric Christopher | 5dc19f9 | 2011-05-09 18:16:46 +0000 | [diff] [blame] | 10 | // This file describes the Mips FPU instruction set. |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 11 | // |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 12 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 13 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 14 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 7ceec57 | 2008-07-09 04:45:36 +0000 | [diff] [blame] | 15 | // Floating Point Instructions |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 16 | // ------------------------ |
| 17 | // * 64bit fp: |
| 18 | // - 32 64-bit registers (default mode) |
| 19 | // - 16 even 32-bit registers (32-bit compatible mode) for |
| 20 | // single and double access. |
| 21 | // * 32bit fp: |
| 22 | // - 16 even 32-bit registers - single and double (aliased) |
| 23 | // - 32 32-bit registers (within single-only mode) |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 24 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 25 | |
Bruno Cardoso Lopes | 7ceec57 | 2008-07-09 04:45:36 +0000 | [diff] [blame] | 26 | // Floating Point Compare and Branch |
Akira Hatanaka | 1fb1b8b | 2013-07-26 20:13:47 +0000 | [diff] [blame] | 27 | def SDT_MipsFPBrcond : SDTypeProfile<0, 3, [SDTCisInt<0>, |
| 28 | SDTCisVT<1, i32>, |
| 29 | SDTCisVT<2, OtherVT>]>; |
Akira Hatanaka | a535270 | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 30 | def SDT_MipsFPCmp : SDTypeProfile<0, 3, [SDTCisSameAs<0, 1>, SDTCisFP<1>, |
Akira Hatanaka | f25c37e | 2011-09-22 23:31:54 +0000 | [diff] [blame] | 31 | SDTCisVT<2, i32>]>; |
Akira Hatanaka | 8bce21c | 2013-07-26 20:51:20 +0000 | [diff] [blame] | 32 | def SDT_MipsCMovFP : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisVT<2, i32>, |
| 33 | SDTCisSameAs<1, 3>]>; |
Akira Hatanaka | 252f54f | 2013-05-16 21:17:15 +0000 | [diff] [blame] | 34 | def SDT_MipsTruncIntFP : SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisFP<1>]>; |
Akira Hatanaka | 2791697 | 2011-04-15 19:52:08 +0000 | [diff] [blame] | 35 | def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>, |
| 36 | SDTCisVT<1, i32>, |
| 37 | SDTCisSameAs<1, 2>]>; |
| 38 | def SDT_MipsExtractElementF64 : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, |
| 39 | SDTCisVT<1, f64>, |
Akira Hatanaka | f25c37e | 2011-09-22 23:31:54 +0000 | [diff] [blame] | 40 | SDTCisVT<2, i32>]>; |
Bruno Cardoso Lopes | a72a505 | 2009-05-27 17:23:44 +0000 | [diff] [blame] | 41 | |
Akira Hatanaka | a535270 | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 42 | def MipsFPCmp : SDNode<"MipsISD::FPCmp", SDT_MipsFPCmp, [SDNPOutGlue]>; |
| 43 | def MipsCMovFP_T : SDNode<"MipsISD::CMovFP_T", SDT_MipsCMovFP, [SDNPInGlue]>; |
| 44 | def MipsCMovFP_F : SDNode<"MipsISD::CMovFP_F", SDT_MipsCMovFP, [SDNPInGlue]>; |
Bruno Cardoso Lopes | ed874ef | 2011-03-04 17:51:39 +0000 | [diff] [blame] | 45 | def MipsFPBrcond : SDNode<"MipsISD::FPBrcond", SDT_MipsFPBrcond, |
Akira Hatanaka | a535270 | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 46 | [SDNPHasChain, SDNPOptInGlue]>; |
Akira Hatanaka | 252f54f | 2013-05-16 21:17:15 +0000 | [diff] [blame] | 47 | def MipsTruncIntFP : SDNode<"MipsISD::TruncIntFP", SDT_MipsTruncIntFP>; |
Akira Hatanaka | 2791697 | 2011-04-15 19:52:08 +0000 | [diff] [blame] | 48 | def MipsBuildPairF64 : SDNode<"MipsISD::BuildPairF64", SDT_MipsBuildPairF64>; |
| 49 | def MipsExtractElementF64 : SDNode<"MipsISD::ExtractElementF64", |
| 50 | SDT_MipsExtractElementF64>; |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 51 | |
| 52 | // Operand for printing out a condition code. |
Akira Hatanaka | 71928e6 | 2012-04-17 18:03:21 +0000 | [diff] [blame] | 53 | let PrintMethod = "printFCCOperand", DecoderMethod = "DecodeCondCode" in |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 54 | def condcode : Operand<i32>; |
| 55 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 56 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 57 | // Feature predicates. |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 58 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 59 | |
Akira Hatanaka | d8ab16b | 2012-06-14 21:03:23 +0000 | [diff] [blame] | 60 | def IsFP64bit : Predicate<"Subtarget.isFP64bit()">, |
| 61 | AssemblerPredicate<"FeatureFP64Bit">; |
| 62 | def NotFP64bit : Predicate<"!Subtarget.isFP64bit()">, |
| 63 | AssemblerPredicate<"!FeatureFP64Bit">; |
| 64 | def IsSingleFloat : Predicate<"Subtarget.isSingleFloat()">, |
| 65 | AssemblerPredicate<"FeatureSingleFloat">; |
| 66 | def IsNotSingleFloat : Predicate<"!Subtarget.isSingleFloat()">, |
| 67 | AssemblerPredicate<"!FeatureSingleFloat">; |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 68 | |
Akira Hatanaka | 60f7a8e | 2012-02-25 00:21:52 +0000 | [diff] [blame] | 69 | // FP immediate patterns. |
| 70 | def fpimm0 : PatLeaf<(fpimm), [{ |
| 71 | return N->isExactlyValue(+0.0); |
| 72 | }]>; |
| 73 | |
| 74 | def fpimm0neg : PatLeaf<(fpimm), [{ |
| 75 | return N->isExactlyValue(-0.0); |
| 76 | }]>; |
| 77 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 78 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 79 | // Instruction Class Templates |
| 80 | // |
Bruno Cardoso Lopes | ed874ef | 2011-03-04 17:51:39 +0000 | [diff] [blame] | 81 | // A set of multiclasses is used to address the register usage. |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 82 | // |
Jakob Stoklund Olesen | 6728958 | 2011-09-28 23:59:28 +0000 | [diff] [blame] | 83 | // S32 - single precision in 16 32bit even fp registers |
Bruno Cardoso Lopes | 9b9586a | 2009-03-21 00:05:07 +0000 | [diff] [blame] | 84 | // single precision in 32 32bit fp registers in SingleOnly mode |
Jakob Stoklund Olesen | 6728958 | 2011-09-28 23:59:28 +0000 | [diff] [blame] | 85 | // S64 - single precision in 32 64bit fp registers (In64BitMode) |
Bruno Cardoso Lopes | 9b9586a | 2009-03-21 00:05:07 +0000 | [diff] [blame] | 86 | // D32 - double precision in 16 32bit even fp registers |
| 87 | // D64 - double precision in 32 64bit fp registers (In64BitMode) |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 88 | // |
Jakob Stoklund Olesen | 6728958 | 2011-09-28 23:59:28 +0000 | [diff] [blame] | 89 | // Only S32 and D32 are supported right now. |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 90 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 91 | |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 92 | class ADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, bit IsComm, |
Akira Hatanaka | 29b5138 | 2012-12-13 01:07:37 +0000 | [diff] [blame] | 93 | SDPatternOperator OpNode= null_frag> : |
| 94 | InstSE<(outs RC:$fd), (ins RC:$fs, RC:$ft), |
| 95 | !strconcat(opstr, "\t$fd, $fs, $ft"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 96 | [(set RC:$fd, (OpNode RC:$fs, RC:$ft))], Itin, FrmFR, opstr> { |
Akira Hatanaka | 29b5138 | 2012-12-13 01:07:37 +0000 | [diff] [blame] | 97 | let isCommutable = IsComm; |
| 98 | } |
| 99 | |
| 100 | multiclass ADDS_M<string opstr, InstrItinClass Itin, bit IsComm, |
| 101 | SDPatternOperator OpNode = null_frag> { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 102 | def _D32 : MMRel, ADDS_FT<opstr, AFGR64Opnd, Itin, IsComm, OpNode>, |
Akira Hatanaka | 29b5138 | 2012-12-13 01:07:37 +0000 | [diff] [blame] | 103 | Requires<[NotFP64bit, HasStdEnc]>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 104 | def _D64 : ADDS_FT<opstr, FGR64Opnd, Itin, |
| 105 | IsComm, OpNode>, |
Akira Hatanaka | 29b5138 | 2012-12-13 01:07:37 +0000 | [diff] [blame] | 106 | Requires<[IsFP64bit, HasStdEnc]> { |
| 107 | string DecoderNamespace = "Mips64"; |
| 108 | } |
| 109 | } |
| 110 | |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 111 | class ABSS_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 112 | InstrItinClass Itin, SDPatternOperator OpNode= null_frag> : |
| 113 | InstSE<(outs DstRC:$fd), (ins SrcRC:$fs), !strconcat(opstr, "\t$fd, $fs"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 114 | [(set DstRC:$fd, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>, |
Akira Hatanaka | 28aed9c | 2013-01-25 00:20:39 +0000 | [diff] [blame] | 115 | NeverHasSideEffects; |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 116 | |
| 117 | multiclass ABSS_M<string opstr, InstrItinClass Itin, |
| 118 | SDPatternOperator OpNode= null_frag> { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 119 | def _D32 : MMRel, ABSS_FT<opstr, AFGR64Opnd, AFGR64Opnd, Itin, OpNode>, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 120 | Requires<[NotFP64bit, HasStdEnc]>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 121 | def _D64 : ABSS_FT<opstr, FGR64Opnd, FGR64Opnd, Itin, OpNode>, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 122 | Requires<[IsFP64bit, HasStdEnc]> { |
| 123 | string DecoderNamespace = "Mips64"; |
| 124 | } |
| 125 | } |
| 126 | |
| 127 | multiclass ROUND_M<string opstr, InstrItinClass Itin> { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 128 | def _D32 : MMRel, ABSS_FT<opstr, FGR32Opnd, AFGR64Opnd, Itin>, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 129 | Requires<[NotFP64bit, HasStdEnc]>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 130 | def _D64 : ABSS_FT<opstr, FGR32Opnd, FGR64Opnd, Itin>, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 131 | Requires<[IsFP64bit, HasStdEnc]> { |
| 132 | let DecoderNamespace = "Mips64"; |
| 133 | } |
| 134 | } |
| 135 | |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 136 | class MFC1_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC, |
Akira Hatanaka | 2b75dde | 2012-12-13 01:16:49 +0000 | [diff] [blame] | 137 | InstrItinClass Itin, SDPatternOperator OpNode= null_frag> : |
| 138 | InstSE<(outs DstRC:$rt), (ins SrcRC:$fs), !strconcat(opstr, "\t$rt, $fs"), |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 139 | [(set DstRC:$rt, (OpNode SrcRC:$fs))], Itin, FrmFR, opstr>; |
Akira Hatanaka | 2b75dde | 2012-12-13 01:16:49 +0000 | [diff] [blame] | 140 | |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 141 | class MTC1_FT<string opstr, RegisterOperand DstRC, RegisterOperand SrcRC, |
Akira Hatanaka | 2b75dde | 2012-12-13 01:16:49 +0000 | [diff] [blame] | 142 | InstrItinClass Itin, SDPatternOperator OpNode= null_frag> : |
| 143 | InstSE<(outs DstRC:$fs), (ins SrcRC:$rt), !strconcat(opstr, "\t$rt, $fs"), |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 144 | [(set DstRC:$fs, (OpNode SrcRC:$rt))], Itin, FrmFR, opstr>; |
Akira Hatanaka | 2b75dde | 2012-12-13 01:16:49 +0000 | [diff] [blame] | 145 | |
Vladimir Medic | 233dd51 | 2013-06-24 10:05:34 +0000 | [diff] [blame] | 146 | class LW_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, |
Akira Hatanaka | 6781fc1 | 2013-08-20 21:08:22 +0000 | [diff] [blame] | 147 | SDPatternOperator OpNode= null_frag> : |
| 148 | InstSE<(outs RC:$rt), (ins mem:$addr), !strconcat(opstr, "\t$rt, $addr"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 149 | [(set RC:$rt, (OpNode addrDefault:$addr))], Itin, FrmFI, opstr> { |
Akira Hatanaka | 92994f4 | 2012-12-13 01:24:00 +0000 | [diff] [blame] | 150 | let DecoderMethod = "DecodeFMem"; |
Akira Hatanaka | 9edae02 | 2013-05-13 18:23:35 +0000 | [diff] [blame] | 151 | let mayLoad = 1; |
Akira Hatanaka | 92994f4 | 2012-12-13 01:24:00 +0000 | [diff] [blame] | 152 | } |
| 153 | |
Vladimir Medic | 233dd51 | 2013-06-24 10:05:34 +0000 | [diff] [blame] | 154 | class SW_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, |
Akira Hatanaka | 6781fc1 | 2013-08-20 21:08:22 +0000 | [diff] [blame] | 155 | SDPatternOperator OpNode= null_frag> : |
| 156 | InstSE<(outs), (ins RC:$rt, mem:$addr), !strconcat(opstr, "\t$rt, $addr"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 157 | [(OpNode RC:$rt, addrDefault:$addr)], Itin, FrmFI, opstr> { |
Akira Hatanaka | 92994f4 | 2012-12-13 01:24:00 +0000 | [diff] [blame] | 158 | let DecoderMethod = "DecodeFMem"; |
Akira Hatanaka | 9edae02 | 2013-05-13 18:23:35 +0000 | [diff] [blame] | 159 | let mayStore = 1; |
Akira Hatanaka | 92994f4 | 2012-12-13 01:24:00 +0000 | [diff] [blame] | 160 | } |
Akira Hatanaka | 2b75dde | 2012-12-13 01:16:49 +0000 | [diff] [blame] | 161 | |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 162 | class MADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 163 | SDPatternOperator OpNode = null_frag> : |
| 164 | InstSE<(outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft), |
| 165 | !strconcat(opstr, "\t$fd, $fr, $fs, $ft"), |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 166 | [(set RC:$fd, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr))], Itin, |
| 167 | FrmFR, opstr>; |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 168 | |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 169 | class NMADDS_FT<string opstr, RegisterOperand RC, InstrItinClass Itin, |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 170 | SDPatternOperator OpNode = null_frag> : |
| 171 | InstSE<(outs RC:$fd), (ins RC:$fr, RC:$fs, RC:$ft), |
| 172 | !strconcat(opstr, "\t$fd, $fr, $fs, $ft"), |
| 173 | [(set RC:$fd, (fsub fpimm0, (OpNode (fmul RC:$fs, RC:$ft), RC:$fr)))], |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 174 | Itin, FrmFR, opstr>; |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 175 | |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 176 | class LWXC1_FT<string opstr, RegisterOperand DRC, |
Akira Hatanaka | cd3dfd2 | 2012-12-13 01:30:49 +0000 | [diff] [blame] | 177 | InstrItinClass Itin, SDPatternOperator OpNode = null_frag> : |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 178 | InstSE<(outs DRC:$fd), (ins PtrRC:$base, PtrRC:$index), |
Akira Hatanaka | cd3dfd2 | 2012-12-13 01:30:49 +0000 | [diff] [blame] | 179 | !strconcat(opstr, "\t$fd, ${index}(${base})"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 180 | [(set DRC:$fd, (OpNode (add iPTR:$base, iPTR:$index)))], Itin, |
| 181 | FrmFI, opstr> { |
Akira Hatanaka | 69fb3d1 | 2013-02-15 21:20:45 +0000 | [diff] [blame] | 182 | let AddedComplexity = 20; |
| 183 | } |
Akira Hatanaka | cd3dfd2 | 2012-12-13 01:30:49 +0000 | [diff] [blame] | 184 | |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 185 | class SWXC1_FT<string opstr, RegisterOperand DRC, |
Akira Hatanaka | cd3dfd2 | 2012-12-13 01:30:49 +0000 | [diff] [blame] | 186 | InstrItinClass Itin, SDPatternOperator OpNode = null_frag> : |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 187 | InstSE<(outs), (ins DRC:$fs, PtrRC:$base, PtrRC:$index), |
Akira Hatanaka | cd3dfd2 | 2012-12-13 01:30:49 +0000 | [diff] [blame] | 188 | !strconcat(opstr, "\t$fs, ${index}(${base})"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 189 | [(OpNode DRC:$fs, (add iPTR:$base, iPTR:$index))], Itin, |
| 190 | FrmFI, opstr> { |
Akira Hatanaka | 69fb3d1 | 2013-02-15 21:20:45 +0000 | [diff] [blame] | 191 | let AddedComplexity = 20; |
| 192 | } |
Akira Hatanaka | cd3dfd2 | 2012-12-13 01:30:49 +0000 | [diff] [blame] | 193 | |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 194 | class BC1F_FT<string opstr, DAGOperand opnd, InstrItinClass Itin, |
Akira Hatanaka | fd9163b | 2012-12-13 01:32:36 +0000 | [diff] [blame] | 195 | SDPatternOperator Op = null_frag> : |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 196 | InstSE<(outs), (ins FCCRegsOpnd:$fcc, opnd:$offset), |
Akira Hatanaka | 1fb1b8b | 2013-07-26 20:13:47 +0000 | [diff] [blame] | 197 | !strconcat(opstr, "\t$fcc, $offset"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 198 | [(MipsFPBrcond Op, FCCRegsOpnd:$fcc, bb:$offset)], Itin, |
| 199 | FrmFI, opstr> { |
Akira Hatanaka | fd9163b | 2012-12-13 01:32:36 +0000 | [diff] [blame] | 200 | let isBranch = 1; |
| 201 | let isTerminator = 1; |
| 202 | let hasDelaySlot = 1; |
| 203 | let Defs = [AT]; |
Akira Hatanaka | fd9163b | 2012-12-13 01:32:36 +0000 | [diff] [blame] | 204 | } |
| 205 | |
Akira Hatanaka | 79e1cdb | 2012-12-13 01:34:09 +0000 | [diff] [blame] | 206 | class CEQS_FT<string typestr, RegisterClass RC, InstrItinClass Itin, |
| 207 | SDPatternOperator OpNode = null_frag> : |
| 208 | InstSE<(outs), (ins RC:$fs, RC:$ft, condcode:$cond), |
| 209 | !strconcat("c.$cond.", typestr, "\t$fs, $ft"), |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 210 | [(OpNode RC:$fs, RC:$ft, imm:$cond)], Itin, FrmFR, |
| 211 | !strconcat("c.$cond.", typestr)> { |
Akira Hatanaka | 55f69b3 | 2013-07-26 19:01:56 +0000 | [diff] [blame] | 212 | let Defs = [FCC0]; |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 213 | let isCodeGenOnly = 1; |
Akira Hatanaka | 79e1cdb | 2012-12-13 01:34:09 +0000 | [diff] [blame] | 214 | } |
| 215 | |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 216 | class C_COND_FT<string CondStr, string Typestr, RegisterOperand RC> : |
| 217 | InstSE<(outs), (ins RC:$fs, RC:$ft), |
| 218 | !strconcat("c.", CondStr, ".", Typestr, "\t$fs, $ft"), [], IIFcmp, |
| 219 | FrmFR>; |
| 220 | |
| 221 | multiclass C_COND_M<string TypeStr, RegisterOperand RC, bits<5> fmt> { |
| 222 | def C_F_#NAME : C_COND_FT<"f", TypeStr, RC>, C_COND_FM<fmt, 0>; |
| 223 | def C_UN_#NAME : C_COND_FT<"un", TypeStr, RC>, C_COND_FM<fmt, 1>; |
| 224 | def C_EQ_#NAME : C_COND_FT<"eq", TypeStr, RC>, C_COND_FM<fmt, 2>; |
| 225 | def C_UEQ_#NAME : C_COND_FT<"ueq", TypeStr, RC>, C_COND_FM<fmt, 3>; |
| 226 | def C_OLT_#NAME : C_COND_FT<"olt", TypeStr, RC>, C_COND_FM<fmt, 4>; |
| 227 | def C_ULT_#NAME : C_COND_FT<"ult", TypeStr, RC>, C_COND_FM<fmt, 5>; |
| 228 | def C_OLE_#NAME : C_COND_FT<"ole", TypeStr, RC>, C_COND_FM<fmt, 6>; |
| 229 | def C_ULE_#NAME : C_COND_FT<"ule", TypeStr, RC>, C_COND_FM<fmt, 7>; |
| 230 | def C_SF_#NAME : C_COND_FT<"sf", TypeStr, RC>, C_COND_FM<fmt, 8>; |
| 231 | def C_NGLE_#NAME : C_COND_FT<"ngle", TypeStr, RC>, C_COND_FM<fmt, 9>; |
| 232 | def C_SEQ_#NAME : C_COND_FT<"seq", TypeStr, RC>, C_COND_FM<fmt, 10>; |
| 233 | def C_NGL_#NAME : C_COND_FT<"ngl", TypeStr, RC>, C_COND_FM<fmt, 11>; |
| 234 | def C_LT_#NAME : C_COND_FT<"lt", TypeStr, RC>, C_COND_FM<fmt, 12>; |
| 235 | def C_NGE_#NAME : C_COND_FT<"nge", TypeStr, RC>, C_COND_FM<fmt, 13>; |
| 236 | def C_LE_#NAME : C_COND_FT<"le", TypeStr, RC>, C_COND_FM<fmt, 14>; |
| 237 | def C_NGT_#NAME : C_COND_FT<"ngt", TypeStr, RC>, C_COND_FM<fmt, 15>; |
| 238 | } |
| 239 | |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 240 | defm S : C_COND_M<"s", FGR32Opnd, 16>; |
| 241 | defm D32 : C_COND_M<"d", AFGR64Opnd, 17>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 242 | Requires<[NotFP64bit, HasStdEnc]>; |
| 243 | let DecoderNamespace = "Mips64" in |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 244 | defm D64 : C_COND_M<"d", FGR64Opnd, 17>, Requires<[IsFP64bit, HasStdEnc]>; |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 245 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 246 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 7ceec57 | 2008-07-09 04:45:36 +0000 | [diff] [blame] | 247 | // Floating Point Instructions |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 248 | //===----------------------------------------------------------------------===// |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 249 | def ROUND_W_S : MMRel, ABSS_FT<"round.w.s", FGR32Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 250 | ABSS_FM<0xc, 16>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 251 | def TRUNC_W_S : MMRel, ABSS_FT<"trunc.w.s", FGR32Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 252 | ABSS_FM<0xd, 16>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 253 | def CEIL_W_S : MMRel, ABSS_FT<"ceil.w.s", FGR32Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 254 | ABSS_FM<0xe, 16>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 255 | def FLOOR_W_S : MMRel, ABSS_FT<"floor.w.s", FGR32Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 256 | ABSS_FM<0xf, 16>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 257 | def CVT_W_S : MMRel, ABSS_FT<"cvt.w.s", FGR32Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 258 | ABSS_FM<0x24, 16>; |
Akira Hatanaka | 13ae13b | 2011-10-08 03:19:38 +0000 | [diff] [blame] | 259 | |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 260 | defm ROUND_W : ROUND_M<"round.w.d", IIFcvt>, ABSS_FM<0xc, 17>; |
| 261 | defm TRUNC_W : ROUND_M<"trunc.w.d", IIFcvt>, ABSS_FM<0xd, 17>; |
| 262 | defm CEIL_W : ROUND_M<"ceil.w.d", IIFcvt>, ABSS_FM<0xe, 17>; |
| 263 | defm FLOOR_W : ROUND_M<"floor.w.d", IIFcvt>, ABSS_FM<0xf, 17>; |
Akira Hatanaka | 28aed9c | 2013-01-25 00:20:39 +0000 | [diff] [blame] | 264 | defm CVT_W : ROUND_M<"cvt.w.d", IIFcvt>, ABSS_FM<0x24, 17>; |
Akira Hatanaka | e986a59 | 2012-12-13 00:29:29 +0000 | [diff] [blame] | 265 | |
| 266 | let Predicates = [IsFP64bit, HasStdEnc], DecoderNamespace = "Mips64" in { |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 267 | def ROUND_L_S : ABSS_FT<"round.l.s", FGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 268 | ABSS_FM<0x8, 16>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 269 | def ROUND_L_D64 : ABSS_FT<"round.l.d", FGR64Opnd, FGR64Opnd, IIFcvt>, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 270 | ABSS_FM<0x8, 17>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 271 | def TRUNC_L_S : ABSS_FT<"trunc.l.s", FGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 272 | ABSS_FM<0x9, 16>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 273 | def TRUNC_L_D64 : ABSS_FT<"trunc.l.d", FGR64Opnd, FGR64Opnd, IIFcvt>, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 274 | ABSS_FM<0x9, 17>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 275 | def CEIL_L_S : ABSS_FT<"ceil.l.s", FGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 276 | ABSS_FM<0xa, 16>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 277 | def CEIL_L_D64 : ABSS_FT<"ceil.l.d", FGR64Opnd, FGR64Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 278 | ABSS_FM<0xa, 17>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 279 | def FLOOR_L_S : ABSS_FT<"floor.l.s", FGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 280 | ABSS_FM<0xb, 16>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 281 | def FLOOR_L_D64 : ABSS_FT<"floor.l.d", FGR64Opnd, FGR64Opnd, IIFcvt>, |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 282 | ABSS_FM<0xb, 17>; |
Akira Hatanaka | e986a59 | 2012-12-13 00:29:29 +0000 | [diff] [blame] | 283 | } |
| 284 | |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 285 | def CVT_S_W : MMRel, ABSS_FT<"cvt.s.w", FGR32Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 286 | ABSS_FM<0x20, 20>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 287 | def CVT_L_S : MMRel, ABSS_FT<"cvt.l.s", FGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 288 | ABSS_FM<0x25, 16>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 289 | def CVT_L_D64: MMRel, ABSS_FT<"cvt.l.d", FGR64Opnd, FGR64Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 290 | ABSS_FM<0x25, 17>; |
Akira Hatanaka | 13ae13b | 2011-10-08 03:19:38 +0000 | [diff] [blame] | 291 | |
Akira Hatanaka | 28aed9c | 2013-01-25 00:20:39 +0000 | [diff] [blame] | 292 | let Predicates = [NotFP64bit, HasStdEnc] in { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 293 | def CVT_S_D32 : MMRel, ABSS_FT<"cvt.s.d", FGR32Opnd, AFGR64Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 294 | ABSS_FM<0x20, 17>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 295 | def CVT_D32_W : MMRel, ABSS_FT<"cvt.d.w", AFGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 296 | ABSS_FM<0x21, 20>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 297 | def CVT_D32_S : MMRel, ABSS_FT<"cvt.d.s", AFGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 298 | ABSS_FM<0x21, 16>; |
Akira Hatanaka | 13ae13b | 2011-10-08 03:19:38 +0000 | [diff] [blame] | 299 | } |
| 300 | |
Akira Hatanaka | 28aed9c | 2013-01-25 00:20:39 +0000 | [diff] [blame] | 301 | let Predicates = [IsFP64bit, HasStdEnc], DecoderNamespace = "Mips64" in { |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 302 | def CVT_S_D64 : ABSS_FT<"cvt.s.d", FGR32Opnd, FGR64Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 303 | ABSS_FM<0x20, 17>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 304 | def CVT_S_L : ABSS_FT<"cvt.s.l", FGR32Opnd, FGR64Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 305 | ABSS_FM<0x20, 21>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 306 | def CVT_D64_W : ABSS_FT<"cvt.d.w", FGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 307 | ABSS_FM<0x21, 20>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 308 | def CVT_D64_S : ABSS_FT<"cvt.d.s", FGR64Opnd, FGR32Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 309 | ABSS_FM<0x21, 16>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 310 | def CVT_D64_L : ABSS_FT<"cvt.d.l", FGR64Opnd, FGR64Opnd, IIFcvt>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 311 | ABSS_FM<0x21, 21>; |
Akira Hatanaka | 13ae13b | 2011-10-08 03:19:38 +0000 | [diff] [blame] | 312 | } |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 313 | |
Akira Hatanaka | 39d40f7 | 2013-05-16 19:48:37 +0000 | [diff] [blame] | 314 | let isPseudo = 1, isCodeGenOnly = 1 in { |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 315 | def PseudoCVT_S_W : ABSS_FT<"", FGR32Opnd, GPR32Opnd, IIFcvt>; |
| 316 | def PseudoCVT_D32_W : ABSS_FT<"", AFGR64Opnd, GPR32Opnd, IIFcvt>; |
| 317 | def PseudoCVT_S_L : ABSS_FT<"", FGR64Opnd, GPR64Opnd, IIFcvt>; |
| 318 | def PseudoCVT_D64_W : ABSS_FT<"", FGR64Opnd, GPR32Opnd, IIFcvt>; |
| 319 | def PseudoCVT_D64_L : ABSS_FT<"", FGR64Opnd, GPR64Opnd, IIFcvt>; |
Akira Hatanaka | 39d40f7 | 2013-05-16 19:48:37 +0000 | [diff] [blame] | 320 | } |
| 321 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 322 | let Predicates = [NoNaNsFPMath, HasStdEnc] in { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 323 | def FABS_S : MMRel, ABSS_FT<"abs.s", FGR32Opnd, FGR32Opnd, IIFcvt, fabs>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 324 | ABSS_FM<0x5, 16>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 325 | def FNEG_S : MMRel, ABSS_FT<"neg.s", FGR32Opnd, FGR32Opnd, IIFcvt, fneg>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 326 | ABSS_FM<0x7, 16>; |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 327 | defm FABS : ABSS_M<"abs.d", IIFcvt, fabs>, ABSS_FM<0x5, 17>; |
| 328 | defm FNEG : ABSS_M<"neg.d", IIFcvt, fneg>, ABSS_FM<0x7, 17>; |
Akira Hatanaka | 47ad674 | 2012-04-11 22:59:08 +0000 | [diff] [blame] | 329 | } |
Akira Hatanaka | e986a59 | 2012-12-13 00:29:29 +0000 | [diff] [blame] | 330 | |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 331 | def FSQRT_S : MMRel, ABSS_FT<"sqrt.s", FGR32Opnd, FGR32Opnd, IIFsqrtSingle, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 332 | fsqrt>, ABSS_FM<0x4, 16>; |
Akira Hatanaka | dea8f61 | 2012-12-13 01:14:07 +0000 | [diff] [blame] | 333 | defm FSQRT : ABSS_M<"sqrt.d", IIFsqrtDouble, fsqrt>, ABSS_FM<0x4, 17>; |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 334 | |
| 335 | // The odd-numbered registers are only referenced when doing loads, |
| 336 | // stores, and moves between floating-point and integer registers. |
Bruno Cardoso Lopes | ed874ef | 2011-03-04 17:51:39 +0000 | [diff] [blame] | 337 | // When defining instructions, we reference all 32-bit registers, |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 338 | // regardless of register aliasing. |
Bruno Cardoso Lopes | 2312a3a | 2011-10-18 17:50:36 +0000 | [diff] [blame] | 339 | |
Bruno Cardoso Lopes | 2312a3a | 2011-10-18 17:50:36 +0000 | [diff] [blame] | 340 | /// Move Control Registers From/To CPU Registers |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 341 | def CFC1 : MMRel, MFC1_FT<"cfc1", GPR32Opnd, CCROpnd, IIFmove>, MFC1_FM<2>; |
| 342 | def CTC1 : MMRel, MTC1_FT<"ctc1", CCROpnd, GPR32Opnd, IIFmove>, MFC1_FM<6>; |
| 343 | def MFC1 : MMRel, MFC1_FT<"mfc1", GPR32Opnd, FGR32Opnd, IIFmoveC1, |
| 344 | bitconvert>, MFC1_FM<0>; |
| 345 | def MTC1 : MMRel, MTC1_FT<"mtc1", FGR32Opnd, GPR32Opnd, IIFmoveC1, |
| 346 | bitconvert>, MFC1_FM<4>; |
| 347 | def MFHC1 : MMRel, MFC1_FT<"mfhc1", GPR32Opnd, FGRH32Opnd, IIFmoveC1>, |
Akira Hatanaka | 9a1fb6b | 2013-08-20 23:47:25 +0000 | [diff] [blame] | 348 | MFC1_FM<3>; |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 349 | def MTHC1 : MMRel, MTC1_FT<"mthc1", FGRH32Opnd, GPR32Opnd, IIFmoveC1>, |
Akira Hatanaka | 9a1fb6b | 2013-08-20 23:47:25 +0000 | [diff] [blame] | 350 | MFC1_FM<7>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 351 | def DMFC1 : MFC1_FT<"dmfc1", GPR64Opnd, FGR64Opnd, IIFmoveC1, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 352 | bitconvert>, MFC1_FM<1>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 353 | def DMTC1 : MTC1_FT<"dmtc1", FGR64Opnd, GPR64Opnd, IIFmoveC1, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 354 | bitconvert>, MFC1_FM<5>; |
Akira Hatanaka | 1537e29 | 2011-11-07 21:32:58 +0000 | [diff] [blame] | 355 | |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 356 | def FMOV_S : MMRel, ABSS_FT<"mov.s", FGR32Opnd, FGR32Opnd, IIFmove>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 357 | ABSS_FM<0x6, 16>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 358 | def FMOV_D32 : MMRel, ABSS_FT<"mov.d", AFGR64Opnd, AFGR64Opnd, IIFmove>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 359 | ABSS_FM<0x6, 17>, Requires<[NotFP64bit, HasStdEnc]>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 360 | def FMOV_D64 : ABSS_FT<"mov.d", FGR64Opnd, FGR64Opnd, IIFmove>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 361 | ABSS_FM<0x6, 17>, Requires<[IsFP64bit, HasStdEnc]> { |
| 362 | let DecoderNamespace = "Mips64"; |
Akira Hatanaka | 71928e6 | 2012-04-17 18:03:21 +0000 | [diff] [blame] | 363 | } |
Bruno Cardoso Lopes | 7ee7191 | 2010-01-30 18:29:19 +0000 | [diff] [blame] | 364 | |
Bruno Cardoso Lopes | 7ceec57 | 2008-07-09 04:45:36 +0000 | [diff] [blame] | 365 | /// Floating Point Memory Instructions |
Akira Hatanaka | 6781fc1 | 2013-08-20 21:08:22 +0000 | [diff] [blame] | 366 | let Predicates = [HasStdEnc] in { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 367 | def LWC1 : MMRel, LW_FT<"lwc1", FGR32Opnd, IIFLoad, load>, LW_FM<0x31>; |
| 368 | def SWC1 : MMRel, SW_FT<"swc1", FGR32Opnd, IIFStore, store>, LW_FM<0x39>; |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 369 | } |
| 370 | |
Akira Hatanaka | 8dd951b | 2013-08-20 23:21:55 +0000 | [diff] [blame] | 371 | let Predicates = [IsFP64bit, HasStdEnc], DecoderNamespace = "Mips64" in { |
Akira Hatanaka | 6781fc1 | 2013-08-20 21:08:22 +0000 | [diff] [blame] | 372 | def LDC164 : LW_FT<"ldc1", FGR64Opnd, IIFLoad, load>, LW_FM<0x35>; |
| 373 | def SDC164 : SW_FT<"sdc1", FGR64Opnd, IIFStore, store>, LW_FM<0x3d>; |
Akira Hatanaka | 3c5cab4 | 2012-02-27 19:09:08 +0000 | [diff] [blame] | 374 | } |
| 375 | |
Akira Hatanaka | 8dd951b | 2013-08-20 23:21:55 +0000 | [diff] [blame] | 376 | let Predicates = [NotFP64bit, HasStdEnc] in { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 377 | def LDC1 : MMRel, LW_FT<"ldc1", AFGR64Opnd, IIFLoad, load>, LW_FM<0x35>; |
| 378 | def SDC1 : MMRel, SW_FT<"sdc1", AFGR64Opnd, IIFStore, store>, LW_FM<0x3d>; |
Akira Hatanaka | b6d72cb | 2011-10-11 01:12:52 +0000 | [diff] [blame] | 379 | } |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 380 | |
Vladimir Medic | 05bcde6 | 2013-09-16 10:29:42 +0000 | [diff] [blame] | 381 | /// Cop2 Memory Instructions |
| 382 | let Predicates = [HasStdEnc] in { |
| 383 | def LWC2 : LW_FT<"lwc2", COP2Opnd, NoItinerary, load>, LW_FM<0x32>; |
| 384 | def SWC2 : SW_FT<"swc2", COP2Opnd, NoItinerary, store>, LW_FM<0x3a>; |
| 385 | def LDC2 : LW_FT<"ldc2", COP2Opnd, NoItinerary, load>, LW_FM<0x36>; |
| 386 | def SDC2 : SW_FT<"sdc2", COP2Opnd, NoItinerary, store>, LW_FM<0x3e>; |
| 387 | } |
| 388 | |
Akira Hatanaka | 330d901 | 2012-02-28 02:55:02 +0000 | [diff] [blame] | 389 | // Indexed loads and stores. |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 390 | let Predicates = [HasFPIdx, HasStdEnc] in { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 391 | def LWXC1 : MMRel, LWXC1_FT<"lwxc1", FGR32Opnd, IIFLoad, load>, LWXC1_FM<0>; |
| 392 | def SWXC1 : MMRel, SWXC1_FT<"swxc1", FGR32Opnd, IIFStore, store>, |
| 393 | SWXC1_FM<8>; |
Akira Hatanaka | 330d901 | 2012-02-28 02:55:02 +0000 | [diff] [blame] | 394 | } |
| 395 | |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 396 | let Predicates = [HasFPIdx, NotFP64bit, HasStdEnc, NotInMicroMips] in { |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 397 | def LDXC1 : LWXC1_FT<"ldxc1", AFGR64Opnd, IIFLoad, load>, LWXC1_FM<1>; |
| 398 | def SDXC1 : SWXC1_FT<"sdxc1", AFGR64Opnd, IIFStore, store>, SWXC1_FM<9>; |
Akira Hatanaka | 330d901 | 2012-02-28 02:55:02 +0000 | [diff] [blame] | 399 | } |
| 400 | |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 401 | let Predicates = [HasFPIdx, IsFP64bit, HasStdEnc], |
| 402 | DecoderNamespace="Mips64" in { |
| 403 | def LDXC164 : LWXC1_FT<"ldxc1", FGR64Opnd, IIFLoad, load>, LWXC1_FM<1>; |
| 404 | def SDXC164 : SWXC1_FT<"sdxc1", FGR64Opnd, IIFStore, store>, SWXC1_FM<9>; |
Akira Hatanaka | 330d901 | 2012-02-28 02:55:02 +0000 | [diff] [blame] | 405 | } |
| 406 | |
Akira Hatanaka | 4ce7c40 | 2012-07-31 18:16:49 +0000 | [diff] [blame] | 407 | // Load/store doubleword indexed unaligned. |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 408 | let Predicates = [NotFP64bit, HasStdEnc] in { |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 409 | def LUXC1 : MMRel, LWXC1_FT<"luxc1", AFGR64Opnd, IIFLoad>, LWXC1_FM<0x5>; |
| 410 | def SUXC1 : MMRel, SWXC1_FT<"suxc1", AFGR64Opnd, IIFStore>, SWXC1_FM<0xd>; |
Akira Hatanaka | 4ce7c40 | 2012-07-31 18:16:49 +0000 | [diff] [blame] | 411 | } |
| 412 | |
Akira Hatanaka | 9bfa2e2 | 2013-08-28 00:55:15 +0000 | [diff] [blame] | 413 | let Predicates = [IsFP64bit, HasStdEnc], DecoderNamespace="Mips64" in { |
| 414 | def LUXC164 : LWXC1_FT<"luxc1", FGR64Opnd, IIFLoad>, LWXC1_FM<0x5>; |
| 415 | def SUXC164 : SWXC1_FT<"suxc1", FGR64Opnd, IIFStore>, SWXC1_FM<0xd>; |
Akira Hatanaka | 4ce7c40 | 2012-07-31 18:16:49 +0000 | [diff] [blame] | 416 | } |
| 417 | |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 418 | /// Floating-point Aritmetic |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 419 | def FADD_S : MMRel, ADDS_FT<"add.s", FGR32Opnd, IIFadd, 1, fadd>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 420 | ADDS_FM<0x00, 16>; |
| 421 | defm FADD : ADDS_M<"add.d", IIFadd, 1, fadd>, ADDS_FM<0x00, 17>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 422 | def FDIV_S : MMRel, ADDS_FT<"div.s", FGR32Opnd, IIFdivSingle, 0, fdiv>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 423 | ADDS_FM<0x03, 16>; |
| 424 | defm FDIV : ADDS_M<"div.d", IIFdivDouble, 0, fdiv>, ADDS_FM<0x03, 17>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 425 | def FMUL_S : MMRel, ADDS_FT<"mul.s", FGR32Opnd, IIFmulSingle, 1, fmul>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 426 | ADDS_FM<0x02, 16>; |
| 427 | defm FMUL : ADDS_M<"mul.d", IIFmulDouble, 1, fmul>, ADDS_FM<0x02, 17>; |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 428 | def FSUB_S : MMRel, ADDS_FT<"sub.s", FGR32Opnd, IIFadd, 0, fsub>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 429 | ADDS_FM<0x01, 16>; |
| 430 | defm FSUB : ADDS_M<"sub.d", IIFadd, 0, fsub>, ADDS_FM<0x01, 17>; |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 431 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 432 | let Predicates = [HasMips32r2, HasStdEnc] in { |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 433 | def MADD_S : MMRel, MADDS_FT<"madd.s", FGR32Opnd, IIFmulSingle, fadd>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 434 | MADDS_FM<4, 0>; |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 435 | def MSUB_S : MMRel, MADDS_FT<"msub.s", FGR32Opnd, IIFmulSingle, fsub>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 436 | MADDS_FM<5, 0>; |
Akira Hatanaka | 60f7a8e | 2012-02-25 00:21:52 +0000 | [diff] [blame] | 437 | } |
| 438 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 439 | let Predicates = [HasMips32r2, NoNaNsFPMath, HasStdEnc] in { |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 440 | def NMADD_S : MMRel, NMADDS_FT<"nmadd.s", FGR32Opnd, IIFmulSingle, fadd>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 441 | MADDS_FM<6, 0>; |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 442 | def NMSUB_S : MMRel, NMADDS_FT<"nmsub.s", FGR32Opnd, IIFmulSingle, fsub>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 443 | MADDS_FM<7, 0>; |
Akira Hatanaka | 60f7a8e | 2012-02-25 00:21:52 +0000 | [diff] [blame] | 444 | } |
| 445 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 446 | let Predicates = [HasMips32r2, NotFP64bit, HasStdEnc] in { |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 447 | def MADD_D32 : MMRel, MADDS_FT<"madd.d", AFGR64Opnd, IIFmulDouble, fadd>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 448 | MADDS_FM<4, 1>; |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 449 | def MSUB_D32 : MMRel, MADDS_FT<"msub.d", AFGR64Opnd, IIFmulDouble, fsub>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 450 | MADDS_FM<5, 1>; |
Akira Hatanaka | 60f7a8e | 2012-02-25 00:21:52 +0000 | [diff] [blame] | 451 | } |
| 452 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 453 | let Predicates = [HasMips32r2, NotFP64bit, NoNaNsFPMath, HasStdEnc] in { |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 454 | def NMADD_D32 : MMRel, NMADDS_FT<"nmadd.d", AFGR64Opnd, IIFmulDouble, fadd>, |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 455 | MADDS_FM<6, 1>; |
Zoran Jovanovic | 8876be3 | 2013-12-25 10:09:27 +0000 | [diff] [blame^] | 456 | def NMSUB_D32 : MMRel, NMADDS_FT<"nmsub.d", AFGR64Opnd, IIFmulDouble, fsub>, |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 457 | MADDS_FM<7, 1>; |
Akira Hatanaka | 60f7a8e | 2012-02-25 00:21:52 +0000 | [diff] [blame] | 458 | } |
| 459 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 460 | let Predicates = [HasMips32r2, IsFP64bit, HasStdEnc], isCodeGenOnly=1 in { |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 461 | def MADD_D64 : MADDS_FT<"madd.d", FGR64Opnd, IIFmulDouble, fadd>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 462 | MADDS_FM<4, 1>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 463 | def MSUB_D64 : MADDS_FT<"msub.d", FGR64Opnd, IIFmulDouble, fsub>, |
Vladimir Medic | 64828a1 | 2013-07-16 10:07:14 +0000 | [diff] [blame] | 464 | MADDS_FM<5, 1>; |
Akira Hatanaka | 60f7a8e | 2012-02-25 00:21:52 +0000 | [diff] [blame] | 465 | } |
| 466 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 467 | let Predicates = [HasMips32r2, IsFP64bit, NoNaNsFPMath, HasStdEnc], |
Akira Hatanaka | cdf4fd8 | 2012-05-22 03:10:09 +0000 | [diff] [blame] | 468 | isCodeGenOnly=1 in { |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 469 | def NMADD_D64 : NMADDS_FT<"nmadd.d", FGR64Opnd, IIFmulDouble, fadd>, |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 470 | MADDS_FM<6, 1>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 471 | def NMSUB_D64 : NMADDS_FT<"nmsub.d", FGR64Opnd, IIFmulDouble, fsub>, |
Akira Hatanaka | b0d4acb | 2012-12-13 01:27:48 +0000 | [diff] [blame] | 472 | MADDS_FM<7, 1>; |
Akira Hatanaka | 60f7a8e | 2012-02-25 00:21:52 +0000 | [diff] [blame] | 473 | } |
| 474 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 475 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 7ceec57 | 2008-07-09 04:45:36 +0000 | [diff] [blame] | 476 | // Floating Point Branch Codes |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 477 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | ed874ef | 2011-03-04 17:51:39 +0000 | [diff] [blame] | 478 | // Mips branch codes. These correspond to condcode in MipsInstrInfo.h. |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 479 | // They must be kept in synch. |
| 480 | def MIPS_BRANCH_F : PatLeaf<(i32 0)>; |
| 481 | def MIPS_BRANCH_T : PatLeaf<(i32 1)>; |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 482 | |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 483 | def BC1F : MMRel, BC1F_FT<"bc1f", brtarget, IIBranch, MIPS_BRANCH_F>, |
| 484 | BC1F_FM<0, 0>; |
| 485 | def BC1T : MMRel, BC1F_FT<"bc1t", brtarget, IIBranch, MIPS_BRANCH_T>, |
| 486 | BC1F_FM<0, 1>; |
Akira Hatanaka | 1fb1b8b | 2013-07-26 20:13:47 +0000 | [diff] [blame] | 487 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 488 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 7ceec57 | 2008-07-09 04:45:36 +0000 | [diff] [blame] | 489 | // Floating Point Flag Conditions |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 490 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | ed874ef | 2011-03-04 17:51:39 +0000 | [diff] [blame] | 491 | // Mips condition codes. They must correspond to condcode in MipsInstrInfo.h. |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 492 | // They must be kept in synch. |
| 493 | def MIPS_FCOND_F : PatLeaf<(i32 0)>; |
| 494 | def MIPS_FCOND_UN : PatLeaf<(i32 1)>; |
Akira Hatanaka | a535270 | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 495 | def MIPS_FCOND_OEQ : PatLeaf<(i32 2)>; |
Bruno Cardoso Lopes | c9c3f49 | 2008-07-05 19:05:21 +0000 | [diff] [blame] | 496 | def MIPS_FCOND_UEQ : PatLeaf<(i32 3)>; |
| 497 | def MIPS_FCOND_OLT : PatLeaf<(i32 4)>; |
| 498 | def MIPS_FCOND_ULT : PatLeaf<(i32 5)>; |
| 499 | def MIPS_FCOND_OLE : PatLeaf<(i32 6)>; |
| 500 | def MIPS_FCOND_ULE : PatLeaf<(i32 7)>; |
| 501 | def MIPS_FCOND_SF : PatLeaf<(i32 8)>; |
| 502 | def MIPS_FCOND_NGLE : PatLeaf<(i32 9)>; |
| 503 | def MIPS_FCOND_SEQ : PatLeaf<(i32 10)>; |
| 504 | def MIPS_FCOND_NGL : PatLeaf<(i32 11)>; |
| 505 | def MIPS_FCOND_LT : PatLeaf<(i32 12)>; |
| 506 | def MIPS_FCOND_NGE : PatLeaf<(i32 13)>; |
| 507 | def MIPS_FCOND_LE : PatLeaf<(i32 14)>; |
| 508 | def MIPS_FCOND_NGT : PatLeaf<(i32 15)>; |
| 509 | |
| 510 | /// Floating Point Compare |
Zoran Jovanovic | ce02486 | 2013-12-20 15:44:08 +0000 | [diff] [blame] | 511 | def FCMP_S32 : MMRel, CEQS_FT<"s", FGR32, IIFcmp, MipsFPCmp>, CEQS_FM<16>; |
| 512 | def FCMP_D32 : MMRel, CEQS_FT<"d", AFGR64, IIFcmp, MipsFPCmp>, CEQS_FM<17>, |
Akira Hatanaka | 79e1cdb | 2012-12-13 01:34:09 +0000 | [diff] [blame] | 513 | Requires<[NotFP64bit, HasStdEnc]>; |
| 514 | let DecoderNamespace = "Mips64" in |
| 515 | def FCMP_D64 : CEQS_FT<"d", FGR64, IIFcmp, MipsFPCmp>, CEQS_FM<17>, |
| 516 | Requires<[IsFP64bit, HasStdEnc]>; |
Akira Hatanaka | a535270 | 2011-03-31 18:26:17 +0000 | [diff] [blame] | 517 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 518 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | e683bba | 2008-07-29 19:05:28 +0000 | [diff] [blame] | 519 | // Floating Point Pseudo-Instructions |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 520 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | a72a505 | 2009-05-27 17:23:44 +0000 | [diff] [blame] | 521 | |
Akira Hatanaka | 2791697 | 2011-04-15 19:52:08 +0000 | [diff] [blame] | 522 | // This pseudo instr gets expanded into 2 mtc1 instrs after register |
| 523 | // allocation. |
Akira Hatanaka | 9a1fb6b | 2013-08-20 23:47:25 +0000 | [diff] [blame] | 524 | class BuildPairF64Base<RegisterOperand RO> : |
| 525 | PseudoSE<(outs RO:$dst), (ins GPR32Opnd:$lo, GPR32Opnd:$hi), |
| 526 | [(set RO:$dst, (MipsBuildPairF64 GPR32Opnd:$lo, GPR32Opnd:$hi))]>; |
| 527 | |
| 528 | def BuildPairF64 : BuildPairF64Base<AFGR64Opnd>, |
| 529 | Requires<[NotFP64bit, HasStdEnc]>; |
| 530 | def BuildPairF64_64 : BuildPairF64Base<FGR64Opnd>, |
| 531 | Requires<[IsFP64bit, HasStdEnc]>; |
Akira Hatanaka | 2791697 | 2011-04-15 19:52:08 +0000 | [diff] [blame] | 532 | |
| 533 | // This pseudo instr gets expanded into 2 mfc1 instrs after register |
| 534 | // allocation. |
| 535 | // if n is 0, lower part of src is extracted. |
| 536 | // if n is 1, higher part of src is extracted. |
Akira Hatanaka | 9a1fb6b | 2013-08-20 23:47:25 +0000 | [diff] [blame] | 537 | class ExtractElementF64Base<RegisterOperand RO> : |
| 538 | PseudoSE<(outs GPR32Opnd:$dst), (ins RO:$src, i32imm:$n), |
| 539 | [(set GPR32Opnd:$dst, (MipsExtractElementF64 RO:$src, imm:$n))]>; |
| 540 | |
| 541 | def ExtractElementF64 : ExtractElementF64Base<AFGR64Opnd>, |
| 542 | Requires<[NotFP64bit, HasStdEnc]>; |
| 543 | def ExtractElementF64_64 : ExtractElementF64Base<FGR64Opnd>, |
| 544 | Requires<[IsFP64bit, HasStdEnc]>; |
Akira Hatanaka | 2791697 | 2011-04-15 19:52:08 +0000 | [diff] [blame] | 545 | |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 546 | //===----------------------------------------------------------------------===// |
Akira Hatanaka | 1fb1b8b | 2013-07-26 20:13:47 +0000 | [diff] [blame] | 547 | // InstAliases. |
| 548 | //===----------------------------------------------------------------------===// |
| 549 | def : InstAlias<"bc1t $offset", (BC1T FCC0, brtarget:$offset)>; |
| 550 | def : InstAlias<"bc1f $offset", (BC1F FCC0, brtarget:$offset)>; |
| 551 | |
| 552 | //===----------------------------------------------------------------------===// |
Bruno Cardoso Lopes | 7ceec57 | 2008-07-09 04:45:36 +0000 | [diff] [blame] | 553 | // Floating Point Patterns |
Akira Hatanaka | e248912 | 2011-04-15 21:51:11 +0000 | [diff] [blame] | 554 | //===----------------------------------------------------------------------===// |
Akira Hatanaka | d8ab16b | 2012-06-14 21:03:23 +0000 | [diff] [blame] | 555 | def : MipsPat<(f32 fpimm0), (MTC1 ZERO)>; |
| 556 | def : MipsPat<(f32 fpimm0neg), (FNEG_S (MTC1 ZERO))>; |
Bruno Cardoso Lopes | 2d7ddea | 2008-07-30 19:00:31 +0000 | [diff] [blame] | 557 | |
Akira Hatanaka | 13e6ccf | 2013-08-06 23:08:38 +0000 | [diff] [blame] | 558 | def : MipsPat<(f32 (sint_to_fp GPR32Opnd:$src)), |
| 559 | (PseudoCVT_S_W GPR32Opnd:$src)>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 560 | def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src), |
| 561 | (TRUNC_W_S FGR32Opnd:$src)>; |
Bruno Cardoso Lopes | 2d7ddea | 2008-07-30 19:00:31 +0000 | [diff] [blame] | 562 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 563 | let Predicates = [NotFP64bit, HasStdEnc] in { |
Akira Hatanaka | 13e6ccf | 2013-08-06 23:08:38 +0000 | [diff] [blame] | 564 | def : MipsPat<(f64 (sint_to_fp GPR32Opnd:$src)), |
| 565 | (PseudoCVT_D32_W GPR32Opnd:$src)>; |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 566 | def : MipsPat<(MipsTruncIntFP AFGR64Opnd:$src), |
| 567 | (TRUNC_W_D32 AFGR64Opnd:$src)>; |
| 568 | def : MipsPat<(f32 (fround AFGR64Opnd:$src)), |
| 569 | (CVT_S_D32 AFGR64Opnd:$src)>; |
| 570 | def : MipsPat<(f64 (fextend FGR32Opnd:$src)), |
| 571 | (CVT_D32_S FGR32Opnd:$src)>; |
Bruno Cardoso Lopes | a72a505 | 2009-05-27 17:23:44 +0000 | [diff] [blame] | 572 | } |
| 573 | |
Akira Hatanaka | 97e179f | 2012-12-07 03:06:09 +0000 | [diff] [blame] | 574 | let Predicates = [IsFP64bit, HasStdEnc] in { |
Akira Hatanaka | d8ab16b | 2012-06-14 21:03:23 +0000 | [diff] [blame] | 575 | def : MipsPat<(f64 fpimm0), (DMTC1 ZERO_64)>; |
| 576 | def : MipsPat<(f64 fpimm0neg), (FNEG_D64 (DMTC1 ZERO_64))>; |
Akira Hatanaka | 2216f73 | 2011-11-07 21:38:58 +0000 | [diff] [blame] | 577 | |
Akira Hatanaka | 13e6ccf | 2013-08-06 23:08:38 +0000 | [diff] [blame] | 578 | def : MipsPat<(f64 (sint_to_fp GPR32Opnd:$src)), |
| 579 | (PseudoCVT_D64_W GPR32Opnd:$src)>; |
| 580 | def : MipsPat<(f32 (sint_to_fp GPR64Opnd:$src)), |
Akira Hatanaka | 14e31a2 | 2013-08-20 22:58:56 +0000 | [diff] [blame] | 581 | (EXTRACT_SUBREG (PseudoCVT_S_L GPR64Opnd:$src), sub_lo)>; |
Akira Hatanaka | 13e6ccf | 2013-08-06 23:08:38 +0000 | [diff] [blame] | 582 | def : MipsPat<(f64 (sint_to_fp GPR64Opnd:$src)), |
| 583 | (PseudoCVT_D64_L GPR64Opnd:$src)>; |
Akira Hatanaka | 2216f73 | 2011-11-07 21:38:58 +0000 | [diff] [blame] | 584 | |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 585 | def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), |
| 586 | (TRUNC_W_D64 FGR64Opnd:$src)>; |
| 587 | def : MipsPat<(MipsTruncIntFP FGR32Opnd:$src), |
| 588 | (TRUNC_L_S FGR32Opnd:$src)>; |
| 589 | def : MipsPat<(MipsTruncIntFP FGR64Opnd:$src), |
| 590 | (TRUNC_L_D64 FGR64Opnd:$src)>; |
Akira Hatanaka | 2216f73 | 2011-11-07 21:38:58 +0000 | [diff] [blame] | 591 | |
Akira Hatanaka | 00fcf2e | 2013-08-08 21:54:26 +0000 | [diff] [blame] | 592 | def : MipsPat<(f32 (fround FGR64Opnd:$src)), |
| 593 | (CVT_S_D64 FGR64Opnd:$src)>; |
| 594 | def : MipsPat<(f64 (fextend FGR32Opnd:$src)), |
| 595 | (CVT_D64_S FGR32Opnd:$src)>; |
Akira Hatanaka | 4705b0c | 2012-02-16 17:48:20 +0000 | [diff] [blame] | 596 | } |
Akira Hatanaka | 69fb3d1 | 2013-02-15 21:20:45 +0000 | [diff] [blame] | 597 | |
Akira Hatanaka | b145730 | 2013-03-30 02:01:48 +0000 | [diff] [blame] | 598 | // Patterns for loads/stores with a reg+imm operand. |
Akira Hatanaka | 69fb3d1 | 2013-02-15 21:20:45 +0000 | [diff] [blame] | 599 | let AddedComplexity = 40 in { |
Akira Hatanaka | 6781fc1 | 2013-08-20 21:08:22 +0000 | [diff] [blame] | 600 | let Predicates = [HasStdEnc] in { |
Akira Hatanaka | b145730 | 2013-03-30 02:01:48 +0000 | [diff] [blame] | 601 | def : LoadRegImmPat<LWC1, f32, load>; |
| 602 | def : StoreRegImmPat<SWC1, f32>; |
Akira Hatanaka | 69fb3d1 | 2013-02-15 21:20:45 +0000 | [diff] [blame] | 603 | } |
| 604 | |
Akira Hatanaka | 8dd951b | 2013-08-20 23:21:55 +0000 | [diff] [blame] | 605 | let Predicates = [IsFP64bit, HasStdEnc] in { |
Akira Hatanaka | b145730 | 2013-03-30 02:01:48 +0000 | [diff] [blame] | 606 | def : LoadRegImmPat<LDC164, f64, load>; |
| 607 | def : StoreRegImmPat<SDC164, f64>; |
Akira Hatanaka | 69fb3d1 | 2013-02-15 21:20:45 +0000 | [diff] [blame] | 608 | } |
| 609 | |
Akira Hatanaka | 8dd951b | 2013-08-20 23:21:55 +0000 | [diff] [blame] | 610 | let Predicates = [NotFP64bit, HasStdEnc] in { |
Akira Hatanaka | 6379121 | 2013-09-07 00:52:30 +0000 | [diff] [blame] | 611 | def : LoadRegImmPat<LDC1, f64, load>; |
| 612 | def : StoreRegImmPat<SDC1, f64>; |
Akira Hatanaka | 69fb3d1 | 2013-02-15 21:20:45 +0000 | [diff] [blame] | 613 | } |
| 614 | } |