blob: a26b5a79575653070135af5eed65a00d13dbdeb2 [file] [log] [blame]
Tim Northover8cda34f2015-03-11 18:54:22 +00001; RUN: llc -mtriple=thumbv7-apple-ios8.0 %s -o - | FileCheck %s
2
3; This checks that alignments greater than 4 are respected by APCS
4; targets. Mostly here to make sure *some* correct code is created after some
5; simplifying refactoring; at the time of writing there were no actual APCS
6; users of byval alignments > 4, so no real calls for ABI stability.
7
8; "byval align 16" can't fit in any regs with an i8* taking up r0.
9define i32 @test_align16(i8*, [4 x i32]* byval align 16 %b) {
10; CHECK-LABEL: test_align16:
11; CHECK-NOT: sub sp
12; CHECK: push {r4, r7, lr}
13; CHECK: add r7, sp, #4
14
15; CHECK: ldr r0, [r7, #8]
16
17 call void @bar()
18 %valptr = getelementptr [4 x i32], [4 x i32]* %b, i32 0, i32 0
19 %val = load i32, i32* %valptr
20 ret i32 %val
21}
22
23; byval align 8 can, but we used to incorrectly set r7 here (miscalculating the
24; space taken up by arg regs).
25define i32 @test_align8(i8*, [4 x i32]* byval align 8 %b) {
26; CHECK-LABEL: test_align8:
27; CHECK: sub sp, #8
28; CHECK: push {r4, r7, lr}
29; CHECK: add r7, sp, #4
30
31; CHECK-DAG: str r2, [r7, #8]
32; CHECK-DAG: str r3, [r7, #12]
33
34; CHECK: ldr r0, [r7, #8]
35
36 call void @bar()
37 %valptr = getelementptr [4 x i32], [4 x i32]* %b, i32 0, i32 0
38 %val = load i32, i32* %valptr
39 ret i32 %val
40}
41
42; "byval align 32" can't fit in regs no matter what: it would be misaligned
43; unless the incoming stack was deliberately misaligned.
44define i32 @test_align32(i8*, [4 x i32]* byval align 32 %b) {
45; CHECK-LABEL: test_align32:
46; CHECK-NOT: sub sp
47; CHECK: push {r4, r7, lr}
48; CHECK: add r7, sp, #4
49
50; CHECK: ldr r0, [r7, #8]
51
52 call void @bar()
53 %valptr = getelementptr [4 x i32], [4 x i32]* %b, i32 0, i32 0
54 %val = load i32, i32* %valptr
55 ret i32 %val
56}
57
58; When passing an object "byval align N", the stack must be at least N-aligned.
59define void @test_call_align16() {
60; CHECK-LABEL: test_call_align16:
61; CHECK: push {r4, r7, lr}
62; CHECK: add r7, sp, #4
63
64; CHECK: mov [[TMP:r[0-9]+]], sp
65; CHECK: bfc [[TMP]], #0, #4
66; CHECK: mov sp, [[TMP]]
67
68; While we're here, make sure the caller also puts it at sp
69 ; CHECK: mov r[[BASE:[0-9]+]], sp
70 ; CHECK: vst1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
71 call i32 @test_align16(i8* null, [4 x i32]* byval align 16 @var)
72 ret void
73}
74
75@var = global [4 x i32] zeroinitializer
76declare void @bar()