| Hiroshi Inoue | 955655f | 2018-06-05 11:58:01 +0000 | [diff] [blame] | 1 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s | 
|  | 2 | ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s | 
|  | 3 |  | 
| Hiroshi Inoue | 9552dd1 | 2018-10-12 14:02:20 +0000 | [diff] [blame] | 4 | ; equivalent C code | 
|  | 5 | ;   struct s64 { | 
|  | 6 | ;   	int a:5; | 
|  | 7 | ;   	int b:16; | 
|  | 8 | ;   	long c:42; | 
|  | 9 | ;   }; | 
|  | 10 | ;   void bitfieldinsert64(struct s *p, unsigned short v) { | 
|  | 11 | ;   	p->b = v; | 
|  | 12 | ;   } | 
|  | 13 |  | 
|  | 14 | %struct.s64 = type { i64 } | 
|  | 15 |  | 
|  | 16 | define void @bitfieldinsert64(%struct.s64* nocapture %p, i16 zeroext %v) { | 
|  | 17 | ; CHECK-LABEL: @bitfieldinsert64 | 
|  | 18 | ; CHECK: ld [[REG1:[0-9]+]], 0(3) | 
|  | 19 | ; CHECK-NEXT: rlwimi [[REG1]], 4, 5, 11, 26 | 
|  | 20 | ; CHECK-NEXT: std [[REG1]], 0(3) | 
|  | 21 | ; CHECK-NEXT: blr | 
|  | 22 | entry: | 
|  | 23 | %0 = getelementptr inbounds %struct.s64, %struct.s64* %p, i64 0, i32 0 | 
|  | 24 | %1 = zext i16 %v to i64 | 
|  | 25 | %bf.load = load i64, i64* %0, align 8 | 
|  | 26 | %bf.shl = shl nuw nsw i64 %1, 5 | 
|  | 27 | %bf.clear = and i64 %bf.load, -2097121 | 
|  | 28 | %bf.set = or i64 %bf.clear, %bf.shl | 
|  | 29 | store i64 %bf.set, i64* %0, align 8 | 
|  | 30 | ret void | 
|  | 31 | } | 
|  | 32 |  | 
| Hiroshi Inoue | 955655f | 2018-06-05 11:58:01 +0000 | [diff] [blame] | 33 | ; bitfieldinsert32: Test for rlwimi | 
|  | 34 | ; equivalent C code | 
|  | 35 | ;   struct s32 { | 
|  | 36 | ;   	int a:8; | 
|  | 37 | ;   	int b:16; | 
|  | 38 | ;   	int c:8; | 
|  | 39 | ;   }; | 
|  | 40 | ;   void bitfieldinsert32(struct s32 *p, unsigned int v) { | 
|  | 41 | ;   	p->b = v; | 
|  | 42 | ;   } | 
|  | 43 |  | 
|  | 44 | %struct.s32 = type { i32 } | 
|  | 45 |  | 
|  | 46 | define void @bitfieldinsert32(%struct.s32* nocapture %p, i32 zeroext %v) { | 
|  | 47 | ; CHECK-LABEL: @bitfieldinsert32 | 
|  | 48 | ; CHECK: lwz [[REG1:[0-9]+]], 0(3) | 
| Hiroshi Inoue | 9552dd1 | 2018-10-12 14:02:20 +0000 | [diff] [blame] | 49 | ; CHECK-NEXT: rlwimi [[REG1]], 4, 8, 8, 23 | 
|  | 50 | ; CHECK-NEXT: stw [[REG1]], 0(3) | 
|  | 51 | ; CHECK-NEXT: blr | 
| Hiroshi Inoue | 955655f | 2018-06-05 11:58:01 +0000 | [diff] [blame] | 52 | entry: | 
|  | 53 | %0 = getelementptr inbounds %struct.s32, %struct.s32* %p, i64 0, i32 0 | 
|  | 54 | %bf.load = load i32, i32* %0, align 4 | 
|  | 55 | %bf.value = shl i32 %v, 8 | 
|  | 56 | %bf.shl = and i32 %bf.value, 16776960 | 
|  | 57 | %bf.clear = and i32 %bf.load, -16776961 | 
|  | 58 | %bf.set = or i32 %bf.clear, %bf.shl | 
|  | 59 | store i32 %bf.set, i32* %0, align 4 | 
|  | 60 | ret void | 
|  | 61 | } | 
|  | 62 |  | 
| Hiroshi Inoue | 1ea98f0 | 2018-12-28 08:00:39 +0000 | [diff] [blame] | 63 | ; test cases which include ISD::TRUNCATE | 
|  | 64 | ; equivalent C code | 
|  | 65 | ;   struct s64b { | 
|  | 66 | ;     int a:4; | 
|  | 67 | ;     int b:16; | 
|  | 68 | ;     int c:24; | 
|  | 69 | ;   }; | 
|  | 70 | ;   void bitfieldinsert64b(struct s64b *p, unsigned char v) { | 
|  | 71 | ;     p->b = v; | 
|  | 72 | ;   } | 
|  | 73 |  | 
|  | 74 | %struct.s64b = type { i24, i24 } | 
|  | 75 |  | 
|  | 76 | define void @bitfieldinsert64b(%struct.s64b* nocapture %p, i8 zeroext %v) { | 
|  | 77 | ; CHECK-LABEL: @bitfieldinsert64b | 
|  | 78 | ; CHECK: lwz [[REG1:[0-9]+]], 0(3) | 
|  | 79 | ; CHECK-NEXT: rlwimi [[REG1]], 4, 4, 12, 27 | 
|  | 80 | ; CHECK-NEXT: stw [[REG1]], 0(3) | 
|  | 81 | ; CHECK-NEXT: blr | 
|  | 82 | entry: | 
|  | 83 | %conv = zext i8 %v to i32 | 
|  | 84 | %0 = bitcast %struct.s64b* %p to i32* | 
|  | 85 | %bf.load = load i32, i32* %0, align 4 | 
|  | 86 | %bf.shl = shl nuw nsw i32 %conv, 4 | 
|  | 87 | %bf.clear = and i32 %bf.load, -1048561 | 
|  | 88 | %bf.set = or i32 %bf.clear, %bf.shl | 
|  | 89 | store i32 %bf.set, i32* %0, align 4 | 
|  | 90 | ret void | 
|  | 91 | } | 
|  | 92 |  | 
|  | 93 | ; equivalent C code | 
|  | 94 | ;   struct s64c { | 
|  | 95 | ;     int a:5; | 
|  | 96 | ;     int b:16; | 
|  | 97 | ;     long c:10; | 
|  | 98 | ;   }; | 
|  | 99 | ;   void bitfieldinsert64c(struct s64c *p, unsigned short v) { | 
|  | 100 | ;     p->b = v; | 
|  | 101 | ;   } | 
|  | 102 |  | 
|  | 103 | %struct.s64c = type { i32, [4 x i8] } | 
|  | 104 |  | 
|  | 105 | define void @bitfieldinsert64c(%struct.s64c* nocapture %p, i16 zeroext %v) { | 
|  | 106 | ; CHECK-LABEL: @bitfieldinsert64c | 
|  | 107 | ; CHECK: lwz [[REG1:[0-9]+]], 0(3) | 
|  | 108 | ; CHECK-NEXT: rlwimi [[REG1]], 4, 5, 11, 26 | 
|  | 109 | ; CHECK-NEXT: stw [[REG1]], 0(3) | 
|  | 110 | ; CHECK-NEXT: blr | 
|  | 111 | entry: | 
|  | 112 | %conv = zext i16 %v to i32 | 
|  | 113 | %0 = getelementptr inbounds %struct.s64c, %struct.s64c* %p, i64 0, i32 0 | 
|  | 114 | %bf.load = load i32, i32* %0, align 8 | 
|  | 115 | %bf.shl = shl nuw nsw i32 %conv, 5 | 
|  | 116 | %bf.clear = and i32 %bf.load, -2097121 | 
|  | 117 | %bf.set = or i32 %bf.clear, %bf.shl | 
|  | 118 | store i32 %bf.set, i32* %0, align 8 | 
|  | 119 | ret void | 
|  | 120 | } |