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gerrit-public.fairphone.software / toolchain / llvm-project / 9026518e7398eeced1f07f5f6003ba047209c033 / . / llvm / test / CodeGen / PowerPC / float-load-store-pair.ll
blob: a8ed39ee9ce0e6d2244dd0a36241ae140ce8258f [file] [log] [blame]
Zi Xuan Wua54c4662019-07-16 07:54:47 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs < %s -mcpu=pwr9 -mtriple=powerpc64le-ibm-linux| FileCheck %s
3
4; This file verifies that for a given floating point load / store pair,
5; if the load value isn't used by any other operations,
6; then consider transforming the pair to integer load / store operations
7
8@a1 = local_unnamed_addr global double 0.000000e+00, align 8
9@a2 = local_unnamed_addr global double 0.000000e+00, align 8
10@a3 = local_unnamed_addr global double 0.000000e+00, align 8
11@a4 = local_unnamed_addr global double 0.000000e+00, align 8
12@a5 = local_unnamed_addr global double 0.000000e+00, align 8
13@a6 = local_unnamed_addr global double 0.000000e+00, align 8
14@a7 = local_unnamed_addr global double 0.000000e+00, align 8
15@a8 = local_unnamed_addr global double 0.000000e+00, align 8
16@a9 = local_unnamed_addr global double 0.000000e+00, align 8
17@a10 = local_unnamed_addr global double 0.000000e+00, align 8
18@a11 = local_unnamed_addr global double 0.000000e+00, align 8
19@a12 = local_unnamed_addr global double 0.000000e+00, align 8
20@a13 = local_unnamed_addr global double 0.000000e+00, align 8
21@a14 = local_unnamed_addr global double 0.000000e+00, align 8
22@a15 = local_unnamed_addr global double 0.000000e+00, align 8
23@a16 = local_unnamed_addr global ppc_fp128 0xM00000000000000000000000000000000, align 16
24@a17 = local_unnamed_addr global fp128 0xL00000000000000000000000000000000, align 16
25
26; Because this test function is trying to pass float argument by stack,
27; so the fpr is only used to load/store float argument
Jinsong Jifb4b86a2019-08-30 19:24:25 +0000[diff] [blame]28define signext i32 @test() nounwind {
Zi Xuan Wua54c4662019-07-16 07:54:47 +0000[diff] [blame]29; CHECK-LABEL: test:
30; CHECK: # %bb.0:
31; CHECK-NEXT: mflr 0
32; CHECK-NEXT: std 0, 16(1)
33; CHECK-NEXT: stdu 1, -192(1)
Zi Xuan Wua54c4662019-07-16 07:54:47 +0000[diff] [blame]34; CHECK-NEXT: addis 3, 2, a1@toc@ha
35; CHECK-NEXT: lfd 1, a1@toc@l(3)
36; CHECK-NEXT: addis 3, 2, a2@toc@ha
37; CHECK-NEXT: lfd 2, a2@toc@l(3)
38; CHECK-NEXT: addis 3, 2, a3@toc@ha
39; CHECK-NEXT: lfd 3, a3@toc@l(3)
40; CHECK-NEXT: addis 3, 2, a4@toc@ha
41; CHECK-NEXT: lfd 4, a4@toc@l(3)
42; CHECK-NEXT: addis 3, 2, a5@toc@ha
43; CHECK-NEXT: lfd 5, a5@toc@l(3)
44; CHECK-NEXT: addis 3, 2, a6@toc@ha
45; CHECK-NEXT: lfd 6, a6@toc@l(3)
46; CHECK-NEXT: addis 3, 2, a7@toc@ha
47; CHECK-NEXT: lfd 7, a7@toc@l(3)
48; CHECK-NEXT: addis 3, 2, a8@toc@ha
49; CHECK-NEXT: lfd 8, a8@toc@l(3)
50; CHECK-NEXT: addis 3, 2, a9@toc@ha
51; CHECK-NEXT: lfd 9, a9@toc@l(3)
52; CHECK-NEXT: addis 3, 2, a10@toc@ha
53; CHECK-NEXT: lfd 10, a10@toc@l(3)
54; CHECK-NEXT: addis 3, 2, a11@toc@ha
Zi Xuan Wu57d17ec2019-07-23 03:34:40 +0000[diff] [blame]55; CHECK-NEXT: addis 6, 2, a17@toc@ha
56; CHECK-NEXT: addis 5, 2, a16@toc@ha
57; CHECK-NEXT: addi 6, 6, a17@toc@l
58; CHECK-NEXT: addi 5, 5, a16@toc@l
59; CHECK-NEXT: lxvx 34, 0, 6
60; CHECK-NEXT: addis 4, 2, a15@toc@ha
61; CHECK-NEXT: lxvx 0, 0, 5
62; CHECK-NEXT: ld 4, a15@toc@l(4)
63; CHECK-NEXT: li 5, 168
Zi Xuan Wua54c4662019-07-16 07:54:47 +0000[diff] [blame]64; CHECK-NEXT: lfd 11, a11@toc@l(3)
65; CHECK-NEXT: addis 3, 2, a12@toc@ha
66; CHECK-NEXT: lfd 12, a12@toc@l(3)
67; CHECK-NEXT: addis 3, 2, a13@toc@ha
68; CHECK-NEXT: lfd 13, a13@toc@l(3)
69; CHECK-NEXT: addis 3, 2, a14@toc@ha
Zi Xuan Wu57d17ec2019-07-23 03:34:40 +0000[diff] [blame]70; CHECK-NEXT: ld 3, a14@toc@l(3)
71; CHECK-NEXT: stxvx 34, 1, 5
72; CHECK-NEXT: li 5, 152
73; CHECK-NEXT: stxvx 0, 1, 5
74; CHECK-NEXT: std 4, 144(1)
75; CHECK-NEXT: std 3, 136(1)
Zi Xuan Wua54c4662019-07-16 07:54:47 +0000[diff] [blame]76; CHECK-NEXT: bl _Z3fooddddddddddddddd
77; CHECK-NEXT: nop
78; CHECK-NEXT: li 3, 0
79; CHECK-NEXT: addi 1, 1, 192
80; CHECK-NEXT: ld 0, 16(1)
81; CHECK-NEXT: mtlr 0
82; CHECK-NEXT: blr
83%1 = load double, double* @a1, align 8
84%2 = load double, double* @a2, align 8
85%3 = load double, double* @a3, align 8
86%4 = load double, double* @a4, align 8
87%5 = load double, double* @a5, align 8
88%6 = load double, double* @a6, align 8
89%7 = load double, double* @a7, align 8
90%8 = load double, double* @a8, align 8
91%9 = load double, double* @a9, align 8
92%10 = load double, double* @a10, align 8
93%11 = load double, double* @a11, align 8
94%12 = load double, double* @a12, align 8
95%13 = load double, double* @a13, align 8
96%14 = load double, double* @a14, align 8
97%15 = load double, double* @a15, align 8
98%16 = load ppc_fp128, ppc_fp128* @a16, align 16
99%17 = load fp128, fp128* @a17, align 16
100tail call void @_Z3fooddddddddddddddd(double %1, double %2, double %3, double %4, double %5, double %6, double %7, double %8, double %9, double %10, double %11, double %12, double %13, double %14, double %15, ppc_fp128 %16, fp128 %17)
101ret i32 0
102}
103
104declare void @_Z3fooddddddddddddddd(double, double, double, double, double, double, double, double, double, double, double, double, double, double, double, ppc_fp128, fp128)