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gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / . / llvm / test / CodeGen / AArch64 / minmax-of-minmax.ll
blob: 9257832d4c4bd8f15ad428eaada8c26d550ba17a [file] [log] [blame]
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
3
4; There are 4 commuted variants (abbc/abcb/bcab/bcba) *
Sanjay Patel24e6a8b2018-01-02 21:04:08 +0000[diff] [blame]5; 4 predicate variants ([*][lg][te]) *
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]6; 4 min/max flavors (smin/smax/umin/umax) *
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]7; 2 notted variants
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]8; = 128 tests
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]9
10define <4 x i32> @smin_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
11; CHECK-LABEL: smin_ab_bc:
12; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]13; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]14; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]15; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]16; CHECK-NEXT: ret
17 %cmp_ab = icmp slt <4 x i32> %a, %b
18 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
19 %cmp_bc = icmp slt <4 x i32> %b, %c
20 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
21 %cmp_ac = icmp slt <4 x i32> %a, %c
22 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
23 ret <4 x i32> %r
24}
25
26define <4 x i32> @smin_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
27; CHECK-LABEL: smin_ab_cb:
28; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]29; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]30; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]31; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]32; CHECK-NEXT: ret
33 %cmp_ab = icmp slt <4 x i32> %a, %b
34 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
35 %cmp_cb = icmp slt <4 x i32> %c, %b
36 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
37 %cmp_ac = icmp slt <4 x i32> %a, %c
38 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
39 ret <4 x i32> %r
40}
41
42define <4 x i32> @smin_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
43; CHECK-LABEL: smin_bc_ab:
44; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]45; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
46; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
47; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]48; CHECK-NEXT: ret
49 %cmp_bc = icmp slt <4 x i32> %b, %c
50 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
51 %cmp_ab = icmp slt <4 x i32> %a, %b
52 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
53 %cmp_ca = icmp slt <4 x i32> %c, %a
54 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
55 ret <4 x i32> %r
56}
57
58define <4 x i32> @smin_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
59; CHECK-LABEL: smin_bc_ba:
60; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]61; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
62; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
63; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]64; CHECK-NEXT: ret
65 %cmp_bc = icmp slt <4 x i32> %b, %c
66 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
67 %cmp_ba = icmp slt <4 x i32> %b, %a
68 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
69 %cmp_ca = icmp slt <4 x i32> %c, %a
70 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
71 ret <4 x i32> %r
72}
73
74define <4 x i32> @smin_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
75; CHECK-LABEL: smin_ab_bc_swap_pred:
76; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]77; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]78; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]79; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]80; CHECK-NEXT: ret
81 %cmp_ab = icmp slt <4 x i32> %a, %b
82 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
83 %cmp_bc = icmp slt <4 x i32> %b, %c
84 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
85 %cmp_ac = icmp sgt <4 x i32> %c, %a
86 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
87 ret <4 x i32> %r
88}
89
90define <4 x i32> @smin_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
91; CHECK-LABEL: smin_ab_cb_swap_pred:
92; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]93; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]94; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]95; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]96; CHECK-NEXT: ret
97 %cmp_ab = icmp slt <4 x i32> %a, %b
98 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
99 %cmp_cb = icmp slt <4 x i32> %c, %b
100 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
101 %cmp_ac = icmp sgt <4 x i32> %c, %a
102 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
103 ret <4 x i32> %r
104}
105
106define <4 x i32> @smin_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
107; CHECK-LABEL: smin_bc_ab_swap_pred:
108; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]109; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
110; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
111; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]112; CHECK-NEXT: ret
113 %cmp_bc = icmp slt <4 x i32> %b, %c
114 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
115 %cmp_ab = icmp slt <4 x i32> %a, %b
116 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
117 %cmp_ca = icmp sgt <4 x i32> %a, %c
118 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
119 ret <4 x i32> %r
120}
121
122define <4 x i32> @smin_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
123; CHECK-LABEL: smin_bc_ba_swap_pred:
124; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]125; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
126; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
127; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]128; CHECK-NEXT: ret
129 %cmp_bc = icmp slt <4 x i32> %b, %c
130 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
131 %cmp_ba = icmp slt <4 x i32> %b, %a
132 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
133 %cmp_ca = icmp sgt <4 x i32> %a, %c
134 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
135 ret <4 x i32> %r
136}
137
138define <4 x i32> @smin_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
139; CHECK-LABEL: smin_ab_bc_eq_pred:
140; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]141; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]142; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]143; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]144; CHECK-NEXT: ret
145 %cmp_ab = icmp slt <4 x i32> %a, %b
146 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
147 %cmp_bc = icmp slt <4 x i32> %b, %c
148 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
149 %cmp_ac = icmp sle <4 x i32> %a, %c
150 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
151 ret <4 x i32> %r
152}
153
154define <4 x i32> @smin_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
155; CHECK-LABEL: smin_ab_cb_eq_pred:
156; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]157; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]158; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]159; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]160; CHECK-NEXT: ret
161 %cmp_ab = icmp slt <4 x i32> %a, %b
162 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
163 %cmp_cb = icmp slt <4 x i32> %c, %b
164 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
165 %cmp_ac = icmp sle <4 x i32> %a, %c
166 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
167 ret <4 x i32> %r
168}
169
170define <4 x i32> @smin_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
171; CHECK-LABEL: smin_bc_ab_eq_pred:
172; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]173; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
174; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
175; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]176; CHECK-NEXT: ret
177 %cmp_bc = icmp slt <4 x i32> %b, %c
178 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
179 %cmp_ab = icmp slt <4 x i32> %a, %b
180 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
181 %cmp_ca = icmp sle <4 x i32> %c, %a
182 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
183 ret <4 x i32> %r
184}
185
186define <4 x i32> @smin_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
187; CHECK-LABEL: smin_bc_ba_eq_pred:
188; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]189; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
190; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
191; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]192; CHECK-NEXT: ret
193 %cmp_bc = icmp slt <4 x i32> %b, %c
194 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
195 %cmp_ba = icmp slt <4 x i32> %b, %a
196 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
197 %cmp_ca = icmp sle <4 x i32> %c, %a
198 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
199 ret <4 x i32> %r
200}
201
202define <4 x i32> @smin_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
203; CHECK-LABEL: smin_ab_bc_eq_swap_pred:
204; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]205; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]206; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]207; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]208; CHECK-NEXT: ret
209 %cmp_ab = icmp slt <4 x i32> %a, %b
210 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
211 %cmp_bc = icmp slt <4 x i32> %b, %c
212 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
213 %cmp_ac = icmp sge <4 x i32> %c, %a
214 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
215 ret <4 x i32> %r
216}
217
218define <4 x i32> @smin_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
219; CHECK-LABEL: smin_ab_cb_eq_swap_pred:
220; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]221; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]222; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]223; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]224; CHECK-NEXT: ret
225 %cmp_ab = icmp slt <4 x i32> %a, %b
226 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
227 %cmp_cb = icmp slt <4 x i32> %c, %b
228 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
229 %cmp_ac = icmp sge <4 x i32> %c, %a
230 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
231 ret <4 x i32> %r
232}
233
234define <4 x i32> @smin_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
235; CHECK-LABEL: smin_bc_ab_eq_swap_pred:
236; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]237; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
238; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
239; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]240; CHECK-NEXT: ret
241 %cmp_bc = icmp slt <4 x i32> %b, %c
242 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
243 %cmp_ab = icmp slt <4 x i32> %a, %b
244 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
245 %cmp_ca = icmp sge <4 x i32> %a, %c
246 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
247 ret <4 x i32> %r
248}
249
250define <4 x i32> @smin_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
251; CHECK-LABEL: smin_bc_ba_eq_swap_pred:
252; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]253; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
254; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
255; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]256; CHECK-NEXT: ret
257 %cmp_bc = icmp slt <4 x i32> %b, %c
258 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
259 %cmp_ba = icmp slt <4 x i32> %b, %a
260 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
261 %cmp_ca = icmp sge <4 x i32> %a, %c
262 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
263 ret <4 x i32> %r
264}
265
266define <4 x i32> @smax_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
267; CHECK-LABEL: smax_ab_bc:
268; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]269; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]270; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]271; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]272; CHECK-NEXT: ret
273 %cmp_ab = icmp sgt <4 x i32> %a, %b
274 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
275 %cmp_bc = icmp sgt <4 x i32> %b, %c
276 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
277 %cmp_ac = icmp sgt <4 x i32> %a, %c
278 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
279 ret <4 x i32> %r
280}
281
282define <4 x i32> @smax_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
283; CHECK-LABEL: smax_ab_cb:
284; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]285; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]286; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]287; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]288; CHECK-NEXT: ret
289 %cmp_ab = icmp sgt <4 x i32> %a, %b
290 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
291 %cmp_cb = icmp sgt <4 x i32> %c, %b
292 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
293 %cmp_ac = icmp sgt <4 x i32> %a, %c
294 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
295 ret <4 x i32> %r
296}
297
298define <4 x i32> @smax_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
299; CHECK-LABEL: smax_bc_ab:
300; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]301; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
302; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
303; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]304; CHECK-NEXT: ret
305 %cmp_bc = icmp sgt <4 x i32> %b, %c
306 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
307 %cmp_ab = icmp sgt <4 x i32> %a, %b
308 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
309 %cmp_ca = icmp sgt <4 x i32> %c, %a
310 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
311 ret <4 x i32> %r
312}
313
314define <4 x i32> @smax_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
315; CHECK-LABEL: smax_bc_ba:
316; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]317; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
318; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
319; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]320; CHECK-NEXT: ret
321 %cmp_bc = icmp sgt <4 x i32> %b, %c
322 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
323 %cmp_ba = icmp sgt <4 x i32> %b, %a
324 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
325 %cmp_ca = icmp sgt <4 x i32> %c, %a
326 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
327 ret <4 x i32> %r
328}
329
330define <4 x i32> @smax_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
331; CHECK-LABEL: smax_ab_bc_swap_pred:
332; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]333; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]334; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]335; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]336; CHECK-NEXT: ret
337 %cmp_ab = icmp sgt <4 x i32> %a, %b
338 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
339 %cmp_bc = icmp sgt <4 x i32> %b, %c
340 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
341 %cmp_ac = icmp slt <4 x i32> %c, %a
342 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
343 ret <4 x i32> %r
344}
345
346define <4 x i32> @smax_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
347; CHECK-LABEL: smax_ab_cb_swap_pred:
348; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]349; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]350; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]351; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]352; CHECK-NEXT: ret
353 %cmp_ab = icmp sgt <4 x i32> %a, %b
354 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
355 %cmp_cb = icmp sgt <4 x i32> %c, %b
356 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
357 %cmp_ac = icmp slt <4 x i32> %c, %a
358 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
359 ret <4 x i32> %r
360}
361
362define <4 x i32> @smax_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
363; CHECK-LABEL: smax_bc_ab_swap_pred:
364; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]365; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
366; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
367; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]368; CHECK-NEXT: ret
369 %cmp_bc = icmp sgt <4 x i32> %b, %c
370 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
371 %cmp_ab = icmp sgt <4 x i32> %a, %b
372 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
373 %cmp_ca = icmp slt <4 x i32> %a, %c
374 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
375 ret <4 x i32> %r
376}
377
378define <4 x i32> @smax_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
379; CHECK-LABEL: smax_bc_ba_swap_pred:
380; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]381; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
382; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
383; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]384; CHECK-NEXT: ret
385 %cmp_bc = icmp sgt <4 x i32> %b, %c
386 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
387 %cmp_ba = icmp sgt <4 x i32> %b, %a
388 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
389 %cmp_ca = icmp slt <4 x i32> %a, %c
390 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
391 ret <4 x i32> %r
392}
393
394define <4 x i32> @smax_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
395; CHECK-LABEL: smax_ab_bc_eq_pred:
396; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]397; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]398; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]399; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]400; CHECK-NEXT: ret
401 %cmp_ab = icmp sgt <4 x i32> %a, %b
402 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
403 %cmp_bc = icmp sgt <4 x i32> %b, %c
404 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
405 %cmp_ac = icmp sge <4 x i32> %a, %c
406 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
407 ret <4 x i32> %r
408}
409
410define <4 x i32> @smax_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
411; CHECK-LABEL: smax_ab_cb_eq_pred:
412; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]413; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]414; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]415; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]416; CHECK-NEXT: ret
417 %cmp_ab = icmp sgt <4 x i32> %a, %b
418 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
419 %cmp_cb = icmp sgt <4 x i32> %c, %b
420 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
421 %cmp_ac = icmp sge <4 x i32> %a, %c
422 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
423 ret <4 x i32> %r
424}
425
426define <4 x i32> @smax_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
427; CHECK-LABEL: smax_bc_ab_eq_pred:
428; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]429; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
430; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
431; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]432; CHECK-NEXT: ret
433 %cmp_bc = icmp sgt <4 x i32> %b, %c
434 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
435 %cmp_ab = icmp sgt <4 x i32> %a, %b
436 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
437 %cmp_ca = icmp sge <4 x i32> %c, %a
438 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
439 ret <4 x i32> %r
440}
441
442define <4 x i32> @smax_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
443; CHECK-LABEL: smax_bc_ba_eq_pred:
444; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]445; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
446; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
447; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]448; CHECK-NEXT: ret
449 %cmp_bc = icmp sgt <4 x i32> %b, %c
450 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
451 %cmp_ba = icmp sgt <4 x i32> %b, %a
452 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
453 %cmp_ca = icmp sge <4 x i32> %c, %a
454 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
455 ret <4 x i32> %r
456}
457
458define <4 x i32> @smax_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
459; CHECK-LABEL: smax_ab_bc_eq_swap_pred:
460; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]461; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]462; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]463; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]464; CHECK-NEXT: ret
465 %cmp_ab = icmp sgt <4 x i32> %a, %b
466 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
467 %cmp_bc = icmp sgt <4 x i32> %b, %c
468 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
469 %cmp_ac = icmp sle <4 x i32> %c, %a
470 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
471 ret <4 x i32> %r
472}
473
474define <4 x i32> @smax_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
475; CHECK-LABEL: smax_ab_cb_eq_swap_pred:
476; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]477; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]478; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]479; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]480; CHECK-NEXT: ret
481 %cmp_ab = icmp sgt <4 x i32> %a, %b
482 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
483 %cmp_cb = icmp sgt <4 x i32> %c, %b
484 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
485 %cmp_ac = icmp sle <4 x i32> %c, %a
486 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
487 ret <4 x i32> %r
488}
489
490define <4 x i32> @smax_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
491; CHECK-LABEL: smax_bc_ab_eq_swap_pred:
492; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]493; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
494; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
495; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]496; CHECK-NEXT: ret
497 %cmp_bc = icmp sgt <4 x i32> %b, %c
498 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
499 %cmp_ab = icmp sgt <4 x i32> %a, %b
500 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
501 %cmp_ca = icmp sle <4 x i32> %a, %c
502 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
503 ret <4 x i32> %r
504}
505
506define <4 x i32> @smax_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
507; CHECK-LABEL: smax_bc_ba_eq_swap_pred:
508; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]509; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
510; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
511; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]512; CHECK-NEXT: ret
513 %cmp_bc = icmp sgt <4 x i32> %b, %c
514 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
515 %cmp_ba = icmp sgt <4 x i32> %b, %a
516 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
517 %cmp_ca = icmp sle <4 x i32> %a, %c
518 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
519 ret <4 x i32> %r
520}
521
522define <4 x i32> @umin_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
523; CHECK-LABEL: umin_ab_bc:
524; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]525; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]526; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]527; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]528; CHECK-NEXT: ret
529 %cmp_ab = icmp ult <4 x i32> %a, %b
530 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
531 %cmp_bc = icmp ult <4 x i32> %b, %c
532 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
533 %cmp_ac = icmp ult <4 x i32> %a, %c
534 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
535 ret <4 x i32> %r
536}
537
538define <4 x i32> @umin_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
539; CHECK-LABEL: umin_ab_cb:
540; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]541; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]542; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]543; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]544; CHECK-NEXT: ret
545 %cmp_ab = icmp ult <4 x i32> %a, %b
546 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
547 %cmp_cb = icmp ult <4 x i32> %c, %b
548 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
549 %cmp_ac = icmp ult <4 x i32> %a, %c
550 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
551 ret <4 x i32> %r
552}
553
554define <4 x i32> @umin_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
555; CHECK-LABEL: umin_bc_ab:
556; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]557; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
558; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
559; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]560; CHECK-NEXT: ret
561 %cmp_bc = icmp ult <4 x i32> %b, %c
562 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
563 %cmp_ab = icmp ult <4 x i32> %a, %b
564 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
565 %cmp_ca = icmp ult <4 x i32> %c, %a
566 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
567 ret <4 x i32> %r
568}
569
570define <4 x i32> @umin_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
571; CHECK-LABEL: umin_bc_ba:
572; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]573; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
574; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
575; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]576; CHECK-NEXT: ret
577 %cmp_bc = icmp ult <4 x i32> %b, %c
578 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
579 %cmp_ba = icmp ult <4 x i32> %b, %a
580 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
581 %cmp_ca = icmp ult <4 x i32> %c, %a
582 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
583 ret <4 x i32> %r
584}
585
586define <4 x i32> @umin_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
587; CHECK-LABEL: umin_ab_bc_swap_pred:
588; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]589; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]590; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]591; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]592; CHECK-NEXT: ret
593 %cmp_ab = icmp ult <4 x i32> %a, %b
594 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
595 %cmp_bc = icmp ult <4 x i32> %b, %c
596 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
597 %cmp_ac = icmp ugt <4 x i32> %c, %a
598 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
599 ret <4 x i32> %r
600}
601
602define <4 x i32> @umin_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
603; CHECK-LABEL: umin_ab_cb_swap_pred:
604; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]605; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]606; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]607; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]608; CHECK-NEXT: ret
609 %cmp_ab = icmp ult <4 x i32> %a, %b
610 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
611 %cmp_cb = icmp ult <4 x i32> %c, %b
612 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
613 %cmp_ac = icmp ugt <4 x i32> %c, %a
614 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
615 ret <4 x i32> %r
616}
617
618define <4 x i32> @umin_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
619; CHECK-LABEL: umin_bc_ab_swap_pred:
620; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]621; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
622; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
623; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]624; CHECK-NEXT: ret
625 %cmp_bc = icmp ult <4 x i32> %b, %c
626 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
627 %cmp_ab = icmp ult <4 x i32> %a, %b
628 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
629 %cmp_ca = icmp ugt <4 x i32> %a, %c
630 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
631 ret <4 x i32> %r
632}
633
634define <4 x i32> @umin_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
635; CHECK-LABEL: umin_bc_ba_swap_pred:
636; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]637; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
638; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
639; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]640; CHECK-NEXT: ret
641 %cmp_bc = icmp ult <4 x i32> %b, %c
642 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
643 %cmp_ba = icmp ult <4 x i32> %b, %a
644 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
645 %cmp_ca = icmp ugt <4 x i32> %a, %c
646 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
647 ret <4 x i32> %r
648}
649
650define <4 x i32> @umin_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
651; CHECK-LABEL: umin_ab_bc_eq_pred:
652; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]653; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]654; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]655; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]656; CHECK-NEXT: ret
657 %cmp_ab = icmp ult <4 x i32> %a, %b
658 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
659 %cmp_bc = icmp ult <4 x i32> %b, %c
660 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
661 %cmp_ac = icmp ule <4 x i32> %a, %c
662 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
663 ret <4 x i32> %r
664}
665
666define <4 x i32> @umin_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
667; CHECK-LABEL: umin_ab_cb_eq_pred:
668; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]669; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]670; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]671; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]672; CHECK-NEXT: ret
673 %cmp_ab = icmp ult <4 x i32> %a, %b
674 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
675 %cmp_cb = icmp ult <4 x i32> %c, %b
676 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
677 %cmp_ac = icmp ule <4 x i32> %a, %c
678 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
679 ret <4 x i32> %r
680}
681
682define <4 x i32> @umin_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
683; CHECK-LABEL: umin_bc_ab_eq_pred:
684; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]685; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
686; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
687; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]688; CHECK-NEXT: ret
689 %cmp_bc = icmp ult <4 x i32> %b, %c
690 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
691 %cmp_ab = icmp ult <4 x i32> %a, %b
692 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
693 %cmp_ca = icmp ule <4 x i32> %c, %a
694 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
695 ret <4 x i32> %r
696}
697
698define <4 x i32> @umin_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
699; CHECK-LABEL: umin_bc_ba_eq_pred:
700; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]701; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
702; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
703; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]704; CHECK-NEXT: ret
705 %cmp_bc = icmp ult <4 x i32> %b, %c
706 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
707 %cmp_ba = icmp ult <4 x i32> %b, %a
708 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
709 %cmp_ca = icmp ule <4 x i32> %c, %a
710 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
711 ret <4 x i32> %r
712}
713
714define <4 x i32> @umin_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
715; CHECK-LABEL: umin_ab_bc_eq_swap_pred:
716; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]717; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]718; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]719; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]720; CHECK-NEXT: ret
721 %cmp_ab = icmp ult <4 x i32> %a, %b
722 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
723 %cmp_bc = icmp ult <4 x i32> %b, %c
724 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
725 %cmp_ac = icmp uge <4 x i32> %c, %a
726 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
727 ret <4 x i32> %r
728}
729
730define <4 x i32> @umin_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
731; CHECK-LABEL: umin_ab_cb_eq_swap_pred:
732; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]733; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]734; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]735; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]736; CHECK-NEXT: ret
737 %cmp_ab = icmp ult <4 x i32> %a, %b
738 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
739 %cmp_cb = icmp ult <4 x i32> %c, %b
740 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
741 %cmp_ac = icmp uge <4 x i32> %c, %a
742 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
743 ret <4 x i32> %r
744}
745
746define <4 x i32> @umin_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
747; CHECK-LABEL: umin_bc_ab_eq_swap_pred:
748; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]749; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
750; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
751; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]752; CHECK-NEXT: ret
753 %cmp_bc = icmp ult <4 x i32> %b, %c
754 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
755 %cmp_ab = icmp ult <4 x i32> %a, %b
756 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
757 %cmp_ca = icmp uge <4 x i32> %a, %c
758 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
759 ret <4 x i32> %r
760}
761
762define <4 x i32> @umin_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
763; CHECK-LABEL: umin_bc_ba_eq_swap_pred:
764; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]765; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
766; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
767; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]768; CHECK-NEXT: ret
769 %cmp_bc = icmp ult <4 x i32> %b, %c
770 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
771 %cmp_ba = icmp ult <4 x i32> %b, %a
772 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
773 %cmp_ca = icmp uge <4 x i32> %a, %c
774 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
775 ret <4 x i32> %r
776}
777
778define <4 x i32> @umax_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
779; CHECK-LABEL: umax_ab_bc:
780; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]781; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]782; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]783; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]784; CHECK-NEXT: ret
785 %cmp_ab = icmp ugt <4 x i32> %a, %b
786 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
787 %cmp_bc = icmp ugt <4 x i32> %b, %c
788 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
789 %cmp_ac = icmp ugt <4 x i32> %a, %c
790 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
791 ret <4 x i32> %r
792}
793
794define <4 x i32> @umax_ab_cb(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
795; CHECK-LABEL: umax_ab_cb:
796; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]797; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]798; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]799; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]800; CHECK-NEXT: ret
801 %cmp_ab = icmp ugt <4 x i32> %a, %b
802 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
803 %cmp_cb = icmp ugt <4 x i32> %c, %b
804 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
805 %cmp_ac = icmp ugt <4 x i32> %a, %c
806 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
807 ret <4 x i32> %r
808}
809
810define <4 x i32> @umax_bc_ab(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
811; CHECK-LABEL: umax_bc_ab:
812; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]813; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
814; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
815; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]816; CHECK-NEXT: ret
817 %cmp_bc = icmp ugt <4 x i32> %b, %c
818 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
819 %cmp_ab = icmp ugt <4 x i32> %a, %b
820 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
821 %cmp_ca = icmp ugt <4 x i32> %c, %a
822 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
823 ret <4 x i32> %r
824}
825
826define <4 x i32> @umax_bc_ba(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
827; CHECK-LABEL: umax_bc_ba:
828; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]829; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
830; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
831; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]832; CHECK-NEXT: ret
833 %cmp_bc = icmp ugt <4 x i32> %b, %c
834 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
835 %cmp_ba = icmp ugt <4 x i32> %b, %a
836 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
837 %cmp_ca = icmp ugt <4 x i32> %c, %a
838 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
839 ret <4 x i32> %r
840}
841
842define <4 x i32> @umax_ab_bc_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
843; CHECK-LABEL: umax_ab_bc_swap_pred:
844; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]845; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]846; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]847; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]848; CHECK-NEXT: ret
849 %cmp_ab = icmp ugt <4 x i32> %a, %b
850 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
851 %cmp_bc = icmp ugt <4 x i32> %b, %c
852 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
853 %cmp_ac = icmp ult <4 x i32> %c, %a
854 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
855 ret <4 x i32> %r
856}
857
858define <4 x i32> @umax_ab_cb_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
859; CHECK-LABEL: umax_ab_cb_swap_pred:
860; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]861; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]862; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]863; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]864; CHECK-NEXT: ret
865 %cmp_ab = icmp ugt <4 x i32> %a, %b
866 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
867 %cmp_cb = icmp ugt <4 x i32> %c, %b
868 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
869 %cmp_ac = icmp ult <4 x i32> %c, %a
870 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
871 ret <4 x i32> %r
872}
873
874define <4 x i32> @umax_bc_ab_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
875; CHECK-LABEL: umax_bc_ab_swap_pred:
876; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]877; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
878; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
879; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]880; CHECK-NEXT: ret
881 %cmp_bc = icmp ugt <4 x i32> %b, %c
882 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
883 %cmp_ab = icmp ugt <4 x i32> %a, %b
884 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
885 %cmp_ca = icmp ult <4 x i32> %a, %c
886 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
887 ret <4 x i32> %r
888}
889
890define <4 x i32> @umax_bc_ba_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
891; CHECK-LABEL: umax_bc_ba_swap_pred:
892; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]893; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
894; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
895; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]896; CHECK-NEXT: ret
897 %cmp_bc = icmp ugt <4 x i32> %b, %c
898 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
899 %cmp_ba = icmp ugt <4 x i32> %b, %a
900 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
901 %cmp_ca = icmp ult <4 x i32> %a, %c
902 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
903 ret <4 x i32> %r
904}
905
906define <4 x i32> @umax_ab_bc_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
907; CHECK-LABEL: umax_ab_bc_eq_pred:
908; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]909; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]910; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]911; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]912; CHECK-NEXT: ret
913 %cmp_ab = icmp ugt <4 x i32> %a, %b
914 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
915 %cmp_bc = icmp ugt <4 x i32> %b, %c
916 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
917 %cmp_ac = icmp uge <4 x i32> %a, %c
918 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
919 ret <4 x i32> %r
920}
921
922define <4 x i32> @umax_ab_cb_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
923; CHECK-LABEL: umax_ab_cb_eq_pred:
924; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]925; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]926; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]927; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]928; CHECK-NEXT: ret
929 %cmp_ab = icmp ugt <4 x i32> %a, %b
930 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
931 %cmp_cb = icmp ugt <4 x i32> %c, %b
932 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
933 %cmp_ac = icmp uge <4 x i32> %a, %c
934 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
935 ret <4 x i32> %r
936}
937
938define <4 x i32> @umax_bc_ab_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
939; CHECK-LABEL: umax_bc_ab_eq_pred:
940; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]941; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
942; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
943; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]944; CHECK-NEXT: ret
945 %cmp_bc = icmp ugt <4 x i32> %b, %c
946 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
947 %cmp_ab = icmp ugt <4 x i32> %a, %b
948 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
949 %cmp_ca = icmp uge <4 x i32> %c, %a
950 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
951 ret <4 x i32> %r
952}
953
954define <4 x i32> @umax_bc_ba_eq_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
955; CHECK-LABEL: umax_bc_ba_eq_pred:
956; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]957; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
958; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
959; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]960; CHECK-NEXT: ret
961 %cmp_bc = icmp ugt <4 x i32> %b, %c
962 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
963 %cmp_ba = icmp ugt <4 x i32> %b, %a
964 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
965 %cmp_ca = icmp uge <4 x i32> %c, %a
966 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
967 ret <4 x i32> %r
968}
969
970define <4 x i32> @umax_ab_bc_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
971; CHECK-LABEL: umax_ab_bc_eq_swap_pred:
972; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]973; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]974; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]975; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]976; CHECK-NEXT: ret
977 %cmp_ab = icmp ugt <4 x i32> %a, %b
978 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
979 %cmp_bc = icmp ugt <4 x i32> %b, %c
980 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
981 %cmp_ac = icmp ule <4 x i32> %c, %a
982 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
983 ret <4 x i32> %r
984}
985
986define <4 x i32> @umax_ab_cb_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
987; CHECK-LABEL: umax_ab_cb_eq_swap_pred:
988; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]989; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]990; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]991; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]992; CHECK-NEXT: ret
993 %cmp_ab = icmp ugt <4 x i32> %a, %b
994 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
995 %cmp_cb = icmp ugt <4 x i32> %c, %b
996 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
997 %cmp_ac = icmp ule <4 x i32> %c, %a
998 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
999 ret <4 x i32> %r
1000}
1001
1002define <4 x i32> @umax_bc_ab_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1003; CHECK-LABEL: umax_bc_ab_eq_swap_pred:
1004; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]1005; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
1006; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
1007; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]1008; CHECK-NEXT: ret
1009 %cmp_bc = icmp ugt <4 x i32> %b, %c
1010 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1011 %cmp_ab = icmp ugt <4 x i32> %a, %b
1012 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1013 %cmp_ca = icmp ule <4 x i32> %a, %c
1014 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1015 ret <4 x i32> %r
1016}
1017
1018define <4 x i32> @umax_bc_ba_eq_swap_pred(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1019; CHECK-LABEL: umax_bc_ba_eq_swap_pred:
1020; CHECK: // %bb.0:
Sanjay Patel78114302018-01-02 20:56:45 +0000[diff] [blame]1021; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
1022; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
1023; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patel35a6ee82018-01-02 20:16:45 +0000[diff] [blame]1024; CHECK-NEXT: ret
1025 %cmp_bc = icmp ugt <4 x i32> %b, %c
1026 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1027 %cmp_ba = icmp ugt <4 x i32> %b, %a
1028 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1029 %cmp_ca = icmp ule <4 x i32> %a, %c
1030 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1031 ret <4 x i32> %r
1032}
1033
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1034define <4 x i32> @notted_smin_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1035; CHECK-LABEL: notted_smin_ab_bc:
1036; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1037; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1038; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1039; CHECK-NEXT: mvn v2.16b, v2.16b
1040; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1041; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
1042; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1043; CHECK-NEXT: ret
1044 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1045 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1046 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1047 %cmp_ab = icmp slt <4 x i32> %a, %b
1048 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1049 %cmp_bc = icmp slt <4 x i32> %b, %c
1050 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1051 %cmp_ac = icmp slt <4 x i32> %z, %x
1052 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1053 ret <4 x i32> %r
1054}
1055
1056define <4 x i32> @notted_smin_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1057; CHECK-LABEL: notted_smin_ab_cb:
1058; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1059; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1060; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1061; CHECK-NEXT: mvn v2.16b, v2.16b
1062; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1063; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
1064; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1065; CHECK-NEXT: ret
1066 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1067 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1068 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1069 %cmp_ab = icmp slt <4 x i32> %a, %b
1070 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1071 %cmp_cb = icmp slt <4 x i32> %c, %b
1072 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1073 %cmp_ac = icmp slt <4 x i32> %z, %x
1074 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1075 ret <4 x i32> %r
1076}
1077
1078define <4 x i32> @notted_smin_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1079; CHECK-LABEL: notted_smin_bc_ab:
1080; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1081; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1082; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1083; CHECK-NEXT: mvn v2.16b, v2.16b
1084; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1085; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1086; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1087; CHECK-NEXT: ret
1088 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1089 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1090 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1091 %cmp_bc = icmp slt <4 x i32> %b, %c
1092 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1093 %cmp_ab = icmp slt <4 x i32> %a, %b
1094 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1095 %cmp_ca = icmp slt <4 x i32> %x, %z
1096 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1097 ret <4 x i32> %r
1098}
1099
1100define <4 x i32> @notted_smin_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1101; CHECK-LABEL: notted_smin_bc_ba:
1102; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1103; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1104; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1105; CHECK-NEXT: mvn v2.16b, v2.16b
1106; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1107; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
1108; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1109; CHECK-NEXT: ret
1110 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1111 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1112 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1113 %cmp_bc = icmp slt <4 x i32> %b, %c
1114 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1115 %cmp_ba = icmp slt <4 x i32> %b, %a
1116 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1117 %cmp_ca = icmp slt <4 x i32> %x, %z
1118 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1119 ret <4 x i32> %r
1120}
1121
1122define <4 x i32> @notted_smin_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1123; CHECK-LABEL: notted_smin_ab_bc_swap_pred:
1124; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1125; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1126; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1127; CHECK-NEXT: mvn v2.16b, v2.16b
1128; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1129; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
1130; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1131; CHECK-NEXT: ret
1132 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1133 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1134 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1135 %cmp_ab = icmp slt <4 x i32> %a, %b
1136 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1137 %cmp_bc = icmp slt <4 x i32> %b, %c
1138 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1139 %cmp_ac = icmp sgt <4 x i32> %x, %z
1140 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1141 ret <4 x i32> %r
1142}
1143
1144define <4 x i32> @notted_smin_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1145; CHECK-LABEL: notted_smin_ab_cb_swap_pred:
1146; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1147; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1148; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1149; CHECK-NEXT: mvn v2.16b, v2.16b
1150; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1151; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
1152; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1153; CHECK-NEXT: ret
1154 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1155 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1156 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1157 %cmp_ab = icmp slt <4 x i32> %a, %b
1158 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1159 %cmp_cb = icmp slt <4 x i32> %c, %b
1160 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1161 %cmp_ac = icmp sgt <4 x i32> %x, %z
1162 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1163 ret <4 x i32> %r
1164}
1165
1166define <4 x i32> @notted_smin_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1167; CHECK-LABEL: notted_smin_bc_ab_swap_pred:
1168; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1169; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1170; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1171; CHECK-NEXT: mvn v2.16b, v2.16b
1172; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1173; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1174; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1175; CHECK-NEXT: ret
1176 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1177 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1178 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1179 %cmp_bc = icmp slt <4 x i32> %b, %c
1180 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1181 %cmp_ab = icmp slt <4 x i32> %a, %b
1182 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1183 %cmp_ca = icmp sgt <4 x i32> %z, %x
1184 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1185 ret <4 x i32> %r
1186}
1187
1188define <4 x i32> @notted_smin_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1189; CHECK-LABEL: notted_smin_bc_ba_swap_pred:
1190; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1191; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1192; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1193; CHECK-NEXT: mvn v2.16b, v2.16b
1194; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1195; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
1196; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1197; CHECK-NEXT: ret
1198 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1199 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1200 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1201 %cmp_bc = icmp slt <4 x i32> %b, %c
1202 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1203 %cmp_ba = icmp slt <4 x i32> %b, %a
1204 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1205 %cmp_ca = icmp sgt <4 x i32> %z, %x
1206 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1207 ret <4 x i32> %r
1208}
1209
1210define <4 x i32> @notted_smin_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1211; CHECK-LABEL: notted_smin_ab_bc_eq_pred:
1212; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1213; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1214; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1215; CHECK-NEXT: mvn v2.16b, v2.16b
1216; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1217; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
1218; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1219; CHECK-NEXT: ret
1220 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1221 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1222 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1223 %cmp_ab = icmp slt <4 x i32> %a, %b
1224 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1225 %cmp_bc = icmp slt <4 x i32> %b, %c
1226 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1227 %cmp_ac = icmp sle <4 x i32> %z, %x
1228 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1229 ret <4 x i32> %r
1230}
1231
1232define <4 x i32> @notted_smin_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1233; CHECK-LABEL: notted_smin_ab_cb_eq_pred:
1234; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1235; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1236; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1237; CHECK-NEXT: mvn v2.16b, v2.16b
1238; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1239; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
1240; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1241; CHECK-NEXT: ret
1242 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1243 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1244 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1245 %cmp_ab = icmp slt <4 x i32> %a, %b
1246 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1247 %cmp_cb = icmp slt <4 x i32> %c, %b
1248 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1249 %cmp_ac = icmp sle <4 x i32> %z, %x
1250 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1251 ret <4 x i32> %r
1252}
1253
1254define <4 x i32> @notted_smin_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1255; CHECK-LABEL: notted_smin_bc_ab_eq_pred:
1256; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1257; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1258; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1259; CHECK-NEXT: mvn v2.16b, v2.16b
1260; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1261; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1262; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1263; CHECK-NEXT: ret
1264 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1265 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1266 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1267 %cmp_bc = icmp slt <4 x i32> %b, %c
1268 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1269 %cmp_ab = icmp slt <4 x i32> %a, %b
1270 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1271 %cmp_ca = icmp sle <4 x i32> %x, %z
1272 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1273 ret <4 x i32> %r
1274}
1275
1276define <4 x i32> @notted_smin_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1277; CHECK-LABEL: notted_smin_bc_ba_eq_pred:
1278; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1279; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1280; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1281; CHECK-NEXT: mvn v2.16b, v2.16b
1282; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1283; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
1284; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1285; CHECK-NEXT: ret
1286 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1287 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1288 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1289 %cmp_bc = icmp slt <4 x i32> %b, %c
1290 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1291 %cmp_ba = icmp slt <4 x i32> %b, %a
1292 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1293 %cmp_ca = icmp sle <4 x i32> %x, %z
1294 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1295 ret <4 x i32> %r
1296}
1297
1298define <4 x i32> @notted_smin_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1299; CHECK-LABEL: notted_smin_ab_bc_eq_swap_pred:
1300; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1301; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1302; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1303; CHECK-NEXT: mvn v2.16b, v2.16b
1304; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1305; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
1306; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1307; CHECK-NEXT: ret
1308 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1309 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1310 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1311 %cmp_ab = icmp slt <4 x i32> %a, %b
1312 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1313 %cmp_bc = icmp slt <4 x i32> %b, %c
1314 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1315 %cmp_ac = icmp sge <4 x i32> %x, %z
1316 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1317 ret <4 x i32> %r
1318}
1319
1320define <4 x i32> @notted_smin_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1321; CHECK-LABEL: notted_smin_ab_cb_eq_swap_pred:
1322; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1323; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1324; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1325; CHECK-NEXT: mvn v2.16b, v2.16b
1326; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1327; CHECK-NEXT: smin v1.4s, v2.4s, v1.4s
1328; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1329; CHECK-NEXT: ret
1330 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1331 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1332 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1333 %cmp_ab = icmp slt <4 x i32> %a, %b
1334 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1335 %cmp_cb = icmp slt <4 x i32> %c, %b
1336 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1337 %cmp_ac = icmp sge <4 x i32> %x, %z
1338 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1339 ret <4 x i32> %r
1340}
1341
1342define <4 x i32> @notted_smin_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1343; CHECK-LABEL: notted_smin_bc_ab_eq_swap_pred:
1344; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1345; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1346; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1347; CHECK-NEXT: mvn v2.16b, v2.16b
1348; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1349; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
1350; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1351; CHECK-NEXT: ret
1352 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1353 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1354 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1355 %cmp_bc = icmp slt <4 x i32> %b, %c
1356 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1357 %cmp_ab = icmp slt <4 x i32> %a, %b
1358 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1359 %cmp_ca = icmp sge <4 x i32> %z, %x
1360 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1361 ret <4 x i32> %r
1362}
1363
1364define <4 x i32> @notted_smin_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1365; CHECK-LABEL: notted_smin_bc_ba_eq_swap_pred:
1366; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1367; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1368; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1369; CHECK-NEXT: mvn v2.16b, v2.16b
1370; CHECK-NEXT: smin v2.4s, v1.4s, v2.4s
1371; CHECK-NEXT: smin v0.4s, v1.4s, v0.4s
1372; CHECK-NEXT: smin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1373; CHECK-NEXT: ret
1374 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1375 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1376 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1377 %cmp_bc = icmp slt <4 x i32> %b, %c
1378 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1379 %cmp_ba = icmp slt <4 x i32> %b, %a
1380 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1381 %cmp_ca = icmp sge <4 x i32> %z, %x
1382 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1383 ret <4 x i32> %r
1384}
1385
1386define <4 x i32> @notted_smax_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1387; CHECK-LABEL: notted_smax_ab_bc:
1388; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1389; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1390; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1391; CHECK-NEXT: mvn v2.16b, v2.16b
1392; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1393; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
1394; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1395; CHECK-NEXT: ret
1396 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1397 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1398 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1399 %cmp_ab = icmp sgt <4 x i32> %a, %b
1400 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1401 %cmp_bc = icmp sgt <4 x i32> %b, %c
1402 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1403 %cmp_ac = icmp sgt <4 x i32> %z, %x
1404 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1405 ret <4 x i32> %r
1406}
1407
1408define <4 x i32> @notted_smax_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1409; CHECK-LABEL: notted_smax_ab_cb:
1410; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1411; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1412; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1413; CHECK-NEXT: mvn v2.16b, v2.16b
1414; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1415; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
1416; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1417; CHECK-NEXT: ret
1418 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1419 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1420 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1421 %cmp_ab = icmp sgt <4 x i32> %a, %b
1422 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1423 %cmp_cb = icmp sgt <4 x i32> %c, %b
1424 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1425 %cmp_ac = icmp sgt <4 x i32> %z, %x
1426 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1427 ret <4 x i32> %r
1428}
1429
1430define <4 x i32> @notted_smax_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1431; CHECK-LABEL: notted_smax_bc_ab:
1432; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1433; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1434; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1435; CHECK-NEXT: mvn v2.16b, v2.16b
1436; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1437; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1438; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1439; CHECK-NEXT: ret
1440 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1441 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1442 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1443 %cmp_bc = icmp sgt <4 x i32> %b, %c
1444 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1445 %cmp_ab = icmp sgt <4 x i32> %a, %b
1446 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1447 %cmp_ca = icmp sgt <4 x i32> %x, %z
1448 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1449 ret <4 x i32> %r
1450}
1451
1452define <4 x i32> @notted_smax_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1453; CHECK-LABEL: notted_smax_bc_ba:
1454; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1455; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1456; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1457; CHECK-NEXT: mvn v2.16b, v2.16b
1458; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1459; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
1460; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1461; CHECK-NEXT: ret
1462 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1463 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1464 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1465 %cmp_bc = icmp sgt <4 x i32> %b, %c
1466 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1467 %cmp_ba = icmp sgt <4 x i32> %b, %a
1468 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1469 %cmp_ca = icmp sgt <4 x i32> %x, %z
1470 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1471 ret <4 x i32> %r
1472}
1473
1474define <4 x i32> @notted_smax_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1475; CHECK-LABEL: notted_smax_ab_bc_swap_pred:
1476; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1477; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1478; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1479; CHECK-NEXT: mvn v2.16b, v2.16b
1480; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1481; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
1482; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1483; CHECK-NEXT: ret
1484 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1485 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1486 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1487 %cmp_ab = icmp sgt <4 x i32> %a, %b
1488 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1489 %cmp_bc = icmp sgt <4 x i32> %b, %c
1490 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1491 %cmp_ac = icmp slt <4 x i32> %x, %z
1492 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1493 ret <4 x i32> %r
1494}
1495
1496define <4 x i32> @notted_smax_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1497; CHECK-LABEL: notted_smax_ab_cb_swap_pred:
1498; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1499; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1500; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1501; CHECK-NEXT: mvn v2.16b, v2.16b
1502; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1503; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
1504; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1505; CHECK-NEXT: ret
1506 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1507 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1508 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1509 %cmp_ab = icmp sgt <4 x i32> %a, %b
1510 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1511 %cmp_cb = icmp sgt <4 x i32> %c, %b
1512 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1513 %cmp_ac = icmp slt <4 x i32> %x, %z
1514 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1515 ret <4 x i32> %r
1516}
1517
1518define <4 x i32> @notted_smax_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1519; CHECK-LABEL: notted_smax_bc_ab_swap_pred:
1520; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1521; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1522; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1523; CHECK-NEXT: mvn v2.16b, v2.16b
1524; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1525; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1526; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1527; CHECK-NEXT: ret
1528 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1529 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1530 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1531 %cmp_bc = icmp sgt <4 x i32> %b, %c
1532 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1533 %cmp_ab = icmp sgt <4 x i32> %a, %b
1534 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1535 %cmp_ca = icmp slt <4 x i32> %z, %x
1536 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1537 ret <4 x i32> %r
1538}
1539
1540define <4 x i32> @notted_smax_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1541; CHECK-LABEL: notted_smax_bc_ba_swap_pred:
1542; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1543; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1544; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1545; CHECK-NEXT: mvn v2.16b, v2.16b
1546; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1547; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
1548; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1549; CHECK-NEXT: ret
1550 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1551 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1552 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1553 %cmp_bc = icmp sgt <4 x i32> %b, %c
1554 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1555 %cmp_ba = icmp sgt <4 x i32> %b, %a
1556 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1557 %cmp_ca = icmp slt <4 x i32> %z, %x
1558 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1559 ret <4 x i32> %r
1560}
1561
1562define <4 x i32> @notted_smax_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1563; CHECK-LABEL: notted_smax_ab_bc_eq_pred:
1564; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1565; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1566; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1567; CHECK-NEXT: mvn v2.16b, v2.16b
1568; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1569; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
1570; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1571; CHECK-NEXT: ret
1572 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1573 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1574 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1575 %cmp_ab = icmp sgt <4 x i32> %a, %b
1576 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1577 %cmp_bc = icmp sgt <4 x i32> %b, %c
1578 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1579 %cmp_ac = icmp sge <4 x i32> %z, %x
1580 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1581 ret <4 x i32> %r
1582}
1583
1584define <4 x i32> @notted_smax_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1585; CHECK-LABEL: notted_smax_ab_cb_eq_pred:
1586; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1587; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1588; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1589; CHECK-NEXT: mvn v2.16b, v2.16b
1590; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1591; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
1592; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1593; CHECK-NEXT: ret
1594 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1595 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1596 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1597 %cmp_ab = icmp sgt <4 x i32> %a, %b
1598 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1599 %cmp_cb = icmp sgt <4 x i32> %c, %b
1600 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1601 %cmp_ac = icmp sge <4 x i32> %z, %x
1602 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1603 ret <4 x i32> %r
1604}
1605
1606define <4 x i32> @notted_smax_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1607; CHECK-LABEL: notted_smax_bc_ab_eq_pred:
1608; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1609; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1610; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1611; CHECK-NEXT: mvn v2.16b, v2.16b
1612; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1613; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1614; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1615; CHECK-NEXT: ret
1616 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1617 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1618 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1619 %cmp_bc = icmp sgt <4 x i32> %b, %c
1620 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1621 %cmp_ab = icmp sgt <4 x i32> %a, %b
1622 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1623 %cmp_ca = icmp sge <4 x i32> %x, %z
1624 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1625 ret <4 x i32> %r
1626}
1627
1628define <4 x i32> @notted_smax_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1629; CHECK-LABEL: notted_smax_bc_ba_eq_pred:
1630; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1631; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1632; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1633; CHECK-NEXT: mvn v2.16b, v2.16b
1634; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1635; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
1636; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1637; CHECK-NEXT: ret
1638 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1639 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1640 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1641 %cmp_bc = icmp sgt <4 x i32> %b, %c
1642 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1643 %cmp_ba = icmp sgt <4 x i32> %b, %a
1644 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1645 %cmp_ca = icmp sge <4 x i32> %x, %z
1646 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1647 ret <4 x i32> %r
1648}
1649
1650define <4 x i32> @notted_smax_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1651; CHECK-LABEL: notted_smax_ab_bc_eq_swap_pred:
1652; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1653; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1654; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1655; CHECK-NEXT: mvn v2.16b, v2.16b
1656; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1657; CHECK-NEXT: smax v1.4s, v1.4s, v2.4s
1658; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1659; CHECK-NEXT: ret
1660 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1661 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1662 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1663 %cmp_ab = icmp sgt <4 x i32> %a, %b
1664 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1665 %cmp_bc = icmp sgt <4 x i32> %b, %c
1666 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1667 %cmp_ac = icmp sle <4 x i32> %x, %z
1668 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1669 ret <4 x i32> %r
1670}
1671
1672define <4 x i32> @notted_smax_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1673; CHECK-LABEL: notted_smax_ab_cb_eq_swap_pred:
1674; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1675; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1676; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1677; CHECK-NEXT: mvn v2.16b, v2.16b
1678; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1679; CHECK-NEXT: smax v1.4s, v2.4s, v1.4s
1680; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1681; CHECK-NEXT: ret
1682 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1683 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1684 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1685 %cmp_ab = icmp sgt <4 x i32> %a, %b
1686 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1687 %cmp_cb = icmp sgt <4 x i32> %c, %b
1688 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1689 %cmp_ac = icmp sle <4 x i32> %x, %z
1690 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1691 ret <4 x i32> %r
1692}
1693
1694define <4 x i32> @notted_smax_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1695; CHECK-LABEL: notted_smax_bc_ab_eq_swap_pred:
1696; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1697; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1698; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1699; CHECK-NEXT: mvn v2.16b, v2.16b
1700; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1701; CHECK-NEXT: smax v0.4s, v0.4s, v1.4s
1702; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1703; CHECK-NEXT: ret
1704 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1705 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1706 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1707 %cmp_bc = icmp sgt <4 x i32> %b, %c
1708 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1709 %cmp_ab = icmp sgt <4 x i32> %a, %b
1710 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1711 %cmp_ca = icmp sle <4 x i32> %z, %x
1712 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1713 ret <4 x i32> %r
1714}
1715
1716define <4 x i32> @notted_smax_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1717; CHECK-LABEL: notted_smax_bc_ba_eq_swap_pred:
1718; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1719; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1720; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1721; CHECK-NEXT: mvn v2.16b, v2.16b
1722; CHECK-NEXT: smax v2.4s, v1.4s, v2.4s
1723; CHECK-NEXT: smax v0.4s, v1.4s, v0.4s
1724; CHECK-NEXT: smax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1725; CHECK-NEXT: ret
1726 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1727 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1728 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1729 %cmp_bc = icmp sgt <4 x i32> %b, %c
1730 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1731 %cmp_ba = icmp sgt <4 x i32> %b, %a
1732 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1733 %cmp_ca = icmp sle <4 x i32> %z, %x
1734 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1735 ret <4 x i32> %r
1736}
1737
1738define <4 x i32> @notted_umin_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1739; CHECK-LABEL: notted_umin_ab_bc:
1740; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1741; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1742; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1743; CHECK-NEXT: mvn v2.16b, v2.16b
1744; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1745; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
1746; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1747; CHECK-NEXT: ret
1748 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1749 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1750 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1751 %cmp_ab = icmp ult <4 x i32> %a, %b
1752 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1753 %cmp_bc = icmp ult <4 x i32> %b, %c
1754 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1755 %cmp_ac = icmp ult <4 x i32> %z, %x
1756 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1757 ret <4 x i32> %r
1758}
1759
1760define <4 x i32> @notted_umin_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1761; CHECK-LABEL: notted_umin_ab_cb:
1762; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1763; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1764; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1765; CHECK-NEXT: mvn v2.16b, v2.16b
1766; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1767; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
1768; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1769; CHECK-NEXT: ret
1770 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1771 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1772 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1773 %cmp_ab = icmp ult <4 x i32> %a, %b
1774 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1775 %cmp_cb = icmp ult <4 x i32> %c, %b
1776 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1777 %cmp_ac = icmp ult <4 x i32> %z, %x
1778 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1779 ret <4 x i32> %r
1780}
1781
1782define <4 x i32> @notted_umin_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1783; CHECK-LABEL: notted_umin_bc_ab:
1784; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1785; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1786; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1787; CHECK-NEXT: mvn v2.16b, v2.16b
1788; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
1789; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1790; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1791; CHECK-NEXT: ret
1792 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1793 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1794 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1795 %cmp_bc = icmp ult <4 x i32> %b, %c
1796 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1797 %cmp_ab = icmp ult <4 x i32> %a, %b
1798 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1799 %cmp_ca = icmp ult <4 x i32> %x, %z
1800 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1801 ret <4 x i32> %r
1802}
1803
1804define <4 x i32> @notted_umin_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1805; CHECK-LABEL: notted_umin_bc_ba:
1806; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1807; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1808; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1809; CHECK-NEXT: mvn v2.16b, v2.16b
1810; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
1811; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
1812; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1813; CHECK-NEXT: ret
1814 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1815 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1816 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1817 %cmp_bc = icmp ult <4 x i32> %b, %c
1818 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1819 %cmp_ba = icmp ult <4 x i32> %b, %a
1820 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1821 %cmp_ca = icmp ult <4 x i32> %x, %z
1822 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1823 ret <4 x i32> %r
1824}
1825
1826define <4 x i32> @notted_umin_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1827; CHECK-LABEL: notted_umin_ab_bc_swap_pred:
1828; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1829; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1830; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1831; CHECK-NEXT: mvn v2.16b, v2.16b
1832; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1833; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
1834; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1835; CHECK-NEXT: ret
1836 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1837 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1838 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1839 %cmp_ab = icmp ult <4 x i32> %a, %b
1840 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1841 %cmp_bc = icmp ult <4 x i32> %b, %c
1842 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1843 %cmp_ac = icmp ugt <4 x i32> %x, %z
1844 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1845 ret <4 x i32> %r
1846}
1847
1848define <4 x i32> @notted_umin_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1849; CHECK-LABEL: notted_umin_ab_cb_swap_pred:
1850; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1851; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1852; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1853; CHECK-NEXT: mvn v2.16b, v2.16b
1854; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1855; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
1856; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1857; CHECK-NEXT: ret
1858 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1859 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1860 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1861 %cmp_ab = icmp ult <4 x i32> %a, %b
1862 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1863 %cmp_cb = icmp ult <4 x i32> %c, %b
1864 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1865 %cmp_ac = icmp ugt <4 x i32> %x, %z
1866 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1867 ret <4 x i32> %r
1868}
1869
1870define <4 x i32> @notted_umin_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1871; CHECK-LABEL: notted_umin_bc_ab_swap_pred:
1872; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1873; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1874; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1875; CHECK-NEXT: mvn v2.16b, v2.16b
1876; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
1877; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1878; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1879; CHECK-NEXT: ret
1880 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1881 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1882 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1883 %cmp_bc = icmp ult <4 x i32> %b, %c
1884 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1885 %cmp_ab = icmp ult <4 x i32> %a, %b
1886 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1887 %cmp_ca = icmp ugt <4 x i32> %z, %x
1888 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1889 ret <4 x i32> %r
1890}
1891
1892define <4 x i32> @notted_umin_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1893; CHECK-LABEL: notted_umin_bc_ba_swap_pred:
1894; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1895; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1896; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1897; CHECK-NEXT: mvn v2.16b, v2.16b
1898; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
1899; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
1900; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1901; CHECK-NEXT: ret
1902 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1903 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1904 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1905 %cmp_bc = icmp ult <4 x i32> %b, %c
1906 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1907 %cmp_ba = icmp ult <4 x i32> %b, %a
1908 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1909 %cmp_ca = icmp ugt <4 x i32> %z, %x
1910 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1911 ret <4 x i32> %r
1912}
1913
1914define <4 x i32> @notted_umin_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1915; CHECK-LABEL: notted_umin_ab_bc_eq_pred:
1916; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1917; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1918; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1919; CHECK-NEXT: mvn v2.16b, v2.16b
1920; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1921; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
1922; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1923; CHECK-NEXT: ret
1924 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1925 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1926 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1927 %cmp_ab = icmp ult <4 x i32> %a, %b
1928 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1929 %cmp_bc = icmp ult <4 x i32> %b, %c
1930 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1931 %cmp_ac = icmp ule <4 x i32> %z, %x
1932 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
1933 ret <4 x i32> %r
1934}
1935
1936define <4 x i32> @notted_umin_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1937; CHECK-LABEL: notted_umin_ab_cb_eq_pred:
1938; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1939; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1940; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1941; CHECK-NEXT: mvn v2.16b, v2.16b
1942; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1943; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
1944; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1945; CHECK-NEXT: ret
1946 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1947 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1948 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1949 %cmp_ab = icmp ult <4 x i32> %a, %b
1950 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1951 %cmp_cb = icmp ult <4 x i32> %c, %b
1952 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
1953 %cmp_ac = icmp ule <4 x i32> %z, %x
1954 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
1955 ret <4 x i32> %r
1956}
1957
1958define <4 x i32> @notted_umin_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1959; CHECK-LABEL: notted_umin_bc_ab_eq_pred:
1960; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1961; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1962; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1963; CHECK-NEXT: mvn v2.16b, v2.16b
1964; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
1965; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
1966; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1967; CHECK-NEXT: ret
1968 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1969 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1970 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1971 %cmp_bc = icmp ult <4 x i32> %b, %c
1972 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1973 %cmp_ab = icmp ult <4 x i32> %a, %b
1974 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
1975 %cmp_ca = icmp ule <4 x i32> %x, %z
1976 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
1977 ret <4 x i32> %r
1978}
1979
1980define <4 x i32> @notted_umin_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
1981; CHECK-LABEL: notted_umin_bc_ba_eq_pred:
1982; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1983; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1984; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]1985; CHECK-NEXT: mvn v2.16b, v2.16b
1986; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
1987; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
1988; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]1989; CHECK-NEXT: ret
1990 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
1991 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
1992 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
1993 %cmp_bc = icmp ult <4 x i32> %b, %c
1994 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
1995 %cmp_ba = icmp ult <4 x i32> %b, %a
1996 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
1997 %cmp_ca = icmp ule <4 x i32> %x, %z
1998 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
1999 ret <4 x i32> %r
2000}
2001
2002define <4 x i32> @notted_umin_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2003; CHECK-LABEL: notted_umin_ab_bc_eq_swap_pred:
2004; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2005; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2006; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2007; CHECK-NEXT: mvn v2.16b, v2.16b
2008; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
2009; CHECK-NEXT: umin v1.4s, v1.4s, v2.4s
2010; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2011; CHECK-NEXT: ret
2012 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2013 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2014 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2015 %cmp_ab = icmp ult <4 x i32> %a, %b
2016 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2017 %cmp_bc = icmp ult <4 x i32> %b, %c
2018 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2019 %cmp_ac = icmp uge <4 x i32> %x, %z
2020 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2021 ret <4 x i32> %r
2022}
2023
2024define <4 x i32> @notted_umin_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2025; CHECK-LABEL: notted_umin_ab_cb_eq_swap_pred:
2026; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2027; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2028; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2029; CHECK-NEXT: mvn v2.16b, v2.16b
2030; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
2031; CHECK-NEXT: umin v1.4s, v2.4s, v1.4s
2032; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2033; CHECK-NEXT: ret
2034 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2035 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2036 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2037 %cmp_ab = icmp ult <4 x i32> %a, %b
2038 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2039 %cmp_cb = icmp ult <4 x i32> %c, %b
2040 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2041 %cmp_ac = icmp uge <4 x i32> %x, %z
2042 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2043 ret <4 x i32> %r
2044}
2045
2046define <4 x i32> @notted_umin_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2047; CHECK-LABEL: notted_umin_bc_ab_eq_swap_pred:
2048; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2049; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2050; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2051; CHECK-NEXT: mvn v2.16b, v2.16b
2052; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
2053; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s
2054; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2055; CHECK-NEXT: ret
2056 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2057 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2058 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2059 %cmp_bc = icmp ult <4 x i32> %b, %c
2060 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2061 %cmp_ab = icmp ult <4 x i32> %a, %b
2062 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2063 %cmp_ca = icmp uge <4 x i32> %z, %x
2064 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2065 ret <4 x i32> %r
2066}
2067
2068define <4 x i32> @notted_umin_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2069; CHECK-LABEL: notted_umin_bc_ba_eq_swap_pred:
2070; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2071; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2072; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2073; CHECK-NEXT: mvn v2.16b, v2.16b
2074; CHECK-NEXT: umin v2.4s, v1.4s, v2.4s
2075; CHECK-NEXT: umin v0.4s, v1.4s, v0.4s
2076; CHECK-NEXT: umin v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2077; CHECK-NEXT: ret
2078 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2079 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2080 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2081 %cmp_bc = icmp ult <4 x i32> %b, %c
2082 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2083 %cmp_ba = icmp ult <4 x i32> %b, %a
2084 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2085 %cmp_ca = icmp uge <4 x i32> %z, %x
2086 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2087 ret <4 x i32> %r
2088}
2089
2090define <4 x i32> @notted_umax_ab_bc(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2091; CHECK-LABEL: notted_umax_ab_bc:
2092; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2093; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2094; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2095; CHECK-NEXT: mvn v2.16b, v2.16b
2096; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2097; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
2098; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2099; CHECK-NEXT: ret
2100 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2101 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2102 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2103 %cmp_ab = icmp ugt <4 x i32> %a, %b
2104 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2105 %cmp_bc = icmp ugt <4 x i32> %b, %c
2106 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2107 %cmp_ac = icmp ugt <4 x i32> %z, %x
2108 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2109 ret <4 x i32> %r
2110}
2111
2112define <4 x i32> @notted_umax_ab_cb(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2113; CHECK-LABEL: notted_umax_ab_cb:
2114; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2115; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2116; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2117; CHECK-NEXT: mvn v2.16b, v2.16b
2118; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2119; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
2120; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2121; CHECK-NEXT: ret
2122 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2123 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2124 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2125 %cmp_ab = icmp ugt <4 x i32> %a, %b
2126 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2127 %cmp_cb = icmp ugt <4 x i32> %c, %b
2128 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2129 %cmp_ac = icmp ugt <4 x i32> %z, %x
2130 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2131 ret <4 x i32> %r
2132}
2133
2134define <4 x i32> @notted_umax_bc_ab(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2135; CHECK-LABEL: notted_umax_bc_ab:
2136; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2137; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2138; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2139; CHECK-NEXT: mvn v2.16b, v2.16b
2140; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2141; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2142; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2143; CHECK-NEXT: ret
2144 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2145 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2146 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2147 %cmp_bc = icmp ugt <4 x i32> %b, %c
2148 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2149 %cmp_ab = icmp ugt <4 x i32> %a, %b
2150 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2151 %cmp_ca = icmp ugt <4 x i32> %x, %z
2152 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2153 ret <4 x i32> %r
2154}
2155
2156define <4 x i32> @notted_umax_bc_ba(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2157; CHECK-LABEL: notted_umax_bc_ba:
2158; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2159; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2160; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2161; CHECK-NEXT: mvn v2.16b, v2.16b
2162; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2163; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
2164; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2165; CHECK-NEXT: ret
2166 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2167 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2168 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2169 %cmp_bc = icmp ugt <4 x i32> %b, %c
2170 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2171 %cmp_ba = icmp ugt <4 x i32> %b, %a
2172 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2173 %cmp_ca = icmp ugt <4 x i32> %x, %z
2174 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2175 ret <4 x i32> %r
2176}
2177
2178define <4 x i32> @notted_umax_ab_bc_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2179; CHECK-LABEL: notted_umax_ab_bc_swap_pred:
2180; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2181; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2182; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2183; CHECK-NEXT: mvn v2.16b, v2.16b
2184; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2185; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
2186; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2187; CHECK-NEXT: ret
2188 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2189 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2190 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2191 %cmp_ab = icmp ugt <4 x i32> %a, %b
2192 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2193 %cmp_bc = icmp ugt <4 x i32> %b, %c
2194 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2195 %cmp_ac = icmp ult <4 x i32> %x, %z
2196 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2197 ret <4 x i32> %r
2198}
2199
2200define <4 x i32> @notted_umax_ab_cb_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2201; CHECK-LABEL: notted_umax_ab_cb_swap_pred:
2202; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2203; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2204; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2205; CHECK-NEXT: mvn v2.16b, v2.16b
2206; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2207; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
2208; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2209; CHECK-NEXT: ret
2210 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2211 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2212 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2213 %cmp_ab = icmp ugt <4 x i32> %a, %b
2214 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2215 %cmp_cb = icmp ugt <4 x i32> %c, %b
2216 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2217 %cmp_ac = icmp ult <4 x i32> %x, %z
2218 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2219 ret <4 x i32> %r
2220}
2221
2222define <4 x i32> @notted_umax_bc_ab_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2223; CHECK-LABEL: notted_umax_bc_ab_swap_pred:
2224; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2225; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2226; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2227; CHECK-NEXT: mvn v2.16b, v2.16b
2228; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2229; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2230; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2231; CHECK-NEXT: ret
2232 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2233 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2234 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2235 %cmp_bc = icmp ugt <4 x i32> %b, %c
2236 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2237 %cmp_ab = icmp ugt <4 x i32> %a, %b
2238 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2239 %cmp_ca = icmp ult <4 x i32> %z, %x
2240 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2241 ret <4 x i32> %r
2242}
2243
2244define <4 x i32> @notted_umax_bc_ba_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2245; CHECK-LABEL: notted_umax_bc_ba_swap_pred:
2246; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2247; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2248; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2249; CHECK-NEXT: mvn v2.16b, v2.16b
2250; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2251; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
2252; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2253; CHECK-NEXT: ret
2254 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2255 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2256 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2257 %cmp_bc = icmp ugt <4 x i32> %b, %c
2258 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2259 %cmp_ba = icmp ugt <4 x i32> %b, %a
2260 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2261 %cmp_ca = icmp ult <4 x i32> %z, %x
2262 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2263 ret <4 x i32> %r
2264}
2265
2266define <4 x i32> @notted_umax_ab_bc_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2267; CHECK-LABEL: notted_umax_ab_bc_eq_pred:
2268; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2269; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2270; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2271; CHECK-NEXT: mvn v2.16b, v2.16b
2272; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2273; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
2274; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2275; CHECK-NEXT: ret
2276 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2277 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2278 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2279 %cmp_ab = icmp ugt <4 x i32> %a, %b
2280 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2281 %cmp_bc = icmp ugt <4 x i32> %b, %c
2282 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2283 %cmp_ac = icmp uge <4 x i32> %z, %x
2284 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2285 ret <4 x i32> %r
2286}
2287
2288define <4 x i32> @notted_umax_ab_cb_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2289; CHECK-LABEL: notted_umax_ab_cb_eq_pred:
2290; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2291; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2292; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2293; CHECK-NEXT: mvn v2.16b, v2.16b
2294; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2295; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
2296; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2297; CHECK-NEXT: ret
2298 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2299 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2300 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2301 %cmp_ab = icmp ugt <4 x i32> %a, %b
2302 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2303 %cmp_cb = icmp ugt <4 x i32> %c, %b
2304 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2305 %cmp_ac = icmp uge <4 x i32> %z, %x
2306 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2307 ret <4 x i32> %r
2308}
2309
2310define <4 x i32> @notted_umax_bc_ab_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2311; CHECK-LABEL: notted_umax_bc_ab_eq_pred:
2312; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2313; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2314; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2315; CHECK-NEXT: mvn v2.16b, v2.16b
2316; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2317; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2318; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2319; CHECK-NEXT: ret
2320 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2321 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2322 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2323 %cmp_bc = icmp ugt <4 x i32> %b, %c
2324 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2325 %cmp_ab = icmp ugt <4 x i32> %a, %b
2326 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2327 %cmp_ca = icmp uge <4 x i32> %x, %z
2328 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2329 ret <4 x i32> %r
2330}
2331
2332define <4 x i32> @notted_umax_bc_ba_eq_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2333; CHECK-LABEL: notted_umax_bc_ba_eq_pred:
2334; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2335; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2336; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2337; CHECK-NEXT: mvn v2.16b, v2.16b
2338; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2339; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
2340; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2341; CHECK-NEXT: ret
2342 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2343 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2344 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2345 %cmp_bc = icmp ugt <4 x i32> %b, %c
2346 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2347 %cmp_ba = icmp ugt <4 x i32> %b, %a
2348 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2349 %cmp_ca = icmp uge <4 x i32> %x, %z
2350 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2351 ret <4 x i32> %r
2352}
2353
2354define <4 x i32> @notted_umax_ab_bc_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2355; CHECK-LABEL: notted_umax_ab_bc_eq_swap_pred:
2356; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2357; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2358; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2359; CHECK-NEXT: mvn v2.16b, v2.16b
2360; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2361; CHECK-NEXT: umax v1.4s, v1.4s, v2.4s
2362; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2363; CHECK-NEXT: ret
2364 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2365 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2366 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2367 %cmp_ab = icmp ugt <4 x i32> %a, %b
2368 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2369 %cmp_bc = icmp ugt <4 x i32> %b, %c
2370 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2371 %cmp_ac = icmp ule <4 x i32> %x, %z
2372 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_bc
2373 ret <4 x i32> %r
2374}
2375
2376define <4 x i32> @notted_umax_ab_cb_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2377; CHECK-LABEL: notted_umax_ab_cb_eq_swap_pred:
2378; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2379; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2380; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2381; CHECK-NEXT: mvn v2.16b, v2.16b
2382; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2383; CHECK-NEXT: umax v1.4s, v2.4s, v1.4s
2384; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2385; CHECK-NEXT: ret
2386 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2387 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2388 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2389 %cmp_ab = icmp ugt <4 x i32> %a, %b
2390 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2391 %cmp_cb = icmp ugt <4 x i32> %c, %b
2392 %min_cb = select <4 x i1> %cmp_cb, <4 x i32> %c, <4 x i32> %b
2393 %cmp_ac = icmp ule <4 x i32> %x, %z
2394 %r = select <4 x i1> %cmp_ac, <4 x i32> %min_ab, <4 x i32> %min_cb
2395 ret <4 x i32> %r
2396}
2397
2398define <4 x i32> @notted_umax_bc_ab_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2399; CHECK-LABEL: notted_umax_bc_ab_eq_swap_pred:
2400; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2401; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2402; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2403; CHECK-NEXT: mvn v2.16b, v2.16b
2404; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2405; CHECK-NEXT: umax v0.4s, v0.4s, v1.4s
2406; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2407; CHECK-NEXT: ret
2408 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2409 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2410 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2411 %cmp_bc = icmp ugt <4 x i32> %b, %c
2412 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2413 %cmp_ab = icmp ugt <4 x i32> %a, %b
2414 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
2415 %cmp_ca = icmp ule <4 x i32> %z, %x
2416 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ab
2417 ret <4 x i32> %r
2418}
2419
2420define <4 x i32> @notted_umax_bc_ba_eq_swap_pred(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
2421; CHECK-LABEL: notted_umax_bc_ba_eq_swap_pred:
2422; CHECK: // %bb.0:
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2423; CHECK-NEXT: mvn v0.16b, v0.16b
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2424; CHECK-NEXT: mvn v1.16b, v1.16b
Sanjay Patele63d8dd2018-01-11 15:13:47 +0000[diff] [blame]2425; CHECK-NEXT: mvn v2.16b, v2.16b
2426; CHECK-NEXT: umax v2.4s, v1.4s, v2.4s
2427; CHECK-NEXT: umax v0.4s, v1.4s, v0.4s
2428; CHECK-NEXT: umax v0.4s, v2.4s, v0.4s
Sanjay Patelf16fe0f2018-01-10 23:31:42 +0000[diff] [blame]2429; CHECK-NEXT: ret
2430 %a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
2431 %b = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>
2432 %c = xor <4 x i32> %z, <i32 -1, i32 -1, i32 -1, i32 -1>
2433 %cmp_bc = icmp ugt <4 x i32> %b, %c
2434 %min_bc = select <4 x i1> %cmp_bc, <4 x i32> %b, <4 x i32> %c
2435 %cmp_ba = icmp ugt <4 x i32> %b, %a
2436 %min_ba = select <4 x i1> %cmp_ba, <4 x i32> %b, <4 x i32> %a
2437 %cmp_ca = icmp ule <4 x i32> %z, %x
2438 %r = select <4 x i1> %cmp_ca, <4 x i32> %min_bc, <4 x i32> %min_ba
2439 ret <4 x i32> %r
2440}
2441