Gitiles
Code Review Sign In
gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / . / llvm / test / CodeGen / ARM / float-helpers.s
blob: 42ab56084d45cdeb966add4f00931e693c5d88dc [file] [log] [blame]
Peter Smith58043642017-07-28 09:21:00 +0000[diff] [blame]1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
Sjoerd Meijerfc448cf2018-11-23 10:08:39 +0000[diff] [blame]2; RUN: llc -asm-verbose=false -mattr=-vfp2 -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-SOFT
3; RUN: llc -asm-verbose=false -mattr=-vfp2 -mtriple=arm-eabi -meabi=gnu < %s | FileCheck %s -check-prefix=CHECK-SOFT
4; RUN: llc -asm-verbose=false -mattr=+vfp3 -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-SOFTFP
5; RUN: llc -asm-verbose=false -mattr=+vfp3 -meabi=gnu -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-SOFTFP
6; RUN: llc -asm-verbose=false -mattr=+vfp3 -float-abi=hard -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-DP
7; RUN: llc -asm-verbose=false -mattr=+vfp3 -float-abi=hard -meabi=gnu -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-DP
8; RUN: llc -asm-verbose=false -mattr=+vfp3,+fp-only-sp -float-abi=hard -mtriple=arm-eabi < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-SPONLY
9; RUN: llc -asm-verbose=false -mattr=+vfp3,+fp-only-sp -float-abi=hard -mtriple=arm-eabi -meabi=gnu < %s | FileCheck %s -check-prefix=CHECK-HARDFP-SP -check-prefix=CHECK-HARDFP-SPONLY
Peter Smith58043642017-07-28 09:21:00 +0000[diff] [blame]10
11; The Runtime ABI for the ARM Architecture IHI0043 section 4.1.2 The
12; floating-point helper functions to always use the base AAPCS (soft-float)
13; calling convention.
14
15; In this test we cover the following configurations:
16; CHECK-SOFT -mfloat-abi=soft
17; * expect no use of floating point instructions
18; * expect to use __aeabi_ helper function in each function
19; CHECK-SOFTFP -mfloat-abi=softfp
20; * all functions use base AAPCS
21; * floating point instructions permitted, so __aeabi_ helpers only
22; expected when there is no available instruction.
Gabor Buellada4a9662018-07-04 13:28:39 +0000[diff] [blame]23; CHECK-HARDFP-SP -mfloat-abi=hardfp (single precision instructions)
Peter Smith58043642017-07-28 09:21:00 +0000[diff] [blame]24; * all non Runtime ABI helper functions use AAPCS VFP
25; * floating point instructions permitted, so __aeabi_ helpers only
26; expected when there is no available instruction.
Gabor Buellada4a9662018-07-04 13:28:39 +0000[diff] [blame]27; CHECK-HARDFP-DP -mfloat-abi=hardfp (double precision instructions)
28; CHECK-HARDFP-SPONLY -mfloat-abi=hardfp (double precision but single
Peter Smith58043642017-07-28 09:21:00 +0000[diff] [blame]29; precision only FPU)
Gabor Buellada4a9662018-07-04 13:28:39 +0000[diff] [blame]30; * as CHECK-HARDFP-SP, but we split up the double precision helper
Peter Smith58043642017-07-28 09:21:00 +0000[diff] [blame]31; functions so we can test a single precision only FPU, which has to use
32; helper function for all double precision operations.
33
34; In all cases we must use base AAPCS when calling a helper function from
35; section 4.1.2.
36
37target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
38target triple = "arm-eabi"
39
40define float @fadd(float %a, float %b) #0 {
41; CHECK-SOFT-LABEL: fadd:
42; CHECK-SOFT: .save {r11, lr}
43; CHECK-SOFT-NEXT: push {r11, lr}
44; CHECK-SOFT-NEXT: bl __aeabi_fadd
45; CHECK-SOFT-NEXT: pop {r11, lr}
46; CHECK-SOFT-NEXT: mov pc, lr
47;
48; CHECK-SOFTFP-LABEL: fadd:
49; CHECK-SOFTFP: vmov s0, r1
50; CHECK-SOFTFP-NEXT: vmov s2, r0
51; CHECK-SOFTFP-NEXT: vadd.f32 s0, s2, s0
52; CHECK-SOFTFP-NEXT: vmov r0, s0
53; CHECK-SOFTFP-NEXT: mov pc, lr
54;
55; CHECK-HARDFP-SP-LABEL: fadd:
56; CHECK-HARDFP-SP: vadd.f32 s0, s0, s1
57; CHECK-HARDFP-SP-NEXT: mov pc, lr
58entry:
59 %add = fadd float %a, %b
60 ret float %add
61}
62
63define float @fdiv(float %a, float %b) #0 {
64; CHECK-SOFT-LABEL: fdiv:
65; CHECK-SOFT: .save {r11, lr}
66; CHECK-SOFT-NEXT: push {r11, lr}
67; CHECK-SOFT-NEXT: bl __aeabi_fdiv
68; CHECK-SOFT-NEXT: pop {r11, lr}
69; CHECK-SOFT-NEXT: mov pc, lr
70;
71; CHECK-SOFTFP-LABEL: fdiv:
72; CHECK-SOFTFP: vmov s0, r1
73; CHECK-SOFTFP-NEXT: vmov s2, r0
74; CHECK-SOFTFP-NEXT: vdiv.f32 s0, s2, s0
75; CHECK-SOFTFP-NEXT: vmov r0, s0
76; CHECK-SOFTFP-NEXT: mov pc, lr
77;
78; CHECK-HARDFP-SP-LABEL: fdiv:
79; CHECK-HARDFP-SP: vdiv.f32 s0, s0, s1
80; CHECK-HARDFP-SP-NEXT: mov pc, lr
81entry:
82 %div = fdiv float %a, %b
83 ret float %div
84}
85
86define float @fmul(float %a, float %b) #0 {
87; CHECK-SOFT-LABEL: fmul:
88; CHECK-SOFT: .save {r11, lr}
89; CHECK-SOFT-NEXT: push {r11, lr}
90; CHECK-SOFT-NEXT: bl __aeabi_fmul
91; CHECK-SOFT-NEXT: pop {r11, lr}
92; CHECK-SOFT-NEXT: mov pc, lr
93;
94; CHECK-SOFTFP-LABEL: fmul:
95; CHECK-SOFTFP: vmov s0, r1
96; CHECK-SOFTFP-NEXT: vmov s2, r0
97; CHECK-SOFTFP-NEXT: vmul.f32 s0, s2, s0
98; CHECK-SOFTFP-NEXT: vmov r0, s0
99; CHECK-SOFTFP-NEXT: mov pc, lr
100;
101; CHECK-HARDFP-SP-LABEL: fmul:
102; CHECK-HARDFP-SP: vmul.f32 s0, s0, s1
103; CHECK-HARDFP-SP-NEXT: mov pc, lr
104entry:
105 %mul = fmul float %a, %b
106 ret float %mul
107}
108
109define float @fsub(float %a, float %b) #0 {
110; CHECK-SOFT-LABEL: fsub:
111; CHECK-SOFT: .save {r11, lr}
112; CHECK-SOFT-NEXT: push {r11, lr}
113; CHECK-SOFT-NEXT: bl __aeabi_fsub
114; CHECK-SOFT-NEXT: pop {r11, lr}
115; CHECK-SOFT-NEXT: mov pc, lr
116;
117; CHECK-SOFTFP-LABEL: fsub:
118; CHECK-SOFTFP: vmov s0, r1
119; CHECK-SOFTFP-NEXT: vmov s2, r0
120; CHECK-SOFTFP-NEXT: vsub.f32 s0, s2, s0
121; CHECK-SOFTFP-NEXT: vmov r0, s0
122; CHECK-SOFTFP-NEXT: mov pc, lr
123;
124; CHECK-HARDFP-SP-LABEL: fsub:
125; CHECK-HARDFP-SP: vsub.f32 s0, s0, s1
126; CHECK-HARDFP-SP-NEXT: mov pc, lr
127entry:
128 %sub = fsub float %a, %b
129 ret float %sub
130}
131
132define i32 @fcmpeq(float %a, float %b) #0 {
133; CHECK-SOFT-LABEL: fcmpeq:
134; CHECK-SOFT: .save {r11, lr}
135; CHECK-SOFT-NEXT: push {r11, lr}
136; CHECK-SOFT-NEXT: bl __aeabi_fcmpeq
137; CHECK-SOFT-NEXT: cmp r0, #0
138; CHECK-SOFT-NEXT: movne r0, #1
139; CHECK-SOFT-NEXT: pop {r11, lr}
140; CHECK-SOFT-NEXT: mov pc, lr
141;
142; CHECK-SOFTFP-LABEL: fcmpeq:
143; CHECK-SOFTFP: vmov s2, r0
144; CHECK-SOFTFP-NEXT: mov r0, #0
145; CHECK-SOFTFP-NEXT: vmov s0, r1
146; CHECK-SOFTFP-NEXT: vcmp.f32 s2, s0
147; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
148; CHECK-SOFTFP-NEXT: moveq r0, #1
149; CHECK-SOFTFP-NEXT: mov pc, lr
150;
151; CHECK-HARDFP-SP-LABEL: fcmpeq:
152; CHECK-HARDFP-SP: vcmp.f32 s0, s1
153; CHECK-HARDFP-SP-NEXT: mov r0, #0
154; CHECK-HARDFP-SP-NEXT: vmrs APSR_nzcv, fpscr
155; CHECK-HARDFP-SP-NEXT: moveq r0, #1
156; CHECK-HARDFP-SP-NEXT: mov pc, lr
157entry:
158 %cmp = fcmp oeq float %a, %b
159 %conv = zext i1 %cmp to i32
160 ret i32 %conv
161}
162
163define i32 @fcmplt(float %a, float %b) #0 {
164; CHECK-SOFT-LABEL: fcmplt:
165; CHECK-SOFT: .save {r11, lr}
166; CHECK-SOFT-NEXT: push {r11, lr}
167; CHECK-SOFT-NEXT: bl __aeabi_fcmplt
168; CHECK-SOFT-NEXT: cmp r0, #0
169; CHECK-SOFT-NEXT: movne r0, #1
170; CHECK-SOFT-NEXT: pop {r11, lr}
171; CHECK-SOFT-NEXT: mov pc, lr
172;
173; CHECK-SOFTFP-LABEL: fcmplt:
174; CHECK-SOFTFP: vmov s2, r0
175; CHECK-SOFTFP-NEXT: mov r0, #0
176; CHECK-SOFTFP-NEXT: vmov s0, r1
177; CHECK-SOFTFP-NEXT: vcmpe.f32 s2, s0
178; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
179; CHECK-SOFTFP-NEXT: movmi r0, #1
180; CHECK-SOFTFP-NEXT: mov pc, lr
181;
182; CHECK-HARDFP-SP-LABEL: fcmplt:
183; CHECK-HARDFP-SP: vcmpe.f32 s0, s1
184; CHECK-HARDFP-SP-NEXT: mov r0, #0
185; CHECK-HARDFP-SP-NEXT: vmrs APSR_nzcv, fpscr
186; CHECK-HARDFP-SP-NEXT: movmi r0, #1
187; CHECK-HARDFP-SP-NEXT: mov pc, lr
188entry:
189 %cmp = fcmp olt float %a, %b
190 %conv = zext i1 %cmp to i32
191 ret i32 %conv
192}
193
194define i32 @fcmple(float %a, float %b) #0 {
195; CHECK-SOFT-LABEL: fcmple:
196; CHECK-SOFT: .save {r11, lr}
197; CHECK-SOFT-NEXT: push {r11, lr}
198; CHECK-SOFT-NEXT: bl __aeabi_fcmple
199; CHECK-SOFT-NEXT: cmp r0, #0
200; CHECK-SOFT-NEXT: movne r0, #1
201; CHECK-SOFT-NEXT: pop {r11, lr}
202; CHECK-SOFT-NEXT: mov pc, lr
203;
204; CHECK-SOFTFP-LABEL: fcmple:
205; CHECK-SOFTFP: vmov s2, r0
206; CHECK-SOFTFP-NEXT: mov r0, #0
207; CHECK-SOFTFP-NEXT: vmov s0, r1
208; CHECK-SOFTFP-NEXT: vcmpe.f32 s2, s0
209; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
210; CHECK-SOFTFP-NEXT: movls r0, #1
211; CHECK-SOFTFP-NEXT: mov pc, lr
212;
213; CHECK-HARDFP-SP-LABEL: fcmple:
214; CHECK-HARDFP-SP: vcmpe.f32 s0, s1
215; CHECK-HARDFP-SP-NEXT: mov r0, #0
216; CHECK-HARDFP-SP-NEXT: vmrs APSR_nzcv, fpscr
217; CHECK-HARDFP-SP-NEXT: movls r0, #1
218; CHECK-HARDFP-SP-NEXT: mov pc, lr
219entry:
220 %cmp = fcmp ole float %a, %b
221 %conv = zext i1 %cmp to i32
222 ret i32 %conv
223}
224
225define i32 @fcmpge(float %a, float %b) #0 {
226; CHECK-SOFT-LABEL: fcmpge:
227; CHECK-SOFT: .save {r11, lr}
228; CHECK-SOFT-NEXT: push {r11, lr}
229; CHECK-SOFT-NEXT: bl __aeabi_fcmpge
230; CHECK-SOFT-NEXT: cmp r0, #0
231; CHECK-SOFT-NEXT: movne r0, #1
232; CHECK-SOFT-NEXT: pop {r11, lr}
233; CHECK-SOFT-NEXT: mov pc, lr
234;
235; CHECK-SOFTFP-LABEL: fcmpge:
236; CHECK-SOFTFP: vmov s2, r0
237; CHECK-SOFTFP-NEXT: mov r0, #0
238; CHECK-SOFTFP-NEXT: vmov s0, r1
239; CHECK-SOFTFP-NEXT: vcmpe.f32 s2, s0
240; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
241; CHECK-SOFTFP-NEXT: movge r0, #1
242; CHECK-SOFTFP-NEXT: mov pc, lr
243;
244; CHECK-HARDFP-SP-LABEL: fcmpge:
245; CHECK-HARDFP-SP: vcmpe.f32 s0, s1
246; CHECK-HARDFP-SP-NEXT: mov r0, #0
247; CHECK-HARDFP-SP-NEXT: vmrs APSR_nzcv, fpscr
248; CHECK-HARDFP-SP-NEXT: movge r0, #1
249; CHECK-HARDFP-SP-NEXT: mov pc, lr
250entry:
251 %cmp = fcmp oge float %a, %b
252 %conv = zext i1 %cmp to i32
253 ret i32 %conv
254}
255
256define i32 @fcmpgt(float %a, float %b) #0 {
257; CHECK-SOFT-LABEL: fcmpgt:
258; CHECK-SOFT: .save {r11, lr}
259; CHECK-SOFT-NEXT: push {r11, lr}
260; CHECK-SOFT-NEXT: bl __aeabi_fcmpgt
261; CHECK-SOFT-NEXT: cmp r0, #0
262; CHECK-SOFT-NEXT: movne r0, #1
263; CHECK-SOFT-NEXT: pop {r11, lr}
264; CHECK-SOFT-NEXT: mov pc, lr
265;
266; CHECK-SOFTFP-LABEL: fcmpgt:
267; CHECK-SOFTFP: vmov s2, r0
268; CHECK-SOFTFP-NEXT: mov r0, #0
269; CHECK-SOFTFP-NEXT: vmov s0, r1
270; CHECK-SOFTFP-NEXT: vcmpe.f32 s2, s0
271; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
272; CHECK-SOFTFP-NEXT: movgt r0, #1
273; CHECK-SOFTFP-NEXT: mov pc, lr
274;
275; CHECK-HARDFP-SP-LABEL: fcmpgt:
276; CHECK-HARDFP-SP: vcmpe.f32 s0, s1
277; CHECK-HARDFP-SP-NEXT: mov r0, #0
278; CHECK-HARDFP-SP-NEXT: vmrs APSR_nzcv, fpscr
279; CHECK-HARDFP-SP-NEXT: movgt r0, #1
280; CHECK-HARDFP-SP-NEXT: mov pc, lr
281entry:
282 %cmp = fcmp ogt float %a, %b
283 %conv = zext i1 %cmp to i32
284 ret i32 %conv
285}
286
287define i32 @fcmpun(float %a, float %b) #0 {
288; CHECK-SOFT-LABEL: fcmpun:
289; CHECK-SOFT: .save {r11, lr}
290; CHECK-SOFT-NEXT: push {r11, lr}
291; CHECK-SOFT-NEXT: bl __aeabi_fcmpun
292; CHECK-SOFT-NEXT: cmp r0, #0
293; CHECK-SOFT-NEXT: movne r0, #1
294; CHECK-SOFT-NEXT: pop {r11, lr}
295; CHECK-SOFT-NEXT: mov pc, lr
296;
297; CHECK-SOFTFP-LABEL: fcmpun:
298; CHECK-SOFTFP: vmov s2, r0
299; CHECK-SOFTFP-NEXT: mov r0, #0
300; CHECK-SOFTFP-NEXT: vmov s0, r1
301; CHECK-SOFTFP-NEXT: vcmpe.f32 s2, s0
302; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
303; CHECK-SOFTFP-NEXT: movvs r0, #1
304; CHECK-SOFTFP-NEXT: mov pc, lr
305;
306; CHECK-HARDFP-SP-LABEL: fcmpun:
307; CHECK-HARDFP-SP: vcmpe.f32 s0, s1
308; CHECK-HARDFP-SP-NEXT: mov r0, #0
309; CHECK-HARDFP-SP-NEXT: vmrs APSR_nzcv, fpscr
310; CHECK-HARDFP-SP-NEXT: movvs r0, #1
311; CHECK-HARDFP-SP-NEXT: mov pc, lr
312entry:
313 %cmp = fcmp uno float %a, %b
314 %0 = zext i1 %cmp to i32
315 ret i32 %0
316}
317
318define double @dadd(double %a, double %b) #0 {
319; CHECK-SOFT-LABEL: dadd:
320; CHECK-SOFT: .save {r11, lr}
321; CHECK-SOFT-NEXT: push {r11, lr}
322; CHECK-SOFT-NEXT: bl __aeabi_dadd
323; CHECK-SOFT-NEXT: pop {r11, lr}
324; CHECK-SOFT-NEXT: mov pc, lr
325;
326; CHECK-SOFTFP-LABEL: dadd:
327; CHECK-SOFTFP: vmov d16, r2, r3
328; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
329; CHECK-SOFTFP-NEXT: vadd.f64 d16, d17, d16
330; CHECK-SOFTFP-NEXT: vmov r0, r1, d16
331; CHECK-SOFTFP-NEXT: mov pc, lr
332;
333; CHECK-HARDFP-DP-LABEL: dadd:
334; CHECK-HARDFP-DP: vadd.f64 d0, d0, d1
335; CHECK-HARDFP-DP-NEXT: mov pc, lr
336;
337; CHECK-HARDFP-SPONLY-LABEL: dadd:
338; CHECK-HARDFP-SPONLY: .save {r11, lr}
339; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
340; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
341; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
342; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dadd
343; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1
344; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
345; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
346entry:
347 %add = fadd double %a, %b
348 ret double %add
349}
350
351define double @ddiv(double %a, double %b) #0 {
352; CHECK-SOFT-LABEL: ddiv:
353; CHECK-SOFT: .save {r11, lr}
354; CHECK-SOFT-NEXT: push {r11, lr}
355; CHECK-SOFT-NEXT: bl __aeabi_ddiv
356; CHECK-SOFT-NEXT: pop {r11, lr}
357; CHECK-SOFT-NEXT: mov pc, lr
358;
359; CHECK-SOFTFP-LABEL: ddiv:
360; CHECK-SOFTFP: vmov d16, r2, r3
361; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
362; CHECK-SOFTFP-NEXT: vdiv.f64 d16, d17, d16
363; CHECK-SOFTFP-NEXT: vmov r0, r1, d16
364; CHECK-SOFTFP-NEXT: mov pc, lr
365;
366; CHECK-HARDFP-DP-LABEL: ddiv:
367; CHECK-HARDFP-DP: vdiv.f64 d0, d0, d1
368; CHECK-HARDFP-DP-NEXT: mov pc, lr
369;
370; CHECK-HARDFP-SPONLY-LABEL: ddiv:
371; CHECK-HARDFP-SPONLY: .save {r11, lr}
372; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
373; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
374; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
375; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_ddiv
376; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1
377; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
378; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
379entry:
380 %div = fdiv double %a, %b
381 ret double %div
382}
383
384define double @dmul(double %a, double %b) #0 {
385; CHECK-SOFT-LABEL: dmul:
386; CHECK-SOFT: .save {r11, lr}
387; CHECK-SOFT-NEXT: push {r11, lr}
388; CHECK-SOFT-NEXT: bl __aeabi_dmul
389; CHECK-SOFT-NEXT: pop {r11, lr}
390; CHECK-SOFT-NEXT: mov pc, lr
391;
392; CHECK-SOFTFP-LABEL: dmul:
393; CHECK-SOFTFP: vmov d16, r2, r3
394; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
395; CHECK-SOFTFP-NEXT: vmul.f64 d16, d17, d16
396; CHECK-SOFTFP-NEXT: vmov r0, r1, d16
397; CHECK-SOFTFP-NEXT: mov pc, lr
398;
399; CHECK-HARDFP-DP-LABEL: dmul:
400; CHECK-HARDFP-DP: vmul.f64 d0, d0, d1
401; CHECK-HARDFP-DP-NEXT: mov pc, lr
402;
403; CHECK-HARDFP-SPONLY-LABEL: dmul:
404; CHECK-HARDFP-SPONLY: .save {r11, lr}
405; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
406; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
407; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
408; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dmul
409; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1
410; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
411; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
412entry:
413 %mul = fmul double %a, %b
414 ret double %mul
415}
416
417define double @dsub(double %a, double %b) #0 {
418; CHECK-SOFT-LABEL: dsub:
419; CHECK-SOFT: .save {r11, lr}
420; CHECK-SOFT-NEXT: push {r11, lr}
421; CHECK-SOFT-NEXT: bl __aeabi_dsub
422; CHECK-SOFT-NEXT: pop {r11, lr}
423; CHECK-SOFT-NEXT: mov pc, lr
424;
425; CHECK-SOFTFP-LABEL: dsub:
426; CHECK-SOFTFP: vmov d16, r2, r3
427; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
428; CHECK-SOFTFP-NEXT: vsub.f64 d16, d17, d16
429; CHECK-SOFTFP-NEXT: vmov r0, r1, d16
430; CHECK-SOFTFP-NEXT: mov pc, lr
431;
432; CHECK-HARDFP-DP-LABEL: dsub:
433; CHECK-HARDFP-DP: vsub.f64 d0, d0, d1
434; CHECK-HARDFP-DP-NEXT: mov pc, lr
435;
436; CHECK-HARDFP-SPONLY-LABEL: dsub:
437; CHECK-HARDFP-SPONLY: .save {r11, lr}
438; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
439; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
440; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
441; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dsub
442; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1
443; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
444; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
445entry:
446 %sub = fsub double %a, %b
447 ret double %sub
448}
449
450define i32 @dcmpeq(double %a, double %b) #0 {
451; CHECK-SOFT-LABEL: dcmpeq:
452; CHECK-SOFT: .save {r11, lr}
453; CHECK-SOFT-NEXT: push {r11, lr}
454; CHECK-SOFT-NEXT: bl __aeabi_dcmpeq
455; CHECK-SOFT-NEXT: cmp r0, #0
456; CHECK-SOFT-NEXT: movne r0, #1
457; CHECK-SOFT-NEXT: pop {r11, lr}
458; CHECK-SOFT-NEXT: mov pc, lr
459;
460; CHECK-SOFTFP-LABEL: dcmpeq:
461; CHECK-SOFTFP: vmov d16, r2, r3
462; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
463; CHECK-SOFTFP-NEXT: mov r0, #0
464; CHECK-SOFTFP-NEXT: vcmp.f64 d17, d16
465; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
466; CHECK-SOFTFP-NEXT: moveq r0, #1
467; CHECK-SOFTFP-NEXT: mov pc, lr
468;
469; CHECK-HARDFP-DP-LABEL: dcmpeq:
470; CHECK-HARDFP-DP: vcmp.f64 d0, d1
471; CHECK-HARDFP-DP-NEXT: mov r0, #0
472; CHECK-HARDFP-DP-NEXT: vmrs APSR_nzcv, fpscr
473; CHECK-HARDFP-DP-NEXT: moveq r0, #1
474; CHECK-HARDFP-DP-NEXT: mov pc, lr
475;
476; CHECK-HARDFP-SPONLY-LABEL: dcmpeq:
477; CHECK-HARDFP-SPONLY: .save {r11, lr}
478; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
479; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
480; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
481; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dcmpeq
482; CHECK-HARDFP-SPONLY-NEXT: cmp r0, #0
483; CHECK-HARDFP-SPONLY-NEXT: movne r0, #1
484; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
485; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
486entry:
487 %cmp = fcmp oeq double %a, %b
488 %conv = zext i1 %cmp to i32
489 ret i32 %conv
490}
491
492define i32 @dcmplt(double %a, double %b) #0 {
493; CHECK-SOFT-LABEL: dcmplt:
494; CHECK-SOFT: .save {r11, lr}
495; CHECK-SOFT-NEXT: push {r11, lr}
496; CHECK-SOFT-NEXT: bl __aeabi_dcmplt
497; CHECK-SOFT-NEXT: cmp r0, #0
498; CHECK-SOFT-NEXT: movne r0, #1
499; CHECK-SOFT-NEXT: pop {r11, lr}
500; CHECK-SOFT-NEXT: mov pc, lr
501;
502; CHECK-SOFTFP-LABEL: dcmplt:
503; CHECK-SOFTFP: vmov d16, r2, r3
504; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
505; CHECK-SOFTFP-NEXT: mov r0, #0
506; CHECK-SOFTFP-NEXT: vcmpe.f64 d17, d16
507; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
508; CHECK-SOFTFP-NEXT: movmi r0, #1
509; CHECK-SOFTFP-NEXT: mov pc, lr
510;
511; CHECK-HARDFP-DP-LABEL: dcmplt:
512; CHECK-HARDFP-DP: vcmpe.f64 d0, d1
513; CHECK-HARDFP-DP-NEXT: mov r0, #0
514; CHECK-HARDFP-DP-NEXT: vmrs APSR_nzcv, fpscr
515; CHECK-HARDFP-DP-NEXT: movmi r0, #1
516; CHECK-HARDFP-DP-NEXT: mov pc, lr
517;
518; CHECK-HARDFP-SPONLY-LABEL: dcmplt:
519; CHECK-HARDFP-SPONLY: .save {r11, lr}
520; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
521; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
522; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
523; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dcmplt
524; CHECK-HARDFP-SPONLY-NEXT: cmp r0, #0
525; CHECK-HARDFP-SPONLY-NEXT: movne r0, #1
526; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
527; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
528entry:
529 %cmp = fcmp olt double %a, %b
530 %conv = zext i1 %cmp to i32
531 ret i32 %conv
532}
533
534define i32 @dcmple(double %a, double %b) #0 {
535; CHECK-SOFT-LABEL: dcmple:
536; CHECK-SOFT: .save {r11, lr}
537; CHECK-SOFT-NEXT: push {r11, lr}
538; CHECK-SOFT-NEXT: bl __aeabi_dcmple
539; CHECK-SOFT-NEXT: cmp r0, #0
540; CHECK-SOFT-NEXT: movne r0, #1
541; CHECK-SOFT-NEXT: pop {r11, lr}
542; CHECK-SOFT-NEXT: mov pc, lr
543;
544; CHECK-SOFTFP-LABEL: dcmple:
545; CHECK-SOFTFP: vmov d16, r2, r3
546; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
547; CHECK-SOFTFP-NEXT: mov r0, #0
548; CHECK-SOFTFP-NEXT: vcmpe.f64 d17, d16
549; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
550; CHECK-SOFTFP-NEXT: movls r0, #1
551; CHECK-SOFTFP-NEXT: mov pc, lr
552;
553; CHECK-HARDFP-DP-LABEL: dcmple:
554; CHECK-HARDFP-DP: vcmpe.f64 d0, d1
555; CHECK-HARDFP-DP-NEXT: mov r0, #0
556; CHECK-HARDFP-DP-NEXT: vmrs APSR_nzcv, fpscr
557; CHECK-HARDFP-DP-NEXT: movls r0, #1
558; CHECK-HARDFP-DP-NEXT: mov pc, lr
559;
560; CHECK-HARDFP-SPONLY-LABEL: dcmple:
561; CHECK-HARDFP-SPONLY: .save {r11, lr}
562; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
563; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
564; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
565; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dcmple
566; CHECK-HARDFP-SPONLY-NEXT: cmp r0, #0
567; CHECK-HARDFP-SPONLY-NEXT: movne r0, #1
568; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
569; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
570entry:
571 %cmp = fcmp ole double %a, %b
572 %conv = zext i1 %cmp to i32
573 ret i32 %conv
574}
575
576define i32 @dcmpge(double %a, double %b) #0 {
577; CHECK-SOFT-LABEL: dcmpge:
578; CHECK-SOFT: .save {r11, lr}
579; CHECK-SOFT-NEXT: push {r11, lr}
580; CHECK-SOFT-NEXT: bl __aeabi_dcmpge
581; CHECK-SOFT-NEXT: cmp r0, #0
582; CHECK-SOFT-NEXT: movne r0, #1
583; CHECK-SOFT-NEXT: pop {r11, lr}
584; CHECK-SOFT-NEXT: mov pc, lr
585;
586; CHECK-SOFTFP-LABEL: dcmpge:
587; CHECK-SOFTFP: vmov d16, r2, r3
588; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
589; CHECK-SOFTFP-NEXT: mov r0, #0
590; CHECK-SOFTFP-NEXT: vcmpe.f64 d17, d16
591; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
592; CHECK-SOFTFP-NEXT: movge r0, #1
593; CHECK-SOFTFP-NEXT: mov pc, lr
594;
595; CHECK-HARDFP-DP-LABEL: dcmpge:
596; CHECK-HARDFP-DP: vcmpe.f64 d0, d1
597; CHECK-HARDFP-DP-NEXT: mov r0, #0
598; CHECK-HARDFP-DP-NEXT: vmrs APSR_nzcv, fpscr
599; CHECK-HARDFP-DP-NEXT: movge r0, #1
600; CHECK-HARDFP-DP-NEXT: mov pc, lr
601;
602; CHECK-HARDFP-SPONLY-LABEL: dcmpge:
603; CHECK-HARDFP-SPONLY: .save {r11, lr}
604; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
605; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
606; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
607; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dcmpge
608; CHECK-HARDFP-SPONLY-NEXT: cmp r0, #0
609; CHECK-HARDFP-SPONLY-NEXT: movne r0, #1
610; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
611; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
612entry:
613 %cmp = fcmp oge double %a, %b
614 %conv = zext i1 %cmp to i32
615 ret i32 %conv
616}
617
618define i32 @dcmpgt(double %a, double %b) #0 {
619; CHECK-SOFT-LABEL: dcmpgt:
620; CHECK-SOFT: .save {r11, lr}
621; CHECK-SOFT-NEXT: push {r11, lr}
622; CHECK-SOFT-NEXT: bl __aeabi_dcmpgt
623; CHECK-SOFT-NEXT: cmp r0, #0
624; CHECK-SOFT-NEXT: movne r0, #1
625; CHECK-SOFT-NEXT: pop {r11, lr}
626; CHECK-SOFT-NEXT: mov pc, lr
627;
628; CHECK-SOFTFP-LABEL: dcmpgt:
629; CHECK-SOFTFP: vmov d16, r2, r3
630; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
631; CHECK-SOFTFP-NEXT: mov r0, #0
632; CHECK-SOFTFP-NEXT: vcmpe.f64 d17, d16
633; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
634; CHECK-SOFTFP-NEXT: movgt r0, #1
635; CHECK-SOFTFP-NEXT: mov pc, lr
636;
637; CHECK-HARDFP-DP-LABEL: dcmpgt:
638; CHECK-HARDFP-DP: vcmpe.f64 d0, d1
639; CHECK-HARDFP-DP-NEXT: mov r0, #0
640; CHECK-HARDFP-DP-NEXT: vmrs APSR_nzcv, fpscr
641; CHECK-HARDFP-DP-NEXT: movgt r0, #1
642; CHECK-HARDFP-DP-NEXT: mov pc, lr
643;
644; CHECK-HARDFP-SPONLY-LABEL: dcmpgt:
645; CHECK-HARDFP-SPONLY: .save {r11, lr}
646; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
647; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
648; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
649; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dcmpgt
650; CHECK-HARDFP-SPONLY-NEXT: cmp r0, #0
651; CHECK-HARDFP-SPONLY-NEXT: movne r0, #1
652; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
653; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
654entry:
655 %cmp = fcmp ogt double %a, %b
656 %conv = zext i1 %cmp to i32
657 ret i32 %conv
658}
659
660define i32 @dcmpun(double %a, double %b) #0 {
661; CHECK-SOFT-LABEL: dcmpun:
662; CHECK-SOFT: .save {r11, lr}
663; CHECK-SOFT-NEXT: push {r11, lr}
664; CHECK-SOFT-NEXT: bl __aeabi_dcmpun
665; CHECK-SOFT-NEXT: cmp r0, #0
666; CHECK-SOFT-NEXT: movne r0, #1
667; CHECK-SOFT-NEXT: pop {r11, lr}
668; CHECK-SOFT-NEXT: mov pc, lr
669;
670; CHECK-SOFTFP-LABEL: dcmpun:
671; CHECK-SOFTFP: vmov d16, r2, r3
672; CHECK-SOFTFP-NEXT: vmov d17, r0, r1
673; CHECK-SOFTFP-NEXT: mov r0, #0
674; CHECK-SOFTFP-NEXT: vcmpe.f64 d17, d16
675; CHECK-SOFTFP-NEXT: vmrs APSR_nzcv, fpscr
676; CHECK-SOFTFP-NEXT: movvs r0, #1
677; CHECK-SOFTFP-NEXT: mov pc, lr
678;
679; CHECK-HARDFP-DP-LABEL: dcmpun:
680; CHECK-HARDFP-DP: vcmpe.f64 d0, d1
681; CHECK-HARDFP-DP-NEXT: mov r0, #0
682; CHECK-HARDFP-DP-NEXT: vmrs APSR_nzcv, fpscr
683; CHECK-HARDFP-DP-NEXT: movvs r0, #1
684; CHECK-HARDFP-DP-NEXT: mov pc, lr
685;
686; CHECK-HARDFP-SPONLY-LABEL: dcmpun:
687; CHECK-HARDFP-SPONLY: .save {r11, lr}
688; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
689; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
690; CHECK-HARDFP-SPONLY-NEXT: vmov r2, r3, d1
691; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_dcmpun
692; CHECK-HARDFP-SPONLY-NEXT: cmp r0, #0
693; CHECK-HARDFP-SPONLY-NEXT: movne r0, #1
694; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
695; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
696entry:
697 %cmp = fcmp uno double %a, %b
698 %0 = zext i1 %cmp to i32
699 ret i32 %0
700}
701
702define i32 @d2iz(double %a) #0 {
703; CHECK-SOFT-LABEL: d2iz:
704; CHECK-SOFT: .save {r11, lr}
705; CHECK-SOFT-NEXT: push {r11, lr}
706; CHECK-SOFT-NEXT: bl __aeabi_d2iz
707; CHECK-SOFT-NEXT: pop {r11, lr}
708; CHECK-SOFT-NEXT: mov pc, lr
709;
710; CHECK-SOFTFP-LABEL: d2iz:
711; CHECK-SOFTFP: vmov d16, r0, r1
712; CHECK-SOFTFP-NEXT: vcvt.s32.f64 s0, d16
713; CHECK-SOFTFP-NEXT: vmov r0, s0
714; CHECK-SOFTFP-NEXT: mov pc, lr
715;
716; CHECK-HARDFP-DP-LABEL: d2iz:
717; CHECK-HARDFP-DP: vcvt.s32.f64 s0, d0
718; CHECK-HARDFP-DP-NEXT: vmov r0, s0
719; CHECK-HARDFP-DP-NEXT: mov pc, lr
720;
721; CHECK-HARDFP-SPONLY-LABEL: d2iz:
722; CHECK-HARDFP-SPONLY: .save {r11, lr}
723; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
724; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
725; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_d2iz
726; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
727; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
728entry:
729 %conv = fptosi double %a to i32
730 ret i32 %conv
731}
732
733define i32 @d2uiz(double %a) #0 {
734; CHECK-SOFT-LABEL: d2uiz:
735; CHECK-SOFT: .save {r11, lr}
736; CHECK-SOFT-NEXT: push {r11, lr}
737; CHECK-SOFT-NEXT: bl __aeabi_d2uiz
738; CHECK-SOFT-NEXT: pop {r11, lr}
739; CHECK-SOFT-NEXT: mov pc, lr
740;
741; CHECK-SOFTFP-LABEL: d2uiz:
742; CHECK-SOFTFP: vmov d16, r0, r1
743; CHECK-SOFTFP-NEXT: vcvt.u32.f64 s0, d16
744; CHECK-SOFTFP-NEXT: vmov r0, s0
745; CHECK-SOFTFP-NEXT: mov pc, lr
746;
747; CHECK-HARDFP-DP-LABEL: d2uiz:
748; CHECK-HARDFP-DP: vcvt.u32.f64 s0, d0
749; CHECK-HARDFP-DP-NEXT: vmov r0, s0
750; CHECK-HARDFP-DP-NEXT: mov pc, lr
751;
752; CHECK-HARDFP-SPONLY-LABEL: d2uiz:
753; CHECK-HARDFP-SPONLY: .save {r11, lr}
754; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
755; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
756; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_d2uiz
757; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
758; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
759entry:
760 %conv = fptoui double %a to i32
761 ret i32 %conv
762}
763
764define i64 @d2lz(double %a) #0 {
765; CHECK-SOFT-LABEL: d2lz:
766; CHECK-SOFT: .save {r11, lr}
767; CHECK-SOFT-NEXT: push {r11, lr}
768; CHECK-SOFT-NEXT: bl __aeabi_d2lz
769; CHECK-SOFT-NEXT: pop {r11, lr}
770; CHECK-SOFT-NEXT: mov pc, lr
771;
772; CHECK-SOFTFP-LABEL: d2lz:
773; CHECK-SOFTFP: .save {r11, lr}
774; CHECK-SOFTFP-NEXT: push {r11, lr}
775; CHECK-SOFTFP-NEXT: bl __aeabi_d2lz
776; CHECK-SOFTFP-NEXT: pop {r11, lr}
777; CHECK-SOFTFP-NEXT: mov pc, lr
778;
779; CHECK-HARDFP-SP-LABEL: d2lz:
780; CHECK-HARDFP-SP: .save {r11, lr}
781; CHECK-HARDFP-SP-NEXT: push {r11, lr}
782; CHECK-HARDFP-SP-NEXT: vmov r0, r1, d0
783; CHECK-HARDFP-SP-NEXT: bl __aeabi_d2lz
784; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
785; CHECK-HARDFP-SP-NEXT: mov pc, lr
786entry:
787 %conv = fptosi double %a to i64
788 ret i64 %conv
789}
790
791define i64 @d2ulz(double %a) #0 {
792; CHECK-SOFT-LABEL: d2ulz:
793; CHECK-SOFT: .save {r11, lr}
794; CHECK-SOFT-NEXT: push {r11, lr}
795; CHECK-SOFT-NEXT: bl __aeabi_d2ulz
796; CHECK-SOFT-NEXT: pop {r11, lr}
797; CHECK-SOFT-NEXT: mov pc, lr
798;
799; CHECK-SOFTFP-LABEL: d2ulz:
800; CHECK-SOFTFP: .save {r11, lr}
801; CHECK-SOFTFP-NEXT: push {r11, lr}
802; CHECK-SOFTFP-NEXT: bl __aeabi_d2ulz
803; CHECK-SOFTFP-NEXT: pop {r11, lr}
804; CHECK-SOFTFP-NEXT: mov pc, lr
805;
806; CHECK-HARDFP-SP-LABEL: d2ulz:
807; CHECK-HARDFP-SP: .save {r11, lr}
808; CHECK-HARDFP-SP-NEXT: push {r11, lr}
809; CHECK-HARDFP-SP-NEXT: vmov r0, r1, d0
810; CHECK-HARDFP-SP-NEXT: bl __aeabi_d2ulz
811; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
812; CHECK-HARDFP-SP-NEXT: mov pc, lr
813entry:
814 %conv = fptoui double %a to i64
815 ret i64 %conv
816}
817
818define i32 @f2iz(float %a) #0 {
819; CHECK-SOFT-LABEL: f2iz:
820; CHECK-SOFT: .save {r11, lr}
821; CHECK-SOFT-NEXT: push {r11, lr}
822; CHECK-SOFT-NEXT: bl __aeabi_f2iz
823; CHECK-SOFT-NEXT: pop {r11, lr}
824; CHECK-SOFT-NEXT: mov pc, lr
825;
826; CHECK-SOFTFP-LABEL: f2iz:
827; CHECK-SOFTFP: vmov s0, r0
828; CHECK-SOFTFP-NEXT: vcvt.s32.f32 s0, s0
829; CHECK-SOFTFP-NEXT: vmov r0, s0
830; CHECK-SOFTFP-NEXT: mov pc, lr
831;
832; CHECK-HARDFP-SP-LABEL: f2iz:
833; CHECK-HARDFP-SP: vcvt.s32.f32 s0, s0
834; CHECK-HARDFP-SP-NEXT: vmov r0, s0
835; CHECK-HARDFP-SP-NEXT: mov pc, lr
836entry:
837 %conv = fptosi float %a to i32
838 ret i32 %conv
839}
840
841define i32 @f2uiz(float %a) #0 {
842; CHECK-SOFT-LABEL: f2uiz:
843; CHECK-SOFT: .save {r11, lr}
844; CHECK-SOFT-NEXT: push {r11, lr}
845; CHECK-SOFT-NEXT: bl __aeabi_f2uiz
846; CHECK-SOFT-NEXT: pop {r11, lr}
847; CHECK-SOFT-NEXT: mov pc, lr
848;
849; CHECK-SOFTFP-LABEL: f2uiz:
850; CHECK-SOFTFP: vmov s0, r0
851; CHECK-SOFTFP-NEXT: vcvt.u32.f32 s0, s0
852; CHECK-SOFTFP-NEXT: vmov r0, s0
853; CHECK-SOFTFP-NEXT: mov pc, lr
854;
855; CHECK-HARDFP-SP-LABEL: f2uiz:
856; CHECK-HARDFP-SP: vcvt.u32.f32 s0, s0
857; CHECK-HARDFP-SP-NEXT: vmov r0, s0
858; CHECK-HARDFP-SP-NEXT: mov pc, lr
859entry:
860 %conv = fptoui float %a to i32
861 ret i32 %conv
862}
863
864define i64 @f2lz(float %a) #0 {
865; CHECK-SOFT-LABEL: f2lz:
866; CHECK-SOFT: .save {r11, lr}
867; CHECK-SOFT-NEXT: push {r11, lr}
868; CHECK-SOFT-NEXT: bl __aeabi_f2lz
869; CHECK-SOFT-NEXT: pop {r11, lr}
870; CHECK-SOFT-NEXT: mov pc, lr
871;
872; CHECK-SOFTFP-LABEL: f2lz:
873; CHECK-SOFTFP: .save {r11, lr}
874; CHECK-SOFTFP-NEXT: push {r11, lr}
875; CHECK-SOFTFP-NEXT: bl __aeabi_f2lz
876; CHECK-SOFTFP-NEXT: pop {r11, lr}
877; CHECK-SOFTFP-NEXT: mov pc, lr
878;
879; CHECK-HARDFP-SP-LABEL: f2lz:
880; CHECK-HARDFP-SP: .save {r11, lr}
881; CHECK-HARDFP-SP-NEXT: push {r11, lr}
882; CHECK-HARDFP-SP-NEXT: vmov r0, s0
883; CHECK-HARDFP-SP-NEXT: bl __aeabi_f2lz
884; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
885; CHECK-HARDFP-SP-NEXT: mov pc, lr
886entry:
887 %conv = fptosi float %a to i64
888 ret i64 %conv
889}
890
891define i64 @f2ulz(float %a) #0 {
892; CHECK-SOFT-LABEL: f2ulz:
893; CHECK-SOFT: .save {r11, lr}
894; CHECK-SOFT-NEXT: push {r11, lr}
895; CHECK-SOFT-NEXT: bl __aeabi_f2ulz
896; CHECK-SOFT-NEXT: pop {r11, lr}
897; CHECK-SOFT-NEXT: mov pc, lr
898;
899; CHECK-SOFTFP-LABEL: f2ulz:
900; CHECK-SOFTFP: .save {r11, lr}
901; CHECK-SOFTFP-NEXT: push {r11, lr}
902; CHECK-SOFTFP-NEXT: bl __aeabi_f2ulz
903; CHECK-SOFTFP-NEXT: pop {r11, lr}
904; CHECK-SOFTFP-NEXT: mov pc, lr
905;
906; CHECK-HARDFP-SP-LABEL: f2ulz:
907; CHECK-HARDFP-SP: .save {r11, lr}
908; CHECK-HARDFP-SP-NEXT: push {r11, lr}
909; CHECK-HARDFP-SP-NEXT: vmov r0, s0
910; CHECK-HARDFP-SP-NEXT: bl __aeabi_f2ulz
911; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
912; CHECK-HARDFP-SP-NEXT: mov pc, lr
913entry:
914 %conv = fptoui float %a to i64
915 ret i64 %conv
916}
917
918define float @d2f(double %a) #0 {
919; CHECK-SOFT-LABEL: d2f:
920; CHECK-SOFT: .save {r11, lr}
921; CHECK-SOFT-NEXT: push {r11, lr}
922; CHECK-SOFT-NEXT: bl __aeabi_d2f
923; CHECK-SOFT-NEXT: pop {r11, lr}
924; CHECK-SOFT-NEXT: mov pc, lr
925;
926; CHECK-SOFTFP-LABEL: d2f:
927; CHECK-SOFTFP: vmov d16, r0, r1
928; CHECK-SOFTFP-NEXT: vcvt.f32.f64 s0, d16
929; CHECK-SOFTFP-NEXT: vmov r0, s0
930; CHECK-SOFTFP-NEXT: mov pc, lr
931;
932; CHECK-HARDFP-DP-LABEL: d2f:
933; CHECK-HARDFP-DP: vcvt.f32.f64 s0, d0
934; CHECK-HARDFP-DP-NEXT: mov pc, lr
935;
936; CHECK-HARDFP-SPONLY-LABEL: d2f:
937; CHECK-HARDFP-SPONLY: .save {r11, lr}
938; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
939; CHECK-HARDFP-SPONLY-NEXT: vmov r0, r1, d0
940; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_d2f
941; CHECK-HARDFP-SPONLY-NEXT: vmov s0, r0
942; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
943; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
944entry:
945 %conv = fptrunc double %a to float
946 ret float %conv
947}
948
949define double @f2d(float %a) #0 {
950; CHECK-SOFT-LABEL: f2d:
951; CHECK-SOFT: .save {r11, lr}
952; CHECK-SOFT-NEXT: push {r11, lr}
953; CHECK-SOFT-NEXT: bl __aeabi_f2d
954; CHECK-SOFT-NEXT: pop {r11, lr}
955; CHECK-SOFT-NEXT: mov pc, lr
956;
957; CHECK-SOFTFP-LABEL: f2d:
958; CHECK-SOFTFP: vmov s0, r0
959; CHECK-SOFTFP-NEXT: vcvt.f64.f32 d16, s0
960; CHECK-SOFTFP-NEXT: vmov r0, r1, d16
961; CHECK-SOFTFP-NEXT: mov pc, lr
962;
963; CHECK-HARDFP-DP-LABEL: f2d:
964; CHECK-HARDFP-DP: vcvt.f64.f32 d0, s0
965; CHECK-HARDFP-DP-NEXT: mov pc, lr
966;
967; CHECK-HARDFP-SPONLY-LABEL: f2d:
968; CHECK-HARDFP-SPONLY: .save {r11, lr}
969; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
970; CHECK-HARDFP-SPONLY-NEXT: vmov r0, s0
971; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_f2d
972; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1
973; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
974; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
975entry:
976 %conv = fpext float %a to double
977 ret double %conv
978}
979
980define double @i2d(i32 %a) #0 {
981; CHECK-SOFT-LABEL: i2d:
982; CHECK-SOFT: .save {r11, lr}
983; CHECK-SOFT-NEXT: push {r11, lr}
984; CHECK-SOFT-NEXT: bl __aeabi_i2d
985; CHECK-SOFT-NEXT: pop {r11, lr}
986; CHECK-SOFT-NEXT: mov pc, lr
987;
988; CHECK-SOFTFP-LABEL: i2d:
989; CHECK-SOFTFP: vmov s0, r0
990; CHECK-SOFTFP-NEXT: vcvt.f64.s32 d16, s0
991; CHECK-SOFTFP-NEXT: vmov r0, r1, d16
992; CHECK-SOFTFP-NEXT: mov pc, lr
993;
994; CHECK-HARDFP-DP-LABEL: i2d:
995; CHECK-HARDFP-DP: vmov s0, r0
996; CHECK-HARDFP-DP-NEXT: vcvt.f64.s32 d0, s0
997; CHECK-HARDFP-DP-NEXT: mov pc, lr
998;
999; CHECK-HARDFP-SPONLY-LABEL: i2d:
1000; CHECK-HARDFP-SPONLY: .save {r11, lr}
1001; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
1002; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_i2d
1003; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1
1004; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
1005; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
1006entry:
1007 %conv = sitofp i32 %a to double
1008 ret double %conv
1009}
1010
1011define double @ui2d(i32 %a) #0 {
1012; CHECK-SOFT-LABEL: ui2d:
1013; CHECK-SOFT: .save {r11, lr}
1014; CHECK-SOFT-NEXT: push {r11, lr}
1015; CHECK-SOFT-NEXT: bl __aeabi_ui2d
1016; CHECK-SOFT-NEXT: pop {r11, lr}
1017; CHECK-SOFT-NEXT: mov pc, lr
1018;
1019; CHECK-SOFTFP-LABEL: ui2d:
1020; CHECK-SOFTFP: vmov s0, r0
1021; CHECK-SOFTFP-NEXT: vcvt.f64.u32 d16, s0
1022; CHECK-SOFTFP-NEXT: vmov r0, r1, d16
1023; CHECK-SOFTFP-NEXT: mov pc, lr
1024;
1025; CHECK-HARDFP-DP-LABEL: ui2d:
1026; CHECK-HARDFP-DP: vmov s0, r0
1027; CHECK-HARDFP-DP-NEXT: vcvt.f64.u32 d0, s0
1028; CHECK-HARDFP-DP-NEXT: mov pc, lr
1029;
1030; CHECK-HARDFP-SPONLY-LABEL: ui2d:
1031; CHECK-HARDFP-SPONLY: .save {r11, lr}
1032; CHECK-HARDFP-SPONLY-NEXT: push {r11, lr}
1033; CHECK-HARDFP-SPONLY-NEXT: bl __aeabi_ui2d
1034; CHECK-HARDFP-SPONLY-NEXT: vmov d0, r0, r1
1035; CHECK-HARDFP-SPONLY-NEXT: pop {r11, lr}
1036; CHECK-HARDFP-SPONLY-NEXT: mov pc, lr
1037entry:
1038 %conv = uitofp i32 %a to double
1039 ret double %conv
1040}
1041
1042define double @l2d(i64 %a) #0 {
1043; CHECK-SOFT-LABEL: l2d:
1044; CHECK-SOFT: .save {r11, lr}
1045; CHECK-SOFT-NEXT: push {r11, lr}
1046; CHECK-SOFT-NEXT: bl __aeabi_l2d
1047; CHECK-SOFT-NEXT: pop {r11, lr}
1048; CHECK-SOFT-NEXT: mov pc, lr
1049;
1050; CHECK-SOFTFP-LABEL: l2d:
1051; CHECK-SOFTFP: .save {r11, lr}
1052; CHECK-SOFTFP-NEXT: push {r11, lr}
1053; CHECK-SOFTFP-NEXT: bl __aeabi_l2d
1054; CHECK-SOFTFP-NEXT: pop {r11, lr}
1055; CHECK-SOFTFP-NEXT: mov pc, lr
1056;
1057; CHECK-HARDFP-SP-LABEL: l2d:
1058; CHECK-HARDFP-SP: .save {r11, lr}
1059; CHECK-HARDFP-SP-NEXT: push {r11, lr}
1060; CHECK-HARDFP-SP-NEXT: bl __aeabi_l2d
1061; CHECK-HARDFP-SP-NEXT: vmov d0, r0, r1
1062; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
1063; CHECK-HARDFP-SP-NEXT: mov pc, lr
1064entry:
1065 %conv = sitofp i64 %a to double
1066 ret double %conv
1067}
1068
1069define double @ul2d(i64 %a) #0 {
1070; CHECK-SOFT-LABEL: ul2d:
1071; CHECK-SOFT: .save {r11, lr}
1072; CHECK-SOFT-NEXT: push {r11, lr}
1073; CHECK-SOFT-NEXT: bl __aeabi_ul2d
1074; CHECK-SOFT-NEXT: pop {r11, lr}
1075; CHECK-SOFT-NEXT: mov pc, lr
1076;
1077; CHECK-SOFTFP-LABEL: ul2d:
1078; CHECK-SOFTFP: .save {r11, lr}
1079; CHECK-SOFTFP-NEXT: push {r11, lr}
1080; CHECK-SOFTFP-NEXT: bl __aeabi_ul2d
1081; CHECK-SOFTFP-NEXT: pop {r11, lr}
1082; CHECK-SOFTFP-NEXT: mov pc, lr
1083;
1084; CHECK-HARDFP-SP-LABEL: ul2d:
1085; CHECK-HARDFP-SP: .save {r11, lr}
1086; CHECK-HARDFP-SP-NEXT: push {r11, lr}
1087; CHECK-HARDFP-SP-NEXT: bl __aeabi_ul2d
1088; CHECK-HARDFP-SP-NEXT: vmov d0, r0, r1
1089; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
1090; CHECK-HARDFP-SP-NEXT: mov pc, lr
1091entry:
1092 %conv = uitofp i64 %a to double
1093 ret double %conv
1094}
1095
1096define float @i2f(i32 %a) #0 {
1097; CHECK-SOFT-LABEL: i2f:
1098; CHECK-SOFT: .save {r11, lr}
1099; CHECK-SOFT-NEXT: push {r11, lr}
1100; CHECK-SOFT-NEXT: bl __aeabi_i2f
1101; CHECK-SOFT-NEXT: pop {r11, lr}
1102; CHECK-SOFT-NEXT: mov pc, lr
1103;
1104; CHECK-SOFTFP-LABEL: i2f:
1105; CHECK-SOFTFP: vmov s0, r0
1106; CHECK-SOFTFP-NEXT: vcvt.f32.s32 s0, s0
1107; CHECK-SOFTFP-NEXT: vmov r0, s0
1108; CHECK-SOFTFP-NEXT: mov pc, lr
1109;
1110; CHECK-HARDFP-SP-LABEL: i2f:
1111; CHECK-HARDFP-SP: vmov s0, r0
1112; CHECK-HARDFP-SP-NEXT: vcvt.f32.s32 s0, s0
1113; CHECK-HARDFP-SP-NEXT: mov pc, lr
1114entry:
1115 %conv = sitofp i32 %a to float
1116 ret float %conv
1117}
1118
1119define float @ui2f(i32 %a) #0 {
1120; CHECK-SOFT-LABEL: ui2f:
1121; CHECK-SOFT: .save {r11, lr}
1122; CHECK-SOFT-NEXT: push {r11, lr}
1123; CHECK-SOFT-NEXT: bl __aeabi_ui2f
1124; CHECK-SOFT-NEXT: pop {r11, lr}
1125; CHECK-SOFT-NEXT: mov pc, lr
1126;
1127; CHECK-SOFTFP-LABEL: ui2f:
1128; CHECK-SOFTFP: vmov s0, r0
1129; CHECK-SOFTFP-NEXT: vcvt.f32.u32 s0, s0
1130; CHECK-SOFTFP-NEXT: vmov r0, s0
1131; CHECK-SOFTFP-NEXT: mov pc, lr
1132;
1133; CHECK-HARDFP-SP-LABEL: ui2f:
1134; CHECK-HARDFP-SP: vmov s0, r0
1135; CHECK-HARDFP-SP-NEXT: vcvt.f32.u32 s0, s0
1136; CHECK-HARDFP-SP-NEXT: mov pc, lr
1137entry:
1138 %conv = uitofp i32 %a to float
1139 ret float %conv
1140}
1141
1142define float @l2f(i64 %a) #0 {
1143; CHECK-SOFT-LABEL: l2f:
1144; CHECK-SOFT: .save {r11, lr}
1145; CHECK-SOFT-NEXT: push {r11, lr}
1146; CHECK-SOFT-NEXT: bl __aeabi_l2f
1147; CHECK-SOFT-NEXT: pop {r11, lr}
1148; CHECK-SOFT-NEXT: mov pc, lr
1149;
1150; CHECK-SOFTFP-LABEL: l2f:
1151; CHECK-SOFTFP: .save {r11, lr}
1152; CHECK-SOFTFP-NEXT: push {r11, lr}
1153; CHECK-SOFTFP-NEXT: bl __aeabi_l2f
1154; CHECK-SOFTFP-NEXT: pop {r11, lr}
1155; CHECK-SOFTFP-NEXT: mov pc, lr
1156;
1157; CHECK-HARDFP-SP-LABEL: l2f:
1158; CHECK-HARDFP-SP: .save {r11, lr}
1159; CHECK-HARDFP-SP-NEXT: push {r11, lr}
1160; CHECK-HARDFP-SP-NEXT: bl __aeabi_l2f
1161; CHECK-HARDFP-SP-NEXT: vmov s0, r0
1162; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
1163; CHECK-HARDFP-SP-NEXT: mov pc, lr
1164entry:
1165 %conv = sitofp i64 %a to float
1166 ret float %conv
1167}
1168
1169define float @ul2f(i64 %a) #0 {
1170; CHECK-SOFT-LABEL: ul2f:
1171; CHECK-SOFT: .save {r11, lr}
1172; CHECK-SOFT-NEXT: push {r11, lr}
1173; CHECK-SOFT-NEXT: bl __aeabi_ul2f
1174; CHECK-SOFT-NEXT: pop {r11, lr}
1175; CHECK-SOFT-NEXT: mov pc, lr
1176;
1177; CHECK-SOFTFP-LABEL: ul2f:
1178; CHECK-SOFTFP: .save {r11, lr}
1179; CHECK-SOFTFP-NEXT: push {r11, lr}
1180; CHECK-SOFTFP-NEXT: bl __aeabi_ul2f
1181; CHECK-SOFTFP-NEXT: pop {r11, lr}
1182; CHECK-SOFTFP-NEXT: mov pc, lr
1183;
1184; CHECK-HARDFP-SP-LABEL: ul2f:
1185; CHECK-HARDFP-SP: .save {r11, lr}
1186; CHECK-HARDFP-SP-NEXT: push {r11, lr}
1187; CHECK-HARDFP-SP-NEXT: bl __aeabi_ul2f
1188; CHECK-HARDFP-SP-NEXT: vmov s0, r0
1189; CHECK-HARDFP-SP-NEXT: pop {r11, lr}
1190; CHECK-HARDFP-SP-NEXT: mov pc, lr
1191entry:
1192 %conv = uitofp i64 %a to float
1193 ret float %conv
1194}
1195attributes #0 = { nounwind }