blob: bf603704a91b688bb21731295a0ded3fd9824d12 [file] [log] [blame]
Francis Visoiu Mistrihb7cef812019-01-14 10:55:55 +00001; RUN: llc -O0 -frame-pointer=all < %s | FileCheck %s
Anton Korobeynikov0a691762012-10-17 17:37:11 +00002
3target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
4target triple = "msp430---elf"
5
6define void @fp() nounwind {
7entry:
Stephen Lind24ab202013-07-14 06:24:09 +00008; CHECK-LABEL: fp:
Anton Korobeynikov49045c62018-11-15 12:29:43 +00009; CHECK: push r4
10; CHECK: mov r1, r4
11; CHECK: sub #2, r1
Anton Korobeynikov0a691762012-10-17 17:37:11 +000012 %i = alloca i16, align 2
Anton Korobeynikov49045c62018-11-15 12:29:43 +000013; CHECK: clr -2(r4)
Anton Korobeynikov0a691762012-10-17 17:37:11 +000014 store i16 0, i16* %i, align 2
Anton Korobeynikov49045c62018-11-15 12:29:43 +000015; CHECK: pop r4
Anton Korobeynikov0a691762012-10-17 17:37:11 +000016 ret void
17}
Job Noormanf7da1052014-04-02 13:13:56 +000018
19; Due to FPB not being marked as reserved, the register allocator used to select
20; r4 as the register for the "r" constraint below. This test verifies that this
21; does not happen anymore. Note that the only reason an ISR is used here is that
22; the register allocator selects r4 first instead of fifth in a normal function.
23define msp430_intrcc void @fpb_alloced() #0 {
Nico Rieckbd159452014-05-23 19:06:24 +000024; CHECK-LABEL: fpb_alloced:
Job Noormanf7da1052014-04-02 13:13:56 +000025; CHECK-NOT: mov.b #0, r4
26; CHECK: nop
27 call void asm sideeffect "nop", "r"(i8 0)
28 ret void
29}
Anton Korobeynikovcbdb4ef2019-01-16 14:03:41 +000030
31attributes #0 = { noinline nounwind optnone "interrupt"="2" }