| Stefan Maksimovic | 8d7c351 | 2018-11-05 14:37:41 +0000 | [diff] [blame] | 1 | ; RUN: llc -O0 -mtriple=mips-img-linux-gnu -mcpu=mips32r2 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK32R2 |
| 2 | ; RUN: llc -O0 -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK32R6 |
| 3 | ; RUN: llc -O0 -mtriple=mips-img-linux-gnu -mcpu=mips32r2 -verify-machineinstrs -mattr=+use-indirect-jump-hazard < %s -o - | FileCheck %s --check-prefixes=CHECK32-IJH |
| 4 | ; RUN: llc -O0 -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -verify-machineinstrs -mattr=+use-indirect-jump-hazard < %s -o - | FileCheck %s --check-prefixes=CHECK32-IJH |
| Aleksandar Beserminji | 949a17c | 2018-08-07 10:45:45 +0000 | [diff] [blame] | 5 | |
| Stefan Maksimovic | 8d7c351 | 2018-11-05 14:37:41 +0000 | [diff] [blame] | 6 | ; RUN: llc -O0 -mtriple=mips64-img-linux-gnu -mcpu=mips64r2 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK64R2 |
| 7 | ; RUN: llc -O0 -mtriple=mips64-img-linux-gnu -mcpu=mips64r6 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK64R6 |
| 8 | ; RUN: llc -O0 -mtriple=mips64-img-linux-gnu -mcpu=mips64r2 -verify-machineinstrs -mattr=+use-indirect-jump-hazard < %s -o - | FileCheck %s --check-prefixes=CHECK64-IJH |
| 9 | ; RUN: llc -O0 -mtriple=mips64-img-linux-gnu -mcpu=mips64r6 -verify-machineinstrs -mattr=+use-indirect-jump-hazard < %s -o - | FileCheck %s --check-prefixes=CHECK64-IJH |
| Aleksandar Beserminji | 949a17c | 2018-08-07 10:45:45 +0000 | [diff] [blame] | 10 | |
| 11 | declare i32 @foo(...) |
| 12 | |
| 13 | define i32 @boo3(i32 signext %argc) { |
| 14 | ; CHECK-LABEL: test_label_3: |
| 15 | |
| 16 | ; CHECK32R2: lui $1, %hi($BB0_4) |
| 17 | ; CHECK32R2-NEXT: addiu $1, $1, %lo($BB0_4) |
| 18 | ; CHECK32R2-NEXT: jr $1 |
| 19 | |
| 20 | ; CHECK32R6: lui $1, %hi($BB0_4) |
| 21 | ; CHECK32R6-NEXT: addiu $1, $1, %lo($BB0_4) |
| 22 | ; CHECK32R6-NEXT: jrc $1 |
| 23 | |
| 24 | ; CHECK32-IJH: lui $1, %hi($BB0_4) |
| 25 | ; CHECK32-IJH-NEXT: addiu $1, $1, %lo($BB0_4) |
| 26 | ; CHECK32-IJH-NEXT: jr.hb $1 |
| 27 | |
| 28 | ; CHECK64R2: lui $1, %highest(.LBB0_4) |
| 29 | ; CHECK64R2-NEXT: daddiu $1, $1, %higher(.LBB0_4) |
| 30 | ; CHECK64R2-NEXT: dsll $1, $1, 16 |
| 31 | ; CHECK64R2-NEXT: daddiu $1, $1, %hi(.LBB0_4) |
| 32 | ; CHECK64R2-NEXT: dsll $1, $1, 16 |
| 33 | ; CHECK64R2-NEXT: daddiu $1, $1, %lo(.LBB0_4) |
| 34 | ; CHECK64R2-NEXT: jr $1 |
| 35 | |
| 36 | ; CHECK64R6: lui $1, %highest(.LBB0_4) |
| 37 | ; CHECK64R6-NEXT: daddiu $1, $1, %higher(.LBB0_4) |
| 38 | ; CHECK64R6-NEXT: dsll $1, $1, 16 |
| 39 | ; CHECK64R6-NEXT: daddiu $1, $1, %hi(.LBB0_4) |
| 40 | ; CHECK64R6-NEXT: dsll $1, $1, 16 |
| 41 | ; CHECK64R6-NEXT: daddiu $1, $1, %lo(.LBB0_4) |
| 42 | ; CHECK64R6-NEXT: jrc $1 |
| 43 | |
| 44 | ; CHECK64-IJH: lui $1, %highest(.LBB0_4) |
| 45 | ; CHECK64-IJH-NEXT: daddiu $1, $1, %higher(.LBB0_4) |
| 46 | ; CHECK64-IJH-NEXT: dsll $1, $1, 16 |
| 47 | ; CHECK64-IJH-NEXT: daddiu $1, $1, %hi(.LBB0_4) |
| 48 | ; CHECK64-IJH-NEXT: dsll $1, $1, 16 |
| 49 | ; CHECK64-IJH-NEXT: daddiu $1, $1, %lo(.LBB0_4) |
| 50 | ; CHECK64-IJH-NEXT: jr.hb $1 |
| 51 | |
| 52 | entry: |
| 53 | %retval = alloca i32, align 4 |
| 54 | %argc.addr = alloca i32, align 4 |
| 55 | store i32 0, i32* %retval, align 4 |
| 56 | store i32 %argc, i32* %argc.addr, align 4 |
| 57 | call void asm sideeffect "test_label_3:", "~{$1}"() |
| 58 | %0 = load i32, i32* %argc.addr, align 4 |
| 59 | %cmp = icmp sgt i32 %0, 1 |
| 60 | br i1 %cmp, label %if.then, label %if.end |
| 61 | |
| 62 | if.then: |
| 63 | call void asm sideeffect ".space 268435452", "~{$1}"() |
| 64 | %call = call i32 bitcast (i32 (...)* @foo to i32 ()*)() |
| 65 | store i32 %call, i32* %retval, align 4 |
| 66 | br label %return |
| 67 | |
| 68 | if.end: |
| 69 | store i32 0, i32* %retval, align 4 |
| 70 | br label %return |
| 71 | |
| 72 | return: |
| 73 | %1 = load i32, i32* %retval, align 4 |
| 74 | ret i32 %1 |
| 75 | } |