llvm/test/CodeGen/RISCV/pr40333.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN:   | FileCheck -check-prefix=RV64I %s

; This test case is significantly simplified from the submitted .ll but
; demonstrates the same issue. At the time of this problem report, an infinite
; loop would be created in DAGCombine, converting ANY_EXTEND to SIGN_EXTEND
; and back again.

define signext i8 @foo(i32 %a, i32 %b) nounwind {
; RV64I-LABEL: foo:
; RV64I:       # %bb.0:
; RV64I-NEXT:    srlw a0, a0, a1
; RV64I-NEXT:    slli a0, a0, 56
; RV64I-NEXT:    srai a0, a0, 56
; RV64I-NEXT:    ret
 %1 = lshr i32 %a, %b
 %2 = trunc i32 %1 to i8
 ret i8 %2
}