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Ulrich Weigand9e3577f2013-05-06 16:17:29 +00001; Test 64-bit compare and swap.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check CSG without a displacement.
6define i64 @f1(i64 %cmp, i64 %swap, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +00007; CHECK-LABEL: f1:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +00008; CHECK: csg %r2, %r3, 0(%r4)
9; CHECK: br %r14
Tim Northover420a2162014-06-13 14:24:07 +000010 %pairval = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst seq_cst
11 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000012 ret i64 %val
13}
14
15; Check the high end of the aligned CSG range.
16define i64 @f2(i64 %cmp, i64 %swap, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +000017; CHECK-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000018; CHECK: csg %r2, %r3, 524280(%r4)
19; CHECK: br %r14
David Blaikie79e6c742015-02-27 19:29:02 +000020 %ptr = getelementptr i64, i64 *%src, i64 65535
Tim Northover420a2162014-06-13 14:24:07 +000021 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
22 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000023 ret i64 %val
24}
25
26; Check the next doubleword up, which needs separate address logic.
27; Other sequences besides this one would be OK.
28define i64 @f3(i64 %cmp, i64 %swap, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +000029; CHECK-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000030; CHECK: agfi %r4, 524288
31; CHECK: csg %r2, %r3, 0(%r4)
32; CHECK: br %r14
David Blaikie79e6c742015-02-27 19:29:02 +000033 %ptr = getelementptr i64, i64 *%src, i64 65536
Tim Northover420a2162014-06-13 14:24:07 +000034 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
35 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000036 ret i64 %val
37}
38
39; Check the high end of the negative aligned CSG range.
40define i64 @f4(i64 %cmp, i64 %swap, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +000041; CHECK-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000042; CHECK: csg %r2, %r3, -8(%r4)
43; CHECK: br %r14
David Blaikie79e6c742015-02-27 19:29:02 +000044 %ptr = getelementptr i64, i64 *%src, i64 -1
Tim Northover420a2162014-06-13 14:24:07 +000045 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
46 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000047 ret i64 %val
48}
49
50; Check the low end of the CSG range.
51define i64 @f5(i64 %cmp, i64 %swap, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +000052; CHECK-LABEL: f5:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000053; CHECK: csg %r2, %r3, -524288(%r4)
54; CHECK: br %r14
David Blaikie79e6c742015-02-27 19:29:02 +000055 %ptr = getelementptr i64, i64 *%src, i64 -65536
Tim Northover420a2162014-06-13 14:24:07 +000056 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
57 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000058 ret i64 %val
59}
60
61; Check the next doubleword down, which needs separate address logic.
62; Other sequences besides this one would be OK.
63define i64 @f6(i64 %cmp, i64 %swap, i64 *%src) {
Stephen Lind24ab202013-07-14 06:24:09 +000064; CHECK-LABEL: f6:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000065; CHECK: agfi %r4, -524296
66; CHECK: csg %r2, %r3, 0(%r4)
67; CHECK: br %r14
David Blaikie79e6c742015-02-27 19:29:02 +000068 %ptr = getelementptr i64, i64 *%src, i64 -65537
Tim Northover420a2162014-06-13 14:24:07 +000069 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
70 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000071 ret i64 %val
72}
73
74; Check that CSG does not allow an index.
75define i64 @f7(i64 %cmp, i64 %swap, i64 %src, i64 %index) {
Stephen Lind24ab202013-07-14 06:24:09 +000076; CHECK-LABEL: f7:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000077; CHECK: agr %r4, %r5
78; CHECK: csg %r2, %r3, 0(%r4)
79; CHECK: br %r14
80 %add1 = add i64 %src, %index
81 %ptr = inttoptr i64 %add1 to i64 *
Tim Northover420a2162014-06-13 14:24:07 +000082 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 %swap seq_cst seq_cst
83 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000084 ret i64 %val
85}
86
87; Check that a constant %cmp value is loaded into a register first.
88define i64 @f8(i64 %dummy, i64 %swap, i64 *%ptr) {
Stephen Lind24ab202013-07-14 06:24:09 +000089; CHECK-LABEL: f8:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000090; CHECK: lghi %r2, 1001
91; CHECK: csg %r2, %r3, 0(%r4)
92; CHECK: br %r14
Tim Northover420a2162014-06-13 14:24:07 +000093 %pairval = cmpxchg i64 *%ptr, i64 1001, i64 %swap seq_cst seq_cst
94 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +000095 ret i64 %val
96}
97
98; Check that a constant %swap value is loaded into a register first.
99define i64 @f9(i64 %cmp, i64 *%ptr) {
Stephen Lind24ab202013-07-14 06:24:09 +0000100; CHECK-LABEL: f9:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000101; CHECK: lghi [[SWAP:%r[0-9]+]], 1002
102; CHECK: csg %r2, [[SWAP]], 0(%r3)
103; CHECK: br %r14
Tim Northover420a2162014-06-13 14:24:07 +0000104 %pairval = cmpxchg i64 *%ptr, i64 %cmp, i64 1002 seq_cst seq_cst
105 %val = extractvalue { i64, i1 } %pairval, 0
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000106 ret i64 %val
107}
Ulrich Weigand0f1de042017-09-28 16:22:54 +0000108
109; Check generating the comparison result.
110; CHECK-LABEL: f10
111; CHECK: csg %r2, %r3, 0(%r4)
112; CHECK-NEXT: ipm %r2
113; CHECK-NEXT: afi %r2, -268435456
114; CHECK-NEXT: srl %r2, 31
115; CHECK: br %r14
116define i32 @f10(i64 %cmp, i64 %swap, i64 *%src) {
117 %pairval = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst seq_cst
118 %val = extractvalue { i64, i1 } %pairval, 1
119 %res = zext i1 %val to i32
120 ret i32 %res
121}
122
Ulrich Weigand31112892018-01-19 20:54:18 +0000123declare void @g()
124
125; Check using the comparison result for a branch.
126; CHECK-LABEL: f11
127; CHECK: csg %r2, %r3, 0(%r4)
128; CHECK-NEXT: jge g
129; CHECK: br %r14
130define void @f11(i64 %cmp, i64 %swap, i64 *%src) {
131 %pairval = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst seq_cst
132 %cond = extractvalue { i64, i1 } %pairval, 1
133 br i1 %cond, label %call, label %exit
134
135call:
136 tail call void @g()
137 br label %exit
138
139exit:
140 ret void
141}
142
143; ... and the same with the inverted direction.
144; CHECK-LABEL: f12
145; CHECK: csg %r2, %r3, 0(%r4)
146; CHECK-NEXT: jgl g
147; CHECK: br %r14
148define void @f12(i64 %cmp, i64 %swap, i64 *%src) {
149 %pairval = cmpxchg i64 *%src, i64 %cmp, i64 %swap seq_cst seq_cst
150 %cond = extractvalue { i64, i1 } %pairval, 1
151 br i1 %cond, label %exit, label %call
152
153call:
154 tail call void @g()
155 br label %exit
156
157exit:
158 ret void
159}
160