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gerrit-public.fairphone.software / toolchain / llvm-project / 91be65be656072a68b51a8c4e7bb751ea475d896 / . / llvm / test / CodeGen / SystemZ / int-add-07.ll
blob: e9e0212e4df83033e61eee4f375b40bc7798047c [file] [log] [blame]
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]1; Test 64-bit addition in which the second operand is constant.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check additions of 1.
6define i64 @f1(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]7; CHECK-LABEL: f1:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]8; CHECK: {{aghi %r2, 1|la %r[0-5], 1\(%r2\)}}
9; CHECK: br %r14
10 %add = add i64 %a, 1
11 ret i64 %add
12}
13
14; Check the high end of the AGHI range.
15define i64 @f2(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]16; CHECK-LABEL: f2:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]17; CHECK: aghi %r2, 32767
18; CHECK: br %r14
19 %add = add i64 %a, 32767
20 ret i64 %add
21}
22
23; Check the next value up, which must use AGFI instead.
24define i64 @f3(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]25; CHECK-LABEL: f3:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]26; CHECK: {{agfi %r2, 32768|lay %r[0-5], 32768\(%r2\)}}
27; CHECK: br %r14
28 %add = add i64 %a, 32768
29 ret i64 %add
30}
31
32; Check the high end of the AGFI range.
33define i64 @f4(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]34; CHECK-LABEL: f4:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]35; CHECK: agfi %r2, 2147483647
36; CHECK: br %r14
37 %add = add i64 %a, 2147483647
38 ret i64 %add
39}
40
41; Check the next value up, which must use ALGFI instead.
42define i64 @f5(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]43; CHECK-LABEL: f5:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]44; CHECK: algfi %r2, 2147483648
45; CHECK: br %r14
46 %add = add i64 %a, 2147483648
47 ret i64 %add
48}
49
50; Check the high end of the ALGFI range.
51define i64 @f6(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]52; CHECK-LABEL: f6:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]53; CHECK: algfi %r2, 4294967295
54; CHECK: br %r14
55 %add = add i64 %a, 4294967295
56 ret i64 %add
57}
58
59; Check the next value up, which must be loaded into a register first.
60define i64 @f7(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]61; CHECK-LABEL: f7:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]62; CHECK: llihl %r0, 1
63; CHECK: agr
64; CHECK: br %r14
65 %add = add i64 %a, 4294967296
66 ret i64 %add
67}
68
69; Check the high end of the negative AGHI range.
70define i64 @f8(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]71; CHECK-LABEL: f8:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]72; CHECK: aghi %r2, -1
73; CHECK: br %r14
74 %add = add i64 %a, -1
75 ret i64 %add
76}
77
78; Check the low end of the AGHI range.
79define i64 @f9(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]80; CHECK-LABEL: f9:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]81; CHECK: aghi %r2, -32768
82; CHECK: br %r14
83 %add = add i64 %a, -32768
84 ret i64 %add
85}
86
87; Check the next value down, which must use AGFI instead.
88define i64 @f10(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]89; CHECK-LABEL: f10:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]90; CHECK: {{agfi %r2, -32769|lay %r[0-5]+, -32769\(%r2\)}}
91; CHECK: br %r14
92 %add = add i64 %a, -32769
93 ret i64 %add
94}
95
96; Check the low end of the AGFI range.
97define i64 @f11(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]98; CHECK-LABEL: f11:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]99; CHECK: agfi %r2, -2147483648
100; CHECK: br %r14
101 %add = add i64 %a, -2147483648
102 ret i64 %add
103}
104
105; Check the next value down, which must use SLGFI instead.
106define i64 @f12(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]107; CHECK-LABEL: f12:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]108; CHECK: slgfi %r2, 2147483649
109; CHECK: br %r14
110 %add = add i64 %a, -2147483649
111 ret i64 %add
112}
113
114; Check the low end of the SLGFI range.
115define i64 @f13(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]116; CHECK-LABEL: f13:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]117; CHECK: slgfi %r2, 4294967295
118; CHECK: br %r14
119 %add = add i64 %a, -4294967295
120 ret i64 %add
121}
122
123; Check the next value down, which must use register addition instead.
124define i64 @f14(i64 %a) {
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]125; CHECK-LABEL: f14:
Ulrich Weigand9e3577f2013-05-06 16:17:29 +0000[diff] [blame]126; CHECK: llihf %r0, 4294967295
127; CHECK: agr
128; CHECK: br %r14
129 %add = add i64 %a, -4294967296
130 ret i64 %add
131}