Krzysztof Parzyszek | 7793ddb | 2016-02-12 22:53:35 +0000 | [diff] [blame] | 1 | //===--- HexagonBlockRanges.h ---------------------------------------------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | #ifndef HEXAGON_BLOCK_RANGES_H |
| 10 | #define HEXAGON_BLOCK_RANGES_H |
| 11 | |
| 12 | #include "llvm/ADT/BitVector.h" |
| 13 | #include "llvm/CodeGen/MachineBasicBlock.h" |
| 14 | #include "llvm/MC/MCRegisterInfo.h" // For MCPhysReg. |
| 15 | #include <map> |
| 16 | #include <set> |
| 17 | #include <vector> |
| 18 | |
| 19 | namespace llvm { |
| 20 | class Function; |
| 21 | class HexagonSubtarget; |
| 22 | class MachineBasicBlock; |
| 23 | class MachineFunction; |
| 24 | class MachineInstr; |
| 25 | class MCInstrDesc; |
| 26 | class raw_ostream; |
| 27 | class TargetInstrInfo; |
| 28 | class TargetRegisterClass; |
| 29 | class TargetRegisterInfo; |
| 30 | class Type; |
| 31 | } |
| 32 | |
| 33 | using namespace llvm; |
| 34 | |
| 35 | struct HexagonBlockRanges { |
| 36 | HexagonBlockRanges(MachineFunction &MF); |
| 37 | |
| 38 | struct RegisterRef { |
| 39 | unsigned Reg, Sub; |
| 40 | bool operator<(RegisterRef R) const { |
| 41 | return Reg < R.Reg || (Reg == R.Reg && Sub < R.Sub); |
| 42 | } |
| 43 | }; |
| 44 | typedef std::set<RegisterRef> RegisterSet; |
| 45 | |
| 46 | // This is to represent an "index", which is an abstraction of a position |
| 47 | // of an instruction within a basic block. |
| 48 | class IndexType { |
| 49 | public: |
| 50 | enum : unsigned { |
| 51 | None = 0, |
| 52 | Entry = 1, |
| 53 | Exit = 2, |
| 54 | First = 11 // 10th + 1st |
| 55 | }; |
| 56 | static bool isInstr(IndexType X) { return X.Index >= First; } |
| 57 | |
| 58 | IndexType() : Index(None) {} |
| 59 | IndexType(unsigned Idx) : Index(Idx) {} |
| 60 | operator unsigned() const; |
| 61 | bool operator== (unsigned x) const; |
| 62 | bool operator== (IndexType Idx) const; |
| 63 | bool operator!= (unsigned x) const; |
| 64 | bool operator!= (IndexType Idx) const; |
| 65 | IndexType operator++ (); |
| 66 | bool operator< (unsigned Idx) const; |
| 67 | bool operator< (IndexType Idx) const; |
| 68 | bool operator<= (IndexType Idx) const; |
| 69 | |
| 70 | private: |
| 71 | bool operator> (IndexType Idx) const; |
| 72 | bool operator>= (IndexType Idx) const; |
| 73 | |
| 74 | unsigned Index; |
| 75 | }; |
| 76 | |
| 77 | // A range of indices, essentially a representation of a live range. |
| 78 | // This is also used to represent "dead ranges", i.e. ranges where a |
| 79 | // register is dead. |
| 80 | class IndexRange : public std::pair<IndexType,IndexType> { |
| 81 | public: |
| 82 | IndexRange() : Fixed(false), TiedEnd(false) {} |
| 83 | IndexRange(IndexType Start, IndexType End, bool F = false, bool T = false) |
| 84 | : std::pair<IndexType,IndexType>(Start, End), Fixed(F), TiedEnd(T) {} |
| 85 | IndexType start() const { return first; } |
| 86 | IndexType end() const { return second; } |
| 87 | |
| 88 | bool operator< (const IndexRange &A) const { |
| 89 | return start() < A.start(); |
| 90 | } |
| 91 | bool overlaps(const IndexRange &A) const; |
| 92 | bool contains(const IndexRange &A) const; |
| 93 | void merge(const IndexRange &A); |
| 94 | |
| 95 | bool Fixed; // Can be renamed? "Fixed" means "no". |
| 96 | bool TiedEnd; // The end is not a use, but a dead def tied to a use. |
| 97 | |
| 98 | private: |
| 99 | void setStart(const IndexType &S) { first = S; } |
| 100 | void setEnd(const IndexType &E) { second = E; } |
| 101 | }; |
| 102 | |
| 103 | // A list of index ranges. This represents liveness of a register |
| 104 | // in a basic block. |
| 105 | class RangeList : public std::vector<IndexRange> { |
| 106 | public: |
| 107 | void add(IndexType Start, IndexType End, bool Fixed, bool TiedEnd) { |
| 108 | push_back(IndexRange(Start, End, Fixed, TiedEnd)); |
| 109 | } |
| 110 | void add(const IndexRange &Range) { |
| 111 | push_back(Range); |
| 112 | } |
| 113 | void include(const RangeList &RL); |
| 114 | void unionize(bool MergeAdjacent = false); |
| 115 | void subtract(const IndexRange &Range); |
| 116 | |
| 117 | private: |
| 118 | void addsub(const IndexRange &A, const IndexRange &B); |
| 119 | }; |
| 120 | |
| 121 | class InstrIndexMap { |
| 122 | public: |
| 123 | InstrIndexMap(MachineBasicBlock &B); |
| 124 | MachineInstr *getInstr(IndexType Idx) const; |
| 125 | IndexType getIndex(MachineInstr *MI) const; |
| 126 | MachineBasicBlock &getBlock() const { return Block; } |
| 127 | IndexType getPrevIndex(IndexType Idx) const; |
| 128 | IndexType getNextIndex(IndexType Idx) const; |
| 129 | void replaceInstr(MachineInstr *OldMI, MachineInstr *NewMI); |
| 130 | |
| 131 | friend raw_ostream &operator<< (raw_ostream &OS, const InstrIndexMap &Map); |
| 132 | IndexType First, Last; |
| 133 | |
| 134 | private: |
| 135 | MachineBasicBlock &Block; |
| 136 | std::map<IndexType,MachineInstr*> Map; |
| 137 | }; |
| 138 | |
| 139 | typedef std::map<RegisterRef,RangeList> RegToRangeMap; |
| 140 | RegToRangeMap computeLiveMap(InstrIndexMap &IndexMap); |
| 141 | RegToRangeMap computeDeadMap(InstrIndexMap &IndexMap, RegToRangeMap &LiveMap); |
| 142 | static RegisterSet expandToSubRegs(RegisterRef R, |
| 143 | const MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI); |
| 144 | |
| 145 | struct PrintRangeMap { |
| 146 | PrintRangeMap(const RegToRangeMap &M, const TargetRegisterInfo &I) |
| 147 | : Map(M), TRI(I) {} |
| 148 | |
| 149 | friend raw_ostream &operator<< (raw_ostream &OS, const PrintRangeMap &P); |
| 150 | private: |
| 151 | const RegToRangeMap ⤅ |
| 152 | const TargetRegisterInfo &TRI; |
| 153 | }; |
| 154 | |
| 155 | private: |
| 156 | RegisterSet getLiveIns(const MachineBasicBlock &B); |
| 157 | |
| 158 | void computeInitialLiveRanges(InstrIndexMap &IndexMap, |
| 159 | RegToRangeMap &LiveMap); |
| 160 | |
| 161 | MachineFunction &MF; |
| 162 | const HexagonSubtarget &HST; |
| 163 | const TargetInstrInfo &TII; |
| 164 | const TargetRegisterInfo &TRI; |
| 165 | BitVector Reserved; |
| 166 | }; |
| 167 | |
| 168 | |
| 169 | inline HexagonBlockRanges::IndexType::operator unsigned() const { |
| 170 | assert(Index >= First); |
| 171 | return Index; |
| 172 | } |
| 173 | |
| 174 | inline bool HexagonBlockRanges::IndexType::operator== (unsigned x) const { |
| 175 | return Index == x; |
| 176 | } |
| 177 | |
| 178 | inline bool HexagonBlockRanges::IndexType::operator== (IndexType Idx) const { |
| 179 | return Index == Idx.Index; |
| 180 | } |
| 181 | |
| 182 | inline bool HexagonBlockRanges::IndexType::operator!= (unsigned x) const { |
| 183 | return Index != x; |
| 184 | } |
| 185 | |
| 186 | inline bool HexagonBlockRanges::IndexType::operator!= (IndexType Idx) const { |
| 187 | return Index != Idx.Index; |
| 188 | } |
| 189 | |
| 190 | inline |
| 191 | HexagonBlockRanges::IndexType HexagonBlockRanges::IndexType::operator++ () { |
| 192 | assert(Index != None); |
| 193 | assert(Index != Exit); |
| 194 | if (Index == Entry) |
| 195 | Index = First; |
| 196 | else |
| 197 | ++Index; |
| 198 | return *this; |
| 199 | } |
| 200 | |
| 201 | inline bool HexagonBlockRanges::IndexType::operator< (unsigned Idx) const { |
| 202 | return operator< (IndexType(Idx)); |
| 203 | } |
| 204 | |
| 205 | inline bool HexagonBlockRanges::IndexType::operator< (IndexType Idx) const { |
| 206 | // !(x < x). |
| 207 | if (Index == Idx.Index) |
| 208 | return false; |
| 209 | // !(None < x) for all x. |
| 210 | // !(x < None) for all x. |
| 211 | if (Index == None || Idx.Index == None) |
| 212 | return false; |
| 213 | // !(Exit < x) for all x. |
| 214 | // !(x < Entry) for all x. |
| 215 | if (Index == Exit || Idx.Index == Entry) |
| 216 | return false; |
| 217 | // Entry < x for all x != Entry. |
| 218 | // x < Exit for all x != Exit. |
| 219 | if (Index == Entry || Idx.Index == Exit) |
| 220 | return true; |
| 221 | |
| 222 | return Index < Idx.Index; |
| 223 | } |
| 224 | |
| 225 | inline bool HexagonBlockRanges::IndexType::operator<= (IndexType Idx) const { |
| 226 | return operator==(Idx) || operator<(Idx); |
| 227 | } |
| 228 | |
| 229 | |
| 230 | raw_ostream &operator<< (raw_ostream &OS, HexagonBlockRanges::IndexType Idx); |
| 231 | raw_ostream &operator<< (raw_ostream &OS, |
| 232 | const HexagonBlockRanges::IndexRange &IR); |
| 233 | raw_ostream &operator<< (raw_ostream &OS, |
| 234 | const HexagonBlockRanges::RangeList &RL); |
| 235 | raw_ostream &operator<< (raw_ostream &OS, |
| 236 | const HexagonBlockRanges::InstrIndexMap &M); |
| 237 | raw_ostream &operator<< (raw_ostream &OS, |
| 238 | const HexagonBlockRanges::PrintRangeMap &P); |
| 239 | |
| 240 | #endif |