Hal Finkel | 934361a | 2015-01-14 01:07:51 +0000 | [diff] [blame^] | 1 | ; RUN: llc < %s | FileCheck %s |
| 2 | ; |
| 3 | ; Note: Print verbose stackmaps using -debug-only=stackmaps. |
| 4 | |
| 5 | ; We are not getting the correct stack alignment when cross compiling for arm64. |
| 6 | ; So specify a datalayout here. |
| 7 | target datalayout = "E-m:e-i64:64-n32:64" |
| 8 | target triple = "powerpc64-unknown-linux-gnu" |
| 9 | |
| 10 | ; CHECK-LABEL: .section .llvm_stackmaps |
| 11 | ; CHECK-NEXT: __LLVM_StackMaps: |
| 12 | ; Header |
| 13 | ; CHECK-NEXT: .byte 1 |
| 14 | ; CHECK-NEXT: .byte 0 |
| 15 | ; CHECK-NEXT: .short 0 |
| 16 | ; Num Functions |
| 17 | ; CHECK-NEXT: .long 11 |
| 18 | ; Num LargeConstants |
| 19 | ; CHECK-NEXT: .long 2 |
| 20 | ; Num Callsites |
| 21 | ; CHECK-NEXT: .long 11 |
| 22 | |
| 23 | ; Functions and stack size |
| 24 | ; CHECK-NEXT: .quad constantargs |
| 25 | ; CHECK-NEXT: .quad 128 |
| 26 | ; CHECK-NEXT: .quad osrinline |
| 27 | ; CHECK-NEXT: .quad 144 |
| 28 | ; CHECK-NEXT: .quad osrcold |
| 29 | ; CHECK-NEXT: .quad 128 |
| 30 | ; CHECK-NEXT: .quad propertyRead |
| 31 | ; CHECK-NEXT: .quad 128 |
| 32 | ; CHECK-NEXT: .quad propertyWrite |
| 33 | ; CHECK-NEXT: .quad 128 |
| 34 | ; CHECK-NEXT: .quad jsVoidCall |
| 35 | ; CHECK-NEXT: .quad 128 |
| 36 | ; CHECK-NEXT: .quad jsIntCall |
| 37 | ; CHECK-NEXT: .quad 128 |
| 38 | ; CHECK-NEXT: .quad spilledValue |
| 39 | ; CHECK-NEXT: .quad 320 |
| 40 | ; CHECK-NEXT: .quad spilledStackMapValue |
| 41 | ; CHECK-NEXT: .quad 224 |
| 42 | ; CHECK-NEXT: .quad liveConstant |
| 43 | ; CHECK-NEXT: .quad 64 |
| 44 | ; CHECK-NEXT: .quad clobberLR |
| 45 | ; CHECK-NEXT: .quad 208 |
| 46 | |
| 47 | ; Num LargeConstants |
| 48 | ; CHECK-NEXT: .quad 4294967295 |
| 49 | ; CHECK-NEXT: .quad 4294967296 |
| 50 | |
| 51 | ; Constant arguments |
| 52 | ; |
| 53 | ; CHECK-NEXT: .quad 1 |
| 54 | ; CHECK-NEXT: .long .L{{.*}}-.L.constantargs |
| 55 | ; CHECK-NEXT: .short 0 |
| 56 | ; CHECK-NEXT: .short 4 |
| 57 | ; SmallConstant |
| 58 | ; CHECK-NEXT: .byte 4 |
| 59 | ; CHECK-NEXT: .byte 8 |
| 60 | ; CHECK-NEXT: .short 0 |
| 61 | ; CHECK-NEXT: .long 65535 |
| 62 | ; SmallConstant |
| 63 | ; CHECK-NEXT: .byte 4 |
| 64 | ; CHECK-NEXT: .byte 8 |
| 65 | ; CHECK-NEXT: .short 0 |
| 66 | ; CHECK-NEXT: .long 65536 |
| 67 | ; SmallConstant |
| 68 | ; CHECK-NEXT: .byte 5 |
| 69 | ; CHECK-NEXT: .byte 8 |
| 70 | ; CHECK-NEXT: .short 0 |
| 71 | ; CHECK-NEXT: .long 0 |
| 72 | ; LargeConstant at index 0 |
| 73 | ; CHECK-NEXT: .byte 5 |
| 74 | ; CHECK-NEXT: .byte 8 |
| 75 | ; CHECK-NEXT: .short 0 |
| 76 | ; CHECK-NEXT: .long 1 |
| 77 | |
| 78 | define void @constantargs() { |
| 79 | entry: |
| 80 | %0 = inttoptr i64 244837814094590 to i8* |
| 81 | tail call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 1, i32 24, i8* %0, i32 0, i64 65535, i64 65536, i64 4294967295, i64 4294967296) |
| 82 | ret void |
| 83 | } |
| 84 | |
| 85 | ; Inline OSR Exit |
| 86 | ; |
| 87 | ; CHECK-LABEL: .long .L{{.*}}-.L.osrinline |
| 88 | ; CHECK-NEXT: .short 0 |
| 89 | ; CHECK-NEXT: .short 2 |
| 90 | ; CHECK-NEXT: .byte 1 |
| 91 | ; CHECK-NEXT: .byte 8 |
| 92 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 93 | ; CHECK-NEXT: .long 0 |
| 94 | ; CHECK-NEXT: .byte 1 |
| 95 | ; CHECK-NEXT: .byte 8 |
| 96 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 97 | ; CHECK-NEXT: .long 0 |
| 98 | define void @osrinline(i64 %a, i64 %b) { |
| 99 | entry: |
| 100 | ; Runtime void->void call. |
| 101 | call void inttoptr (i64 244837814094590 to void ()*)() |
| 102 | ; Followed by inline OSR patchpoint with 12-byte shadow and 2 live vars. |
| 103 | call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 3, i32 12, i64 %a, i64 %b) |
| 104 | ret void |
| 105 | } |
| 106 | |
| 107 | ; Cold OSR Exit |
| 108 | ; |
| 109 | ; 2 live variables in register. |
| 110 | ; |
| 111 | ; CHECK-LABEL: .long .L{{.*}}-.L.osrcold |
| 112 | ; CHECK-NEXT: .short 0 |
| 113 | ; CHECK-NEXT: .short 2 |
| 114 | ; CHECK-NEXT: .byte 1 |
| 115 | ; CHECK-NEXT: .byte 8 |
| 116 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 117 | ; CHECK-NEXT: .long 0 |
| 118 | ; CHECK-NEXT: .byte 1 |
| 119 | ; CHECK-NEXT: .byte 8 |
| 120 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 121 | ; CHECK-NEXT: .long 0 |
| 122 | define void @osrcold(i64 %a, i64 %b) { |
| 123 | entry: |
| 124 | %test = icmp slt i64 %a, %b |
| 125 | br i1 %test, label %ret, label %cold |
| 126 | cold: |
| 127 | ; OSR patchpoint with 12-byte nop-slide and 2 live vars. |
| 128 | %thunk = inttoptr i64 244837814094590 to i8* |
| 129 | call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 4, i32 24, i8* %thunk, i32 0, i64 %a, i64 %b) |
| 130 | unreachable |
| 131 | ret: |
| 132 | ret void |
| 133 | } |
| 134 | |
| 135 | ; Property Read |
| 136 | ; CHECK-LABEL: .long .L{{.*}}-.L.propertyRead |
| 137 | ; CHECK-NEXT: .short 0 |
| 138 | ; CHECK-NEXT: .short 0 |
| 139 | ; |
| 140 | ; FIXME: There are currently no stackmap entries. After moving to |
| 141 | ; AnyRegCC, we will have entries for the object and return value. |
| 142 | define i64 @propertyRead(i64* %obj) { |
| 143 | entry: |
| 144 | %resolveRead = inttoptr i64 244837814094590 to i8* |
| 145 | %result = call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 5, i32 24, i8* %resolveRead, i32 1, i64* %obj) |
| 146 | %add = add i64 %result, 3 |
| 147 | ret i64 %add |
| 148 | } |
| 149 | |
| 150 | ; Property Write |
| 151 | ; CHECK-LABEL: .long .L{{.*}}-.L.propertyWrite |
| 152 | ; CHECK-NEXT: .short 0 |
| 153 | ; CHECK-NEXT: .short 2 |
| 154 | ; CHECK-NEXT: .byte 1 |
| 155 | ; CHECK-NEXT: .byte 8 |
| 156 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 157 | ; CHECK-NEXT: .long 0 |
| 158 | ; CHECK-NEXT: .byte 1 |
| 159 | ; CHECK-NEXT: .byte 8 |
| 160 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 161 | ; CHECK-NEXT: .long 0 |
| 162 | define void @propertyWrite(i64 %dummy1, i64* %obj, i64 %dummy2, i64 %a) { |
| 163 | entry: |
| 164 | %resolveWrite = inttoptr i64 244837814094590 to i8* |
| 165 | call anyregcc void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 6, i32 24, i8* %resolveWrite, i32 2, i64* %obj, i64 %a) |
| 166 | ret void |
| 167 | } |
| 168 | |
| 169 | ; Void JS Call |
| 170 | ; |
| 171 | ; 2 live variables in registers. |
| 172 | ; |
| 173 | ; CHECK-LABEL: .long .L{{.*}}-.L.jsVoidCall |
| 174 | ; CHECK-NEXT: .short 0 |
| 175 | ; CHECK-NEXT: .short 2 |
| 176 | ; CHECK-NEXT: .byte 1 |
| 177 | ; CHECK-NEXT: .byte 8 |
| 178 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 179 | ; CHECK-NEXT: .long 0 |
| 180 | ; CHECK-NEXT: .byte 1 |
| 181 | ; CHECK-NEXT: .byte 8 |
| 182 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 183 | ; CHECK-NEXT: .long 0 |
| 184 | define void @jsVoidCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { |
| 185 | entry: |
| 186 | %resolveCall = inttoptr i64 244837814094590 to i8* |
| 187 | call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 7, i32 24, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2) |
| 188 | ret void |
| 189 | } |
| 190 | |
| 191 | ; i64 JS Call |
| 192 | ; |
| 193 | ; 2 live variables in registers. |
| 194 | ; |
| 195 | ; CHECK-LABEL: .long .L{{.*}}-.L.jsIntCall |
| 196 | ; CHECK-NEXT: .short 0 |
| 197 | ; CHECK-NEXT: .short 2 |
| 198 | ; CHECK-NEXT: .byte 1 |
| 199 | ; CHECK-NEXT: .byte 8 |
| 200 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 201 | ; CHECK-NEXT: .long 0 |
| 202 | ; CHECK-NEXT: .byte 1 |
| 203 | ; CHECK-NEXT: .byte 8 |
| 204 | ; CHECK-NEXT: .short {{[0-9]+}} |
| 205 | ; CHECK-NEXT: .long 0 |
| 206 | define i64 @jsIntCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { |
| 207 | entry: |
| 208 | %resolveCall = inttoptr i64 244837814094590 to i8* |
| 209 | %result = call i64 (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.i64(i64 8, i32 24, i8* %resolveCall, i32 2, i64* %obj, i64 %arg, i64 %l1, i64 %l2) |
| 210 | %add = add i64 %result, 3 |
| 211 | ret i64 %add |
| 212 | } |
| 213 | |
| 214 | ; Spilled stack map values. |
| 215 | ; |
| 216 | ; Verify 28 stack map entries. |
| 217 | ; |
| 218 | ; CHECK-LABEL: .long .L{{.*}}-.L.spilledValue |
| 219 | ; CHECK-NEXT: .short 0 |
| 220 | ; CHECK-NEXT: .short 28 |
| 221 | ; |
| 222 | ; Check that at least one is a spilled entry from r31. |
| 223 | ; Location: Indirect FP + ... |
| 224 | ; CHECK: .byte 3 |
| 225 | ; CHECK-NEXT: .byte 8 |
| 226 | ; CHECK-NEXT: .short 31 |
| 227 | define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27) { |
| 228 | entry: |
| 229 | call void (i64, i32, i8*, i32, ...)* @llvm.experimental.patchpoint.void(i64 11, i32 24, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27) |
| 230 | ret void |
| 231 | } |
| 232 | |
| 233 | ; Spilled stack map values. |
| 234 | ; |
| 235 | ; Verify 30 stack map entries. |
| 236 | ; |
| 237 | ; CHECK-LABEL: .long .L{{.*}}-.L.spilledStackMapValue |
| 238 | ; CHECK-NEXT: .short 0 |
| 239 | ; CHECK-NEXT: .short 30 |
| 240 | ; |
| 241 | ; Check that at least one is a spilled entry from r31. |
| 242 | ; Location: Indirect FP + ... |
| 243 | ; CHECK: .byte 3 |
| 244 | ; CHECK-NEXT: .byte 8 |
| 245 | ; CHECK-NEXT: .short 31 |
| 246 | define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) { |
| 247 | entry: |
| 248 | call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 12, i32 16, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) |
| 249 | ret void |
| 250 | } |
| 251 | |
| 252 | |
| 253 | ; Map a constant value. |
| 254 | ; |
| 255 | ; CHECK-LABEL: .long .L{{.*}}-.L.liveConstant |
| 256 | ; CHECK-NEXT: .short 0 |
| 257 | ; 1 location |
| 258 | ; CHECK-NEXT: .short 1 |
| 259 | ; Loc 0: SmallConstant |
| 260 | ; CHECK-NEXT: .byte 4 |
| 261 | ; CHECK-NEXT: .byte 8 |
| 262 | ; CHECK-NEXT: .short 0 |
| 263 | ; CHECK-NEXT: .long 33 |
| 264 | |
| 265 | define void @liveConstant() { |
| 266 | tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 15, i32 8, i32 33) |
| 267 | ret void |
| 268 | } |
| 269 | |
| 270 | ; Map a value when LR is the only free register. |
| 271 | ; |
| 272 | ; CHECK-LABEL: .long .L{{.*}}-.L.clobberLR |
| 273 | ; CHECK-NEXT: .short 0 |
| 274 | ; 1 location |
| 275 | ; CHECK-NEXT: .short 1 |
| 276 | ; Loc 0: Indirect FP (r31) - offset |
| 277 | ; CHECK-NEXT: .byte 3 |
| 278 | ; CHECK-NEXT: .byte 4 |
| 279 | ; CHECK-NEXT: .short 31 |
| 280 | ; CHECK-NEXT: .long {{[0-9]+}} |
| 281 | define void @clobberLR(i32 %a) { |
| 282 | tail call void asm sideeffect "nop", "~{r0},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"() nounwind |
| 283 | tail call void (i64, i32, ...)* @llvm.experimental.stackmap(i64 16, i32 8, i32 %a) |
| 284 | ret void |
| 285 | } |
| 286 | |
| 287 | declare void @llvm.experimental.stackmap(i64, i32, ...) |
| 288 | declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...) |
| 289 | declare i64 @llvm.experimental.patchpoint.i64(i64, i32, i8*, i32, ...) |