| Bill Schmidt | 2d1128a | 2014-10-17 15:13:38 +0000 | [diff] [blame] | 1 | ; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -mattr=-vsx -verify-machineinstrs < %s | FileCheck %s |
| 2 | ; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec -mattr=-vsx -verify-machineinstrs -fast-isel=false < %s | FileCheck %s |
| 3 | ; RUN: llc -O0 -mtriple=powerpc-unknown-linux-gnu -mattr=+altivec -mattr=+vsx -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-VSX %s |
| 4 | ; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mattr=+altivec -mattr=+vsx -verify-machineinstrs -fast-isel=false < %s | FileCheck -check-prefix=CHECK-VSX %s |
| Bill Schmidt | b9bc474 | 2012-10-10 21:25:01 +0000 | [diff] [blame] | 5 | |
| 6 | ; This verifies that we generate correct spill/reload code for vector regs. |
| 7 | |
| 8 | define void @addrtaken(i32 %i, <4 x float> %w) nounwind { |
| 9 | entry: |
| 10 | %i.addr = alloca i32, align 4 |
| 11 | %w.addr = alloca <4 x float>, align 16 |
| 12 | store i32 %i, i32* %i.addr, align 4 |
| 13 | store <4 x float> %w, <4 x float>* %w.addr, align 16 |
| 14 | call void @foo(i32* %i.addr) |
| 15 | ret void |
| 16 | } |
| 17 | |
| Bill Schmidt | 4a28e82 | 2013-06-13 20:23:34 +0000 | [diff] [blame] | 18 | ; CHECK: stvx 2, |
| Bill Schmidt | b9bc474 | 2012-10-10 21:25:01 +0000 | [diff] [blame] | 19 | |
| Bill Schmidt | 2d1128a | 2014-10-17 15:13:38 +0000 | [diff] [blame] | 20 | ; We would prefer to test for "stxvw4x 34," but current -O0 code |
| 21 | ; needlessly generates "vor 3,2,2 / stxvw4x 35,0,3", so we'll settle for |
| 22 | ; the opcode. |
| 23 | ; CHECK-VSX: stxvw4x |
| 24 | |
| Bill Schmidt | b9bc474 | 2012-10-10 21:25:01 +0000 | [diff] [blame] | 25 | declare void @foo(i32*) |