| Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 1 | //===--------------------- SIFrameLowering.h --------------------*- C++ -*-===// |
| 2 | // |
| Chandler Carruth | 2946cd7 | 2019-01-19 08:50:56 +0000 | [diff] [blame] | 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
| 9 | #ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H |
| 10 | #define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H |
| 11 | |
| 12 | #include "AMDGPUFrameLowering.h" |
| 13 | |
| 14 | namespace llvm { |
| Eugene Zelenko | 2bc2f33 | 2016-12-09 22:06:55 +0000 | [diff] [blame] | 15 | |
| Matt Arsenault | 57bc432 | 2016-08-31 21:52:21 +0000 | [diff] [blame] | 16 | class SIInstrInfo; |
| 17 | class SIMachineFunctionInfo; |
| 18 | class SIRegisterInfo; |
| Tom Stellard | 5bfbae5 | 2018-07-11 20:59:01 +0000 | [diff] [blame] | 19 | class GCNSubtarget; |
| Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 20 | |
| 21 | class SIFrameLowering final : public AMDGPUFrameLowering { |
| 22 | public: |
| 23 | SIFrameLowering(StackDirection D, unsigned StackAl, int LAO, |
| 24 | unsigned TransAl = 1) : |
| 25 | AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {} |
| Eugene Zelenko | 2bc2f33 | 2016-12-09 22:06:55 +0000 | [diff] [blame] | 26 | ~SIFrameLowering() override = default; |
| Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 27 | |
| Matt Arsenault | 2b1f9aa | 2017-05-17 21:56:25 +0000 | [diff] [blame] | 28 | void emitEntryFunctionPrologue(MachineFunction &MF, |
| 29 | MachineBasicBlock &MBB) const; |
| Matt Arsenault | 0e3d389 | 2015-11-30 21:15:53 +0000 | [diff] [blame] | 30 | void emitPrologue(MachineFunction &MF, |
| 31 | MachineBasicBlock &MBB) const override; |
| Matt Arsenault | 43e92fe | 2016-06-24 06:30:11 +0000 | [diff] [blame] | 32 | void emitEpilogue(MachineFunction &MF, |
| 33 | MachineBasicBlock &MBB) const override; |
| Konstantin Zhuravlyov | ffdb00e | 2017-03-10 19:39:07 +0000 | [diff] [blame] | 34 | int getFrameIndexReference(const MachineFunction &MF, int FI, |
| 35 | unsigned &FrameReg) const override; |
| Matt Arsenault | 0e3d389 | 2015-11-30 21:15:53 +0000 | [diff] [blame] | 36 | |
| Matt Arsenault | ecb43ef | 2017-09-13 23:47:01 +0000 | [diff] [blame] | 37 | void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, |
| 38 | RegScavenger *RS = nullptr) const override; |
| Matt Arsenault | 5b0922f | 2019-07-03 23:32:29 +0000 | [diff] [blame] | 39 | void determineCalleeSavesSGPR(MachineFunction &MF, BitVector &SavedRegs, |
| 40 | RegScavenger *RS = nullptr) const; |
| Matt Arsenault | 71dfb7e | 2019-07-08 19:03:38 +0000 | [diff] [blame] | 41 | bool |
| 42 | assignCalleeSavedSpillSlots(MachineFunction &MF, |
| 43 | const TargetRegisterInfo *TRI, |
| 44 | std::vector<CalleeSavedInfo> &CSI) const override; |
| Matt Arsenault | ecb43ef | 2017-09-13 23:47:01 +0000 | [diff] [blame] | 45 | |
| Sander de Smalen | 5d6ee76 | 2019-06-17 09:13:29 +0000 | [diff] [blame] | 46 | bool isSupportedStackID(TargetStackID::Value ID) const override; |
| 47 | |
| Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 48 | void processFunctionBeforeFrameFinalized( |
| 49 | MachineFunction &MF, |
| 50 | RegScavenger *RS = nullptr) const override; |
| Konstantin Zhuravlyov | f2f3d14 | 2016-06-25 03:11:28 +0000 | [diff] [blame] | 51 | |
| Matt Arsenault | b62a4eb | 2017-08-01 19:54:18 +0000 | [diff] [blame] | 52 | MachineBasicBlock::iterator |
| 53 | eliminateCallFramePseudoInstr(MachineFunction &MF, |
| 54 | MachineBasicBlock &MBB, |
| 55 | MachineBasicBlock::iterator MI) const override; |
| 56 | |
| Konstantin Zhuravlyov | f2f3d14 | 2016-06-25 03:11:28 +0000 | [diff] [blame] | 57 | private: |
| Tom Stellard | 5bfbae5 | 2018-07-11 20:59:01 +0000 | [diff] [blame] | 58 | void emitFlatScratchInit(const GCNSubtarget &ST, |
| Matt Arsenault | 57bc432 | 2016-08-31 21:52:21 +0000 | [diff] [blame] | 59 | MachineFunction &MF, |
| 60 | MachineBasicBlock &MBB) const; |
| 61 | |
| 62 | unsigned getReservedPrivateSegmentBufferReg( |
| Tom Stellard | 5bfbae5 | 2018-07-11 20:59:01 +0000 | [diff] [blame] | 63 | const GCNSubtarget &ST, |
| Matt Arsenault | 57bc432 | 2016-08-31 21:52:21 +0000 | [diff] [blame] | 64 | const SIInstrInfo *TII, |
| 65 | const SIRegisterInfo *TRI, |
| 66 | SIMachineFunctionInfo *MFI, |
| 67 | MachineFunction &MF) const; |
| 68 | |
| Michael Liao | b3f967d | 2019-07-16 15:57:12 +0000 | [diff] [blame] | 69 | std::pair<unsigned, bool> getReservedPrivateSegmentWaveByteOffsetReg( |
| Matt Arsenault | b812b7a | 2019-06-05 22:20:47 +0000 | [diff] [blame] | 70 | const GCNSubtarget &ST, const SIInstrInfo *TII, const SIRegisterInfo *TRI, |
| 71 | SIMachineFunctionInfo *MFI, MachineFunction &MF) const; |
| Matt Arsenault | 57bc432 | 2016-08-31 21:52:21 +0000 | [diff] [blame] | 72 | |
| Tim Renouf | 1322915 | 2017-09-29 09:49:35 +0000 | [diff] [blame] | 73 | // Emit scratch setup code for AMDPAL or Mesa, assuming ResourceRegUsed is set. |
| Tom Stellard | 5bfbae5 | 2018-07-11 20:59:01 +0000 | [diff] [blame] | 74 | void emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF, |
| Tim Renouf | 1322915 | 2017-09-29 09:49:35 +0000 | [diff] [blame] | 75 | MachineBasicBlock &MBB, SIMachineFunctionInfo *MFI, |
| 76 | MachineBasicBlock::iterator I, unsigned PreloadedPrivateBufferReg, |
| 77 | unsigned ScratchRsrcReg) const; |
| 78 | |
| Matt Arsenault | f28683c | 2017-06-26 17:53:59 +0000 | [diff] [blame] | 79 | public: |
| 80 | bool hasFP(const MachineFunction &MF) const override; |
| Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 81 | }; |
| 82 | |
| Eugene Zelenko | 2bc2f33 | 2016-12-09 22:06:55 +0000 | [diff] [blame] | 83 | } // end namespace llvm |
| Matt Arsenault | 0c90e95 | 2015-11-06 18:17:45 +0000 | [diff] [blame] | 84 | |
| Eugene Zelenko | 2bc2f33 | 2016-12-09 22:06:55 +0000 | [diff] [blame] | 85 | #endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H |